Patents by Inventor Tse Nga Ng

Tse Nga Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090159781
    Abstract: Layered structures such as photosensing arrays include layers in which charge carriers can be transported. For example, a carrier-transporting substructure that includes a solution processing artifact can transport charge carriers that flow to or from it through charge-flow surface parts that are on electrically conductive regions of a circuitry substructure; the circuitry substructure can also have channel surface parts that are on semiconductive channel regions, with a set of the channel regions operating as acceptable switches in an application. Or a first substructure's surface can have carrier-active surface parts on electrode regions and line surface parts on line regions; a second substructure can include a transport layer on carrier-active surface parts and, over it, an electrically conductive layer; to prevent leakage, an open region can be defined in the electrically conductive layer over the line surface part and/or an electrically insulating layer portion can cover the line surface part.
    Type: Application
    Filed: December 19, 2007
    Publication date: June 25, 2009
    Inventors: Michael L. Chabinyc, Tse Nga Ng
  • Publication number: 20090152534
    Abstract: A layered structure can include laminated first and second substructures and an array with cell regions. The first substructure can include layered active circuitry, the second a top electrode layer. One or both substructure's surface that contacts the other can be on a polymer-containing layer, structured to generate free charge carriers and/or to transport charge carriers. A cell region of the array can include portions of each substructure; the cell region's portion of the first substructure can include a subregion of electrically conductive material and a subregion of semiconductive material, its portion of the second can include part of the top electrode layer. The layered structure can include one or more lamination artifacts on or in the polymer-containing layer; the lamination artifacts can include artifacts of contact pressure, or heat, or of surface shape, and the interface surface can be without vias.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 18, 2009
    Inventors: Michael L. Chabinyc, Tse Nga Ng
  • Publication number: 20090108304
    Abstract: In transistor structures such as thin film transistors (TFTs) in an array of cells, a layer of semiconducting oxide material that includes a channel is protected by a protective layer that includes low-temperature encapsulant material. The semiconducting oxide material can be a transition metal oxide material such as zinc oxide, and can be in an active layered substructure that also includes channel end electrodes. The low-temperature encapsulant can, for example, be an organic polymer such as poly(methyl methacrylate) or parylene, deposited on an exposed region of the oxide layer such as by spinning, spin-casting, evaporation, or vacuum deposition or an inorganic polymer deposited such as by spinning or liquid deposition. The protective layer can include a lower sublayer of low-temperature encapsulant on the exposed region and an upper sublayer of inorganic material on the lower sublayer. For roll-to-roll processing, a mechanically flexible, low-temperature substrate can be used.
    Type: Application
    Filed: October 26, 2007
    Publication date: April 30, 2009
    Inventors: Tse Nga Ng, Michael L. Chabinyc