Patents by Inventor Tse Nga Ng

Tse Nga Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9837600
    Abstract: Embodiments described herein involve methods of forming an interactive card with indicators on a substrate. A plurality of indicators are formed on the substrate by way of a printed electronics process. A plurality of displaceable regions of piezoelectric material are formed on the substrate by way of a printed electronics process. Electrical interconnections are formed on the substrate by way of a printed electronics process, the electrical interconnections connecting an indicator and an associated displaceable region of piezoelectric material such that displacement of the associated displaceable region of piezoelectric material generates a voltage therein that is provided to the indicator in order to actuate the indicator and thereby indicate displacement of the associated displaceable region of piezoelectric material.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: December 5, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Jurgen Daniel, Tse Nga Ng
  • Publication number: 20170328761
    Abstract: The level sensor system includes a level sensor label configured to be associated with a container containing a material whose level is to be sensed, the level sensor label arrangement having a circuit which includes an inductive element electrically connected to a capacitive structure configured to be associated with the container.
    Type: Application
    Filed: May 10, 2016
    Publication date: November 16, 2017
    Applicant: Palo Alto Research Center Incorporated
    Inventors: David E. Schwartz, Yunda Wang, Robert A. Street, Ping Mei, Janos Veres, Gregory L. Whiting, Steven E. Ready, Tse Nga Ng
  • Publication number: 20170317303
    Abstract: A thin film device has a source region, a drain region, a first gate disposed between the source region and the drain region, a second gate disposed between the source region and the drain region, wherein the second gate region is in close proximity with the first gate region, a semiconductor film disposed between the source region, the drain region, and the first and second gate regions, and a dielectric material disposed between the source region, the drain region, the first and second gate regions, and the semiconductor film.
    Type: Application
    Filed: July 18, 2017
    Publication date: November 2, 2017
    Inventors: TSE NGA NG, DAVID ERIC SCHWARTZ, JANOS VERES
  • Publication number: 20170237003
    Abstract: An embodiment is a method and apparatus to treat surface of polymer for printing. Surface of a polymer having a surface energy modified for a time period to control a feature characteristic and/or provide a hysteresis behavior. A material is printed on the surface to form a circuit pattern having at least one of the controlled feature characteristic and the hysteresis behavior.
    Type: Application
    Filed: May 1, 2017
    Publication date: August 17, 2017
    Inventors: Tse Nga Ng, Ana Claudia Arias, Jurgen H. Daniel
  • Patent number: 9735382
    Abstract: Multiple thin film transistors are aligned in serial and parallel orientation. A second source region is disposed between a first source region and a first drain region. A second drain region is disposed between the first source region and the first drain region. The second drain region and the second source region substantially coincide. A first gate is disposed between the first source region and the coinciding second source and second drain regions. A second gate region is disposed between the first drain region and the coinciding second source and second drain regions. An semiconductor is disposed between the first source region, the first drain region, and the coinciding second source and second drain regions. A dielectric material is disposed between the semiconductor substrate and the first and second gates.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: August 15, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, David Eric Schwartz, Janos Veres
  • Patent number: 9729047
    Abstract: A voltage multiplier includes a supply voltage, at least two multiplier stages electrically connected together, each stage having a trigger voltage terminal, an input terminal, an output terminal, and a capacitor, and each stage connected to the supply voltage, an input stage electrically connected to a first of the at least two multiplier stages, and an output stage electrically connected to a final of the at least two multiplier stages.
    Type: Grant
    Filed: May 11, 2015
    Date of Patent: August 8, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: David Eric Schwartz, Tse Nga Ng
  • Publication number: 20170215284
    Abstract: Disclosed is a conformable, stretchable and electrical conductive structure, which includes an auxetic structure, and a plurality of electrical conductors. The plurality of electrical conductors being incorporated within the auxetic structure, to form conformable, stretchable electrical interconnects, configured based on a design of the auxetic structure and placement of the electrical conductors incorporated with the auxetic structure.
    Type: Application
    Filed: January 27, 2016
    Publication date: July 27, 2017
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Ping Mei, Corie Lynn Cobb, Steven E. Ready, John S. Paschkewitz
  • Publication number: 20170171958
    Abstract: Provided is a manufacturing process for electronic circuit components such as bare dies, and packaged integrated chips, among other configurations, to form electronic assemblies. The surface of the electronic circuit component carries electronic elements such as conductive traces and/or other configurations including contact pads. A method for forming an electronic assembly includes providing a tacky layer. Then an electronic circuit component is provided having a first side and a second side, where the first side carries the electronic elements. The first side of the electronic circuit component is positioned into contact with the tacky layer. A bonding material is then deposited to a portion of the adhesive layer that is not covered by the first side of the electronic circuit component, to a depth which is sufficient to cover at least a portion of the electronic circuit component. The bonding material is then fixed or cured into a fixed or cured bonding material, and the tacky layer is removed.
    Type: Application
    Filed: December 10, 2015
    Publication date: June 15, 2017
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Ping Mei, Brent S. Krusor, Gregory L. Whiting, Steven E. Ready, Janos Veres
  • Patent number: 9666815
    Abstract: An embodiment is a method and apparatus to treat surface of polymer for printing. Surface of a polymer having a surface energy modified for a time period to control a feature characteristic and/or provide a hysteresis behavior. A material is printed on the surface to form a circuit pattern having at least one of the controlled feature characteristic and the hysteresis behavior.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: May 30, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, Ana Claudia Arias, Jurgen H. Daniel
  • Publication number: 20170106605
    Abstract: A structure can include a first layer of a polymer material and a second layer of the polymer material on the first layer, the first and second layers of the polymer material defining a hollow space that was formed by way of a temporary sacrificial structure that was made of a sublimable material.
    Type: Application
    Filed: December 27, 2016
    Publication date: April 20, 2017
    Inventors: Tse Nga Ng, Bing R. Hsieh, Steven E. Ready
  • Patent number: 9629252
    Abstract: A circuit can include a pre-patterned substrate having a supporting material, multiple segments thereon, and interdigitated line structures within each segment. Some of the line structures can be bundled together, and an electrical component can be formed by ink jetting onto the bundled line structures.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: April 18, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Ping Mei, Tse Nga Ng, Gregory Whiting
  • Publication number: 20170090613
    Abstract: Touch user interfaces have been an essential element in the use of smartphones and tablets. An improved touch or near touch sensing structure made of a printed conductive double-wrapped coil is disclosed. A printable substrate is used to provide a base for the double-wrapped coil. On the printable substrate, a double-wrapped coil is printed using at least one flexible conductive material. The double-wrapped coils can be printed sequentially, simultaneously, parts of the two coils are printed and then the rest of the coil parts are printed, or any other useful printing order. The double-wrapped coil provides an increased sensing area and therefore can compute a more efficient capacitance.
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Ping Mei, Tse Nga Ng, Janos Veres
  • Publication number: 20170026722
    Abstract: A sensor network system that includes a sensor array having a plurality of sensor units that include a plurality of sensor elements, each sensor element configured to generate an electrical signal in response to a chemical environment in the vicinity of the sensor unit. The set of electrical signals generated by the sensor elements of the sensor unit represents a measured signature of the environment in the vicinity of the sensor unit. An analyzer is configured to extract the measured signatures of each sensor unit from sensor unit information signals and to detect a presence and concentration of one or more of the gases of interest based on the measured signatures.
    Type: Application
    Filed: July 23, 2015
    Publication date: January 26, 2017
    Inventors: David E. Schwartz, Tse Nga Ng, Gregory Whiting, Anurag Ganguli, George Daniel
  • Patent number: 9543495
    Abstract: A method of forming a flexible thermal regulation device having multiple functional layers. The layers of the device are formed using various manufacturing techniques and are then integrated to form a sheet having multiple devices disposed thereon. The individual devices are then formed from the sheet.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: January 10, 2017
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: John Steven Paschkewitz, Corie Lynn Cobb, David Mathew Johnson, Gabriel Iftime, Victor Alfred Beck, Tse Nga Ng, Ranjeet Rao
  • Publication number: 20160379703
    Abstract: A memory circuit has a ferroelectric memory cell having a word line and a bit line, an input transistor connected to the bit line, a gain element electrically connected the bit line, wherein the gain element includes a feedback capacitor, and an output terminal. A method of reading a memory cell includes applying a voltage to a word line of the memory cell, causing charge to transfer from the memory cell to a feedback capacitor, generating a voltage, amplifying the voltage by applying a gain having a magnitude of less than three, sensing an output voltage at an output node to determine a state of the memory cell, and storing the memory state in a latch.
    Type: Application
    Filed: June 23, 2015
    Publication date: December 29, 2016
    Inventors: DAVID ERIC SCHWARTZ, TSE NGA NG, PING MEI
  • Publication number: 20160336849
    Abstract: A voltage multiplier includes a supply voltage, at least two multiplier stages electrically connected together, each stage having a trigger voltage terminal, an input terminal, an output terminal, and a capacitor, and each stage connected to the supply voltage, an input stage electrically connected to a first of the at least two multiplier stages, and an output stage electrically connected to a final of the at least two multiplier stages.
    Type: Application
    Filed: May 11, 2015
    Publication date: November 17, 2016
    Inventors: David Eric Schwartz, Tse Nga NG
  • Patent number: 9486996
    Abstract: A process including selecting a printing system; selecting an ink composition having ink properties that match the printing system; depositing the ink composition onto a substrate to form an image, to form deposited features, or a combination thereof; optionally, heating the deposited features to form conductive features on the substrate; and performing a post-printing treatment after depositing the ink composition.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: November 8, 2016
    Assignees: Xerox Corporation, Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Brent S. Krusor, Adela Goredema, Yiliang Wu
  • Publication number: 20160314881
    Abstract: A sensor including a sensing element comprising conductive features formed on a substrate; wherein the conductive features have been formed from a palladium complex ink composition that has been deposited onto the substrate to form the deposited features and wherein the deposited features have been heated to form the conductive features on the substrate. A method including disposing a palladium complex ink composition onto a substrate to form deposited features; and heating the deposited features to form conductive features on the substrate. A strain gauge sensor including a sensing element comprising conductive features formed on a substrate; wherein the conductive features conform to a two dimensional substrate surface; or wherein the conductive features conform to a three dimensional substrate surface.
    Type: Application
    Filed: April 21, 2015
    Publication date: October 27, 2016
    Inventors: Tse Nga Ng, Sivkheng Kor, Yiliang Wu
  • Patent number: 9451706
    Abstract: A system and method is used to optimize print parameters in the printing of functional electronic materials and integrated objects. The method employs a grid pattern to determine drop spacing and further assigns priority to various features to be printed, separating features into layers to be printed. The most critical layers being printed with higher resolution and greater accuracy, the less critical layers being printed at lower resolution.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: September 20, 2016
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Ping Mei, Steven E. Ready
  • Patent number: 9437804
    Abstract: An electroactive polymer structure includes a first flexible electrode, a second flexible electrode, and a polymer dielectric layer with ionic liquid on top of the first electrode including at least two regions. Each region of the polymer dielectric layer includes a different ionic liquid concentration. The polymer dielectric layer is in between the first flexible electrode and the second flexible electrode.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: September 6, 2016
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, Kye-Si Kwon