Patents by Inventor Tse Nga Ng

Tse Nga Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8872224
    Abstract: A low-cost neutron detector is formed on a substrate includes a sensor formed by an active material layer sandwiched between two electrodes, and a neutron capture layer formed in close proximity to (i.e., over and/or under) the sensor. The sensor active material layer includes a bulk heterojunction or bilayer structure that is formed by depositing particulate solutions incorporating at least one type of high atomic number nanoparticle using low-temperature (i.e., below 400° C.) solution processing techniques. The sensor electrode material and neutron capture material are similarly disposed in associated solutions (e.g., conductive inks) that are also deposited using low-temperature solution processing techniques, whereby the fabrication process can be carried out on low-cost flexible substrate material (e.g., PET) using high efficiency roll-to-roll production techniques.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 28, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Gregory L. Whiting, Tse Nga Ng, Janos Veres, Robert A. Street
  • Publication number: 20140272121
    Abstract: A replica 3D structure is fabricated inside a multi-layered mold by patterning each mold layer to define a void/opening that matches a corresponding cross section of the structure's peripheral surface, and filling the patterned opening of each layer with a structural material (i.e., before depositing a subsequent layer of mold material). The mold material (e.g., photoresist or another dissolvable sacrificial material) is blanket deposited (e.g., by slot-die, spray coating) and then patterned using a laser or a printed mask. Each layer of modeling material (e.g., polymer, ceramic or metal, or a combination thereof) is electro-plated or otherwise deposited on the previously formed modeling material layer. High vertical resolution is achieved by utilizing relatively thin mold layers. The mold layer deposition, patterning and modeling material deposition is repeated until the replica 3D structure is entirely formed inside the multi-layered mold, and then the mold is dissolved or otherwise removed.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, JengPing Lu, Eugene M. Chow, Timothy David Stowe, Janos Veres, Philipp H. Schmaelzle
  • Publication number: 20140264436
    Abstract: A low-cost neutron detector is formed on a substrate includes a sensor formed by an active material layer sandwiched between two electrodes, and a neutron capture layer formed in close proximity to (i.e., over and/or under) the sensor. The sensor active material layer includes a bulk heterojunction or bilayer structure that is formed by depositing particulate solutions incorporating at least one type of high atomic number nanoparticle using low-temperature (i.e., below 400° C.) solution processing techniques. The sensor electrode material and neutron capture material are similarly disposed in associated solutions (e.g., conductive inks) that are also deposited using low-temperature solution processing techniques, whereby the fabrication process can be carried out on low-cost flexible substrate material (e.g., PET) using high efficiency roll-to-roll production techniques.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: Palo Alto Research Center Incorporated
    Inventors: Gregory L. Whiting, Tse Nga Ng, Janos Veres, Robert A. Street
  • Publication number: 20140124742
    Abstract: Multiple thin film transistors are aligned in serial and parallel orientation. A second source region is disposed between a first source region and a first drain region. A second drain region is disposed between the first source region and the first drain region. The second drain region and the second source region substantially coincide. A first gate is disposed between the first source region and the coinciding second source and second drain regions. A second gate region is disposed between the first drain region and the coinciding second source and second drain regions. An semiconductor is disposed between the first source region, the first drain region, and the coinciding second source and second drain regions. A dielectric material is disposed between the semiconductor substrate and the first and second gates.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, David Eric Schwartz, Janos Veres
  • Patent number: 8680401
    Abstract: A printed circuit is produced with a base circuit and a number of optional circuit elements. One or more of the optional circuit elements may be added to the base circuit to determine or change the characteristics of the base circuit. Alternatively, one or more of the optional circuit elements may be removed from the base circuit to determine or change the characteristics of the base circuit. The base circuit and optional circuit elements may be printed on a single substrate. Mechanisms may be provided to facilitate the separation of the optional elements form the substrate either to introduce them into the base circuit or remove them from the base circuit to change the characteristics of the base circuit. A simple, low-cost, robust, and easy to use base circuit and optional circuit element is provided.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: March 25, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Jurgen H. Daniel, Ana Claudia Arias, Brent Krusor
  • Publication number: 20140078690
    Abstract: Systems and methods are disclosed that include electrically connecting multiple electrical components via an electrical connection that extends through a common conductor substrate. The electrical components are bonded or otherwise secured to the common conductor substrate and the electrical connection extends between the multiple electrical components. The multiple electrical components may be components fabricated by different methods, such as photolithography and printed circuitry, and may be of different heights. The common conductor substrate is stretchable and may be a mesh configuration is some examples.
    Type: Application
    Filed: September 18, 2012
    Publication date: March 20, 2014
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Leah Lavery, Tse Nga Ng
  • Patent number: 8624753
    Abstract: An event sensor device comprises a detector and circuitry, connected thereto, produced by printed electronics processes. This circuitry may be comprised of fixed characteristic devices, such as a series resistive chain, or variable characteristic devices such as thin film transistors (TFTs) and the like. A pulse is input to the printed electronic circuitry. The printed electronic circuitry divides the pulse across the various devices comprising the circuitry according to pulse amplitude and pulse width. The circuitry provides an output signal which is provided to a plurality of display elements, which are capable of indicating the division performed at the printed electronic circuitry. In one embodiment, each display element is an electrophoretic display which changes contrast as a function of the applied voltage. Not only the pulse amplitude and pulse width, but the number of pulses applied to the printed circuitry (i.e., sensed by the detector) may be indicated.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: January 7, 2014
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Tse Nga Ng
  • Publication number: 20130277729
    Abstract: A floating gate transistor, comprising source and drain electrodes covered by a first dielectric separated by a channel, a floating gate electrode on the first dielectric arranged over the channel, an interlayer at least partially comprised of a semiconductor material and an organic material, and a control gate on the interlayer electrically coupled to the gate electrode.
    Type: Application
    Filed: April 20, 2012
    Publication date: October 24, 2013
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, Janos Veres
  • Publication number: 20130239346
    Abstract: A toothbrush assembly can include a plurality of bristles and a toothbrush body. The toothbrush body can include an indicator to provide information to a user using the toothbrush during a teeth cleaning session. The indicator can operate independent of any power supply external to the toothbrush assembly. A sensing mechanism can provide an electric signal to the indicator responsive to the user using the toothbrush assembly during the teeth cleaning session. An energy scavenging mechanism can provide operating power to the indicator responsive to the user using the toothbrush assembly during the teeth cleaning session.
    Type: Application
    Filed: March 14, 2012
    Publication date: September 19, 2013
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: John C. Knights, Tse Nga Ng
  • Publication number: 20120326149
    Abstract: In transistor structures such as thin film transistors (TFTs) in an array of cells, a layer of semiconducting oxide material that includes a channel is protected by a protective layer that includes low-temperature encapsulant material. The semiconducting oxide material can be a transition metal oxide material such as zinc oxide, and can be in an active layered substructure that also includes channel end electrodes. The low-temperature encapsulant can, for example, be an organic polymer such as poly(methyl methacrylate) or parylene, deposited on an exposed region of the oxide layer such as by spinning, spincasting, evaporation, or vacuum deposition or an inorganic polymer deposited such as by spinning or liquid deposition. The protective layer can include a lower sublayer of low-temperature encapsulant on the exposed region and an upper sublayer of inorganic material on the lower sublayer. For roll-to-roll processing, a mechanically flexible, low-temperature substrate can be used.
    Type: Application
    Filed: September 4, 2012
    Publication date: December 27, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, Michael L. Chabinyc
  • Patent number: 8300125
    Abstract: A method and apparatus for using TFT transistors or MIS capacitors as light-sensing elements in charge mapping arrays. A bias stress may be applied to a plurality of pixels in a charge map array. As a result, charge carriers may be trapped in each of the plurality of pixels responsive to the bias stress, which may be observed as a value shift such as a threshold voltage VT shift. Light may then be transmitted toward the plurality of pixels in the charge map array causing some of the pixels to absorb the light. The trapped charge carriers are released in the pixels that absorbed the light and not released in the pixels that did not absorb the light. The value shift in each of the pixels can be compared to determine which of the pixels absorbed the light.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: October 30, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Sanjiv Sambandan, William S. Wong
  • Patent number: 8283655
    Abstract: In layered structures, channel regions and light-interactive regions can include the same semiconductive polymer material, such as with an organic polymer. A light-interactive region can be in charge-flow contact with a contacting electrode region, and a channel region can, when conductive, provide an electrical connection between the contacting electrode region and other circuitry. For example, free charge carriers can be generated in the light-interactive region, resulting in a capacitively stored signal level; the signal level can be read out to other circuitry by turning on a transistor that includes the channel region. In an array of photosensing cells with organic thin film transistors, an opaque insulating material can be patterned to cover a data line and channel regions of cells along the line, but not extend entirely over the cells' light-interactive regions.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: October 9, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Michael L. Chabinyc, Tse Nga Ng
  • Patent number: 8258021
    Abstract: In transistor structures such as thin film transistors (TFTs) in an array of cells, a layer of semiconducting oxide material that includes a channel is protected by a protective layer that includes low-temperature encapsulant material. The semiconducting oxide material can be a transition metal oxide material such as zinc oxide, and can be in an active layered substructure that also includes channel end electrodes. The low-temperature encapsulant can, for example, be an organic polymer such as poly(methyl methacrylate) or parylene, deposited on an exposed region of the oxide layer such as by spinning, spin-casting, evaporation, or vacuum deposition or an inorganic polymer deposited such as by spinning or liquid deposition. The protective layer can include a lower sublayer of low-temperature encapsulant on the exposed region and an upper sublayer of inorganic material on the lower sublayer. For roll-to-roll processing, a mechanically flexible, low-temperature substrate can be used.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: September 4, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Tse Nga Ng, Michael L. Chabinyc
  • Patent number: 8247883
    Abstract: An embodiment is a method and apparatus to construct a shielded cable, wire, or circuit. A first insulator layer is deposited on a first conductor or semiconductor layer. A second conductor or semiconductor layer is deposited on the first insulator layer. A second insulator layer is deposited on the first insulator layer. The second insulator layer covers the second conductor or semiconductor layer and defines a shielded region. A third conductor or semiconductor layer is deposited on the first conductor or semiconductor layer. The third conductor or semiconductor layer covers the first and second insulator layers. At least one of the first, second, and third conductor or semiconductor layers, and the first and second insulator layers is deposited by printing.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: August 21, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Jurgen H. Daniel, Tse Nga Ng
  • Publication number: 20120154503
    Abstract: An interactive card or the like employs a piezoelectric charge generator (piezo-strip) for temporarily driving an indicator. The piezo-strip may be displaced (bent) in order to generate charge to drive the indicator. Printed electronic processes are utilized to produce the indicator and/or the piezoelectric charge generator The need for a printed battery or supplemental power source is obviated. The card may carry printed indicia which corresponds to the states of the indicator (e.g., indication of a test answer selection). Multiple display elements and selector switches may provide multiple indicator states. Multiple piezo-strips may provide a selection function as well as a rest function. Applications include business cards, greeting cards and novelty items, toys and games, advertising and promotions, testing and education, sensors, and so forth.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 21, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Jurgen H. Daniel, Tse Nga Ng
  • Publication number: 20120154349
    Abstract: An interactive card or the like employs a piezoelectric charge generator (piezo-strip) for temporarily driving an indicator. The piezo-strip may be displaced (bent) in order to generate charge to drive the indicator. Printed electronic processes are utilized to produce the indicator and/or the piezoelectric charge generator The need for a printed battery or supplemental power source is obviated. The card may carry printed indicia which corresponds to the states of the indicator (e.g., indication of a test answer selection). Multiple display elements and selector switches may provide multiple indicator states. Multiple piezo-strips may provide a selection function as well as a rest function. Applications include business cards, greeting cards and novelty items, toys and games, advertising and promotions, testing and education, sensors, and so forth.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 21, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Jurgen H. Daniel, Tse Nga Ng
  • Publication number: 20120146463
    Abstract: A printed circuit is produced with a base circuit and a number of optional circuit elements. One or more of the optional circuit elements may be added to the base circuit to determine or change the characteristics of the base circuit. Alternatively, one or more of the optional circuit elements may be removed from the base circuit to determine or change the characteristics of the base circuit. The base circuit and optional circuit elements may be printed on a single substrate. Mechanisms may be provided to facilitate the separation of the optional elements form the substrate either to introduce them into the base circuit or remove them from the base circuit to change the characteristics of the base circuit. A simple, low-cost, robust, and easy to use base circuit and optional circuit element is provided.
    Type: Application
    Filed: December 8, 2010
    Publication date: June 14, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Tse Nga Ng, Jurgen H. Daniel, Ana Claudia Arias, Brent Krusor
  • Patent number: 8198127
    Abstract: A memory cell array including a data line; a capacitor; and a transistor coupled between the data line and the capacitor. At least one of the capacitor and the transistor includes a material with a mutable electrical characteristic. A memory cell array including a first transistor coupled between a first node, a second node, and a third node; and a second transistor coupled between the second node and a fourth node. The first transistor includes a material with a mutable electrical characteristic.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: June 12, 2012
    Assignee: Palo Alto Research Center Incorporated
    Inventors: William S. Wong, Sanjiv Sambandan, Tse Nga Ng, Robert A. Street
  • Publication number: 20120092181
    Abstract: An event sensor device comprises a detector and circuitry, connected thereto, produced by printed electronics processes. This circuitry may be comprised of fixed characteristic devices, such as a series resistive chain, or variable characteristic devices such as thin film transistors (TFTs) and the like. A pulse is input to the printed electronic circuitry. The printed electronic circuitry divides the pulse across the various devices comprising the circuitry according to pulse amplitude and pulse width. The circuitry provides an output signal which is provided to a plurality of display elements, which are capable of indicating the division performed at the printed electronic circuitry. In one embodiment, each display element is an electrophoretic display which changes contrast as a function of the applied voltage. Not only the pulse amplitude and pulse width, but the number of pulses applied to the printed circuitry (i.e., sensed by the detector) may be indicated.
    Type: Application
    Filed: October 19, 2010
    Publication date: April 19, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Jurgen H. Daniel, Tse Nga Ng
  • Publication number: 20120092182
    Abstract: A method for event sensing employs an event sensor comprising a detector and circuitry, connected thereto, produced by printed electronics processes. Operation may rely on fixed characteristic devices, such as a series resistive chain, or variable characteristic devices such as thin film transistors (TFTs) and the like. A pulse is input to the printed electronic circuitry. The printed electronic circuitry divides the pulse across the various devices comprising the circuitry according to pulse amplitude and pulse width. The circuitry provides an output signal which is provided to a plurality of display elements capable of indicating the division performed at the printed electronic circuitry. In one embodiment, each display element is an electrophoretic display which changes contrast as a function of the applied voltage. Not only the pulse amplitude and pulse width, but the number of pulses applied to the printed circuitry (i.e., sensed by the detector) may be indicated.
    Type: Application
    Filed: October 19, 2010
    Publication date: April 19, 2012
    Applicant: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Jurgen H. Daniel, Tse Nga Ng