Patents by Inventor Tsutomu Sato

Tsutomu Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7148543
    Abstract: A semiconductor chip includes a base substrate, a bulk device region having a bulk growth layer on a part of the base substrate, an SOI device region having a buried insulator on the base substrate and a silicon layer on the buried insulator, and a boundary layer located at the boundary between the bulk device region and the SOI device region. The bulk device region has a first device-fabrication surface in which a bulk device is positioned on the bulk growth layer. The SOI device region has a second device-fabrication surface in which an SOI device is positioned on the silicon layer. The first and second device-fabrication surfaces are positioned at a substantially uniform level.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: December 12, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Yamada, Hajime Nagano, Ichiro Mizushima, Tsutomu Sato, Hisato Oyamatsu, Shinichi Nitta
  • Patent number: 7145215
    Abstract: A semiconductor device includes a semiconductor substrate, cavities, and an element isolating region. The cavities, which are each shaped like a flat plate, are made in the semiconductor substrate. The element isolating region is formed in the surface of the semiconductor substrate and located at the sides of the cavities.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: December 5, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazumi Inoh, Hidemi Ishiuchi, Satoshi Matsuda, Ichiro Mizushima, Tsutomu Sato
  • Patent number: 7135724
    Abstract: A field effect transistor (“FET”) is provided which includes a gate stack overlying a single-crystal semiconductor region of a substrate, a pair of first spacers disposed over sidewalls of said gate stack, and a pair of regions consisting essentially of a single-crystal semiconductor alloy which are disposed on opposite sides of the gate stack. Each of the semiconductor alloy regions is spaced a first distance from the gate stack. The source region and drain region of the FET are at least partly disposed in respective ones of the semiconductor alloy regions, such that the source region and the drain region are each spaced a second distance from the gate stack by a first spacer of the pair of first spacers, the second distance being different from the first distance.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: November 14, 2006
    Assignees: International Business Machines Corporation, Kabushiki Kaisha Toshiba
    Inventors: Huajie Chen, Dureseti Chidambarrao, Sang-Hyun Oh, Siddhartha Panda, Werner A. Rausch, Tsutomu Sato, Henry K. Utomo
  • Publication number: 20060251112
    Abstract: A transmission side apparatus selectively inserts video stream data and MPEG data into a video storage area to store video stream data in a frame structure of an SDI system and generates SDI data of which the identification ID indicating a type of data included therein by an SDI data insertion processing device and transmits the SDI data to a coaxial cable from a transmission interface device. A reception side apparatus receives the SDI data transmitted via the coaxial cable by a reception interface device, extracts data to be transmitted from a video storage area of received SDI data and determines whether the data to be transmitted is the video stream data or the MPEG data by an SDI data extraction processing device to output it. Therefore, a high-speed MPEG data transmission assuring frame/field accuracy becomes possible by using an existing technology and device.
    Type: Application
    Filed: March 9, 2006
    Publication date: November 9, 2006
    Inventor: Tsutomu Sato
  • Publication number: 20060234478
    Abstract: A method of manufacturing a semiconductor device substrate includes forming a mask layer pattern on a semiconductor layer insulated from a surface of a semiconductor substrate by an electrically insulating layer, etching the semiconductor layer according to the pattern of the mask layer to form a trench leading to the insulating layer, etching a protective layer on the semiconductor substrate having a thickness less than the thickness of the insulating layer to form a sidewall protective film which covers a side surface of the trench, etching the insulating layer from a bottom surface of the trench to the semiconductor substrate; and growing a single-crystalline layer from the surface of the semiconductor substrate exposed as a result of etching the insulating layer.
    Type: Application
    Filed: June 20, 2006
    Publication date: October 19, 2006
    Inventors: Hajime Nagano, Takashi Yamada, Tsutomu Sato, Ichiro Mizushima, Hisato Oyamatsu
  • Publication number: 20060222998
    Abstract: There is provided a positive photosensitive composition which requires no burning, makes it possible to obtain necessary and sufficient adhesion when it is applied under a humidity of 25 to 60%, can be developed at a low alkali intensity, makes it possible to carry out development with keeping high sensitivity while forming no residue, ensures sharp edges, can provide a very hard resist film and is improved in scratch resistance in the handling before development. The positive photosensitive composition comprises, as essential components, (A) a high molecular substance having at least one carboxyl group in a molecule and (B) a photo-thermal conversion material that absorbs infrared rays from an image exposure light source to convert them into heat.
    Type: Application
    Filed: June 25, 2004
    Publication date: October 5, 2006
    Inventor: Tsutomu Sato
  • Publication number: 20060203675
    Abstract: To provide a recording and reproducing method for dye-based recordable DVD media, including: recording a mark of the shortest length on a dye-containing recording layer of a dye-based recordable DVD medium using single pulse whose front edge is energized; recording marks other than the shortest thereon using single pulse whose front and rear edges are energized for a given duration, the power of the front edge of pulse being equal to that of the front edge of pulse for the shortest mark, the power of the rear edge of pulse being equal to that of the rear edge of pulse for the shortest mark; and reproducing recorded information using a reproduction beam, wherein the irradiation intensity of cooling pulse provided after the rear edge of pulse upon mark recording is 0.1 mW or less for a given duration, and the recording linear velocity is 42 m/s or more.
    Type: Application
    Filed: March 8, 2006
    Publication date: September 14, 2006
    Inventors: Tatsuya Tomura, Tsutomu Sato, Yasunobu Ueno, Soh Noguchi
  • Publication number: 20060164946
    Abstract: The object of the present invention is to provide an optical recording and reproducing method for a dye-based recordable optical recording medium includes recording shortest marks on an organic dye recording layer formed on a substrate having a guide groove with a wobble formed thereon using one pulse which is more highly energized than pulses of each of marks other than the shortest marks; recording each of the third shortest marks and still longer marks using one pulse beam of which the rear edge is energized for a given length of time, and the energized pulse power is equal to the pulse power of each of the second shortest marks, and irradiating cooling pulses onto the backwards of the respective pulse beams of all the marks during recording at an optical energy of 0.1 mW or less for a given length of time, and provide an apparatus for the same.
    Type: Application
    Filed: February 27, 2006
    Publication date: July 27, 2006
    Inventors: Tatsuya Tomura, Tsutomu Sato, Yasunobu Ueno, Soh Noguchi
  • Publication number: 20060157789
    Abstract: A semiconductor device includes a semiconductor substrate, cavities, and an element isolating region. The cavities, which are each shaped like a flat plate, are made in the semiconductor substrate. The element isolating region is formed in the surface of the semiconductor substrate and located at the sides of the cavities.
    Type: Application
    Filed: December 22, 2005
    Publication date: July 20, 2006
    Inventors: Kazumi Inoh, Hidemi Ishiuchi, Satoshi Matsuda, Ichiro Mizushima, Tsutomu Sato
  • Patent number: 7075169
    Abstract: A hollow region is formed in a silicon substrate. A plurality of openings formed in the silicon layer on the hollow region is filled with a buried film. The bottom portion of the hollow region is formed with a plurality of silicon pillars, which support the silicon layer.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: July 11, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiro Minami, Takashi Yamada, Yusuke Kohyama, Tsutomu Sato, Hajime Nagano
  • Patent number: 7071039
    Abstract: A semiconductor device includes a first semiconductor region having a buried oxide layer formed therein, a second semiconductor region in which the buried oxide layer does not exist, a trench formed to such a depth as to reach at least the buried oxide layer in a boundary portion between the first and second semiconductor regions, and an isolation insulating layer buried in the trench.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: July 4, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nagano, Takashi Yamada, Tsutomu Sato, Ichiro Mizushima, Osamu Fujii
  • Publication number: 20060131651
    Abstract: To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.
    Type: Application
    Filed: January 27, 2006
    Publication date: June 22, 2006
    Inventors: Tsutomu Sato, Mie Matsuo, Ichiro Mizushima, Yoshitaka Tsunashima, Shinichi Takagi
  • Patent number: 7050204
    Abstract: An optical reading apparatus and a multifunction-type image forming apparatus, with a minimized thickness in a cabinet height direction and a housing shaped along an upper shape of discharge tray of the image forming apparatus provided thereunder. The optical reading apparatus comprises: platen glass defined with one end and the other end, on an upper surface of which an original document is placed; an optical reading unit that translates between the both ends on a lower surface of the platen glass, for obtaining image data by irradiating an original document surface with light through the platen glass; a control circuit board connected to the optical reading unit, for processing an electric signal; and a housing wherein a side on the side of the other end is thicker than a side on the side of the one end.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: May 23, 2006
    Assignees: Nisca Corporation, Toshiba Tec Kabushiki Kaisha
    Inventors: Tsutomu Sato, Ryusuke Yamaguchi, Yusuke Hashizume, Kazuyoshi Tsutsumi, Yutaka Hayano, Hiroshi Maejima, Junya Ozawa
  • Publication number: 20060088464
    Abstract: A new compound represented by a composition formula Fe8O8 (OH)8-2x((SO4)a, (HPO4)b)x (a+b=x, 1?x?1.75, 0<a?1.658, 0.092?b?x) formed by adding a shwertmannite of a composition formula Fe8O8(OH)8-2x(SO4)x (1?x?1.75) to a phosphoric acid solution of a pH value of 2-9 thereby achieving a stabilization by an adsorption of phosphoric acid, shows a very firm stabilization under conditions of 0<a?1.253 and 0.497?b?x. The new compound has a high stability, can maintain a high adsorbing ability for arsenic and the like and a cleaning level for a necessary period or semi-permanently, and can adsorb arsenic and the like in polluted water or polluted soil.
    Type: Application
    Filed: February 3, 2004
    Publication date: April 27, 2006
    Inventors: Hodaka Ikeda, Kenichi Ito, Naoko Akita, Tsutomu Sato, Keisuke Fukushi
  • Publication number: 20060065914
    Abstract: A field effect transistor (“FET”) is provided which includes a gate stack overlying a single-crystal semiconductor region of a substrate, a pair of first spacers disposed over sidewalls of said gate stack, and a pair of regions consisting essentially of a single-crystal semiconductor alloy which are disposed on opposite sides of the gate stack. Each of the semiconductor alloy regions is spaced a first distance from the gate stack. The source region and drain region of the FET are at least partly disposed in respective ones of the semiconductor alloy regions, such that the source region and the drain region are each spaced a second distance from the gate stack by a first spacer of the pair of first spacers, the second distance being different from the first distance.
    Type: Application
    Filed: September 29, 2004
    Publication date: March 30, 2006
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Huajie Chen, Dureseti Chidambarrao, Sang-Hyun Oh, Siddhartha Panda, Werner Rausch, Tsutomu Sato, Henry Utomo
  • Patent number: 7019365
    Abstract: A semiconductor device according to an aspect of the present invention comprises a first semiconductor layer and a plurality of second semiconductor layers. The first semiconductor layer is formed in a first region of a semiconductor substrate with one of an insulating film and a cavity interposed between the semiconductor substrate and the first semiconductor layer. The plurality of second semiconductor layers is formed in second regions of the semiconductor substrate.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: March 28, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsutomu Sato, Hajime Nagano, Ichiro Mizushima, Takashi Yamada, Yuso Udo, Shinichi Nitta
  • Patent number: 7018981
    Abstract: The present invention aims to provide cyclic peptide derivatives having motilin receptor antagonist activity and are useful as pharmaceuticals. The present invention provides compounds of general formula (1): wherein R1 represents an optionally substituted phenyl group or the like; R2 represents an amino group or the like; R3 to R6 represent a hydrogen atom, a methyl group or the like; R7 represents a hydrogen atom or the like; V to Z represent a carbonyl group or a methylene group; m represents an integer of 0–2; and n represents an integer of 0–3; or a hydrate or a pharmaceutically acceptable salt thereof.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: March 28, 2006
    Assignee: Chugai Seiyaku Kabushiki Kaisha
    Inventors: Hiroharu Matsuoka, Tsutomu Sato
  • Patent number: 7018904
    Abstract: A semiconductor chip comprises a base substrate, a bulk device region having a bulk growth layer on a part of the base substrate, an SOI device region having a buried insulator on the base substrate and a silicon layer on the buried insulator, and a boundary layer located at the boundary between the bulk device region and the SOI device region. The bulk device region has a first device-fabrication surface in which a bulk device is positioned on the bulk growth layer. The SOI device region has a second device-fabrication surface in which an SOI device is positioned on the silicon layer. The first and second device-fabrication surfaces are positioned at a substantially uniform level.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: March 28, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Yamada, Hajime Nagano, Ichiro Mizushima, Tsutomu Sato, Hisato Oyamatsu, Shinichi Nitta
  • Patent number: 7019364
    Abstract: To change a plurality of trenches to one flat empty space by two-dimensionally forming the trenches on the surface of a semiconductor substrate and then applying heat treatment to the semiconductor substrate.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: March 28, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsutomu Sato, Mie Matsuo, Ichiro Mizushima, Yoshitaka Tsunashima, Shinichi Takagi
  • Publication number: 20060062117
    Abstract: An object is to provide a recording and reproducing method of a dyestuff-based, write-once DVD medium which can obtain a good recording waveform at a time of carrying out high linear speed recording. To this end, there are provided a recording and reproducing method and a recording and reproducing apparatus of a dyestuff-based, write-once DVD medium in which each mark other than a shortest length mark is recorded on a recording layer at an optical recording medium formed by having at least a recording layer containing an organic dyestuff on a substrate having a guide groove at which a high-frequency wobble is provided, by using one pulse light at which two places which are a leading portion and a trailing end portion of a heating pulse are made to be high-output for a given time and at which a pulse light power of the leading portion of the heating pulse is greater than a pulse light power of the trailing end portion, and the recording is reproduced by reproducing light.
    Type: Application
    Filed: September 23, 2005
    Publication date: March 23, 2006
    Inventors: Soh Noguchi, Tsutomu Sato, Tatsuya Tomura, Yasunobu Ueno