Patents by Inventor Tue Nguyen

Tue Nguyen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6281589
    Abstract: A system and method of selectively etching copper surfaces free of copper oxides in preparation for the deposition of an interconnecting metallic material is provided. The method removes metal oxides with &bgr;-diketones, such as Hhfac. The Hhfac is delivered into the system in vapor form, and reacts almost exclusively to copper oxides. The by-products of the cleaning process are likewise volatile for removal from the system with a vacuum pressure. Since the process is easily adaptable to most IC process systems, it can be conducted in an oxygen-free environment, without the removal of the IC from the process chamber. The in-situ cleaning process permits a minimum amount of copper oxide to reform before the deposition of the overlying interconnection metal. In this manner, a highly conductive electrical interconnection between the copper surface and the interconnecting metal material is formed.
    Type: Grant
    Filed: March 15, 1999
    Date of Patent: August 28, 2001
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Tue Nguyen, Lawrence J. Charneski, David R. Evans, Sheng Teng Hsu
  • Patent number: 6274421
    Abstract: A MOS transistor is formed on a single crystal silicon substrate doped to form a conductive layer of a first type, and includes: an active region formed on said substrate; a source region and a drain region located in said active region, doped to form conductive channels of a second type; a metal gate region located in said active region between said source region and said drain region, wherein said metal gate has a width of less than one micron; a gate oxide region located over said gate region; an oxide region located over the structure; and a source electrode, a gate electrode and a drain electrode, each connected to their respective regions, and each formed of a combination of a contact metal and an electrode metal. An alternate embodiment includes a pair of MOS transistors which have an interconnect between their gate electrodes and the drain electrode of one transistor and the drain electrode of the other transistor.
    Type: Grant
    Filed: January 9, 1998
    Date of Patent: August 14, 2001
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Sheng Teng Hsu, David R. Evans, Tue Nguyen
  • Publication number: 20010009154
    Abstract: A method is provided to clean the interior surfaces, and especially the wafer chuck, of a metal vapor deposition chamber. The method takes advantage of the fact that the chamber controls the introduction and removal of chemical atmospheres, and the temperature inside the chamber. The method first oxidizes the surface to be cleaned with an oxygen plasma, and then removes the oxide products as a vapor with the use of Hhfac. The oxidization is controlled through the use of oxygen atmosphere, temperature, and radio frequency power levels. In this manner, the wafer chuck is cleaned of deposition byproducts without disassembly of the chamber.
    Type: Application
    Filed: August 19, 1998
    Publication date: July 26, 2001
    Inventors: TUE NGUYEN, LAWRENCE J. CHARNESKI
  • Publication number: 20010009274
    Abstract: A Cu(hfac) precursor with a substituted phenylethylene ligand has been provided. The substituted phenylethylene ligand includes bonds to molecules selected from the group consisting of C1 to C6 alkyl, C1 to C6 haloalkyl, C1 to C6 phenyl, H and C1 to C6 alkoxyl. One variation, the &agr;-methylstyrene ligand precursor has proved to be stable a low temperatures, and sufficiently volatile at higher temperatures. Copper deposited with this precursor has low resistivity and high adhesive characteristics. A synthesis method has been provided which produces a high yield of the above-described precursor.
    Type: Application
    Filed: March 28, 2001
    Publication date: July 26, 2001
    Inventors: Wei-Wei Zhuang, Tue Nguyen, Lawrence J. Charneski, David R. Evans, Sheng Teng Hsu
  • Patent number: 6245261
    Abstract: A Cub(hfac) precursor with a substituted phenylethylene ligand has been provided. The substituted phenylethylene ligand includes bonds to molecules selected from the group consisting of C1 to C6 alkyl, C1 to C6 haloalkyl, C1 to C6 phenyl, H and C1 to C6 alkoxyl. One variation, the &agr;-methylstyrene ligand precursor has proved to be stable a low temperatures, and sufficiently volatile at higher temperatures. Copper deposited with this precursor has low resistivity and high adhesive characteristics. A synthesis method has been provided which produces a high yield of the above-described precursor.
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: June 12, 2001
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Wei-Wei Zhuang, Tue Nguyen, Lawrence J. Charneski, David R. Evans, Sheng Teng Hsu
  • Patent number: 6221166
    Abstract: A multi-thermal zone shielding apparatus provides a multi-zone temperature profile for the shield while shielding a portion of a hot workpiece in a high temperature processing system. The apparatus keeps the workpiece temperature hot at the shielded area and maintaining the rest of the shield cooler. The apparatus comprises a multi-thermal zone shield having a low thermal transmitivity section for preventing the heat lost of the shielded portion of the hot workpiece due to less thermal energy transmitting through the shielding portion of the shield, thus maintaining a more uniform temperature at the shielded portion of the workpiece, and a high thermal transmitivity section in the rest of shield for allowing more thermal energy from the hot workpiece transmitting through the shield without heating the shield, thus maintaining a cooler temperature at the portion of the shield not engaged with the workpiece.
    Type: Grant
    Filed: June 7, 2000
    Date of Patent: April 24, 2001
    Assignee: Simplus Systems Corporation
    Inventors: Tue Nguyen, Craig Alan Bercaw
  • Patent number: 6218734
    Abstract: A method has been provided for improving the adhesion of Cu to a diffusion barrier material, such as TiN, in an integrated circuit substrate. The diffusion barrier material is exposed to either a reactive gas species, or a plasma containing a reactive gas. By removing contaminants on the surface of the diffusion barrier, and forming weak molecular bonds between the diffusion barrier surface and the reactive gas, the diffusion barrier surface is protected and prepared for Cu adhesion. Cu, breaking the bonds between the reactive gas and diffusion barrier surface, readily bonds to the diffusion material for improved adhesion between surfaces. The diffusion barrier surface, prepared with the reactive gas, allows the IC to be stored, delaying the Cu deposition to more convenient times in the IC fabrication process. An Cu conductor interface adhered to the diffusion barrier of an integrated circuit is also provided.
    Type: Grant
    Filed: February 9, 1999
    Date of Patent: April 17, 2001
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Lawrence J. Charneski, Tue Nguyen
  • Patent number: 6184157
    Abstract: A method has been provided to counteract the inherent tension in a deposited film. A wafer substrate is fixed to a wafer chuck having a curved surface. When the chuck surface is convex, a tensile stress is implanted in a deposited film. Upon release from the chuck, the deposited film develops a compressive stress. When the chuck surface is concave, a compressive stress is implanted in the deposited film. Upon release from the chuck, the deposited film develops a tensile stress. Loading a film with a compressive stress is helpful in making films having an inherently tensile stress become thermal stable. Stress loading is also used to improve adhesion between films, and to prevent warping of a film during annealing. A product-by-process using the above-described method is also provided.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: February 6, 2001
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Sheng Teng Hsu, Hongning Yang, David R. Evans, Tue Nguyen, Yanjun Ma
  • Patent number: 6111619
    Abstract: The invention provides a TFT LCD structure and method for using copper conductors on polycrystalline silicon TFTs. A top gate TFT architecture is employed with the copper sandwiched between layers of TiN. Conventional photolithographic and wet etch patterning is used for the copper and TiN conductors. Copper metal gates and source/drain electrodes are provided, yielding TFTs of a quality comparable to TFTs employing aluminum electrodes and conductors. A method of fabrication is also disclosed.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: August 29, 2000
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Shusheng He, Tue Nguyen
  • Patent number: 6090963
    Abstract: A metal(hfac), alkene ligand precursor has been provided. The alkene ligand includes double bonded carbon atoms, with first and second bonds to the first carbon atom, and third and fourth bonds to the second carbon atom. The first, second, third, and fourth bonds are selected from a the group consisting of H, C.sub.1 to C.sub.8 alkyl, C.sub.1 to C.sub.8 haloalkyl, and C.sub.1 to C.sub.8 alkoxyl. As a general class, these precursors are capable of high metal deposition rates and high volatility, despite being stable in the liquid phase at low temperatures. Copper deposited with this precursor has low resistivity and high adhesive characteristics. A synthesis method has been provided which produces a high yield of the above-described alkene ligand class of metal precursors.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: July 18, 2000
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Wei-Wei Zhuang, Tue Nguyen, Robert Barrowcliff, David Russell Evans, Sheng Teng Hsu
  • Patent number: 6090960
    Abstract: A method of applying chemical vapor deposition (CVD) copper (Cu) to integrated circuit substrates using a precursor with either a dimethoxymethylvinylsilane (dmomvs), or methoxydimethylvinylsilane (modmvs), silylolefin ligand bonded to (hfac)Cu is provided. The dmomvs ligand is able to provide the electrons of oxygen atoms from two methoxy groups to improve the bond between the ligand and the (hfac)Cu complex. The improved bond helps insure that the ligand separates from the (hfac)Cu complex at consistent temperatures when Cu is to be deposited. In situations where a precursor having a smaller molecular weight is desired, the modmvs ligand is used to provide electrons from the oxygen atom of the single methoxy group. In the preferred embodiment, water vapor is added to the volatile precursor to improve the conductivity of the deposited Cu.
    Type: Grant
    Filed: January 7, 1997
    Date of Patent: July 18, 2000
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Yoshihide Senzaki, Lawrence J. Charneski, Masato Kobayashi, Tue Nguyen
  • Patent number: 6043164
    Abstract: A method is provided for forming an intermediate level in an integrated circuit dielectric during a damascene process using a photoresist mask having an intermediate thickness. The method forms an interconnect to a first depth in the dielectric through an opening in the photoresist pattern. The photoresist profile is partially etched away in the area of the intermediate thickness to reveal a second dielectric surface area. The second dielectric surface area is then etched to a second depth less than the first depth. In this manner, vias can be formed to the first depth, and lines can be formed at a second depth to intersect the vias. The method of the present invention allows a dual damascene process to be performed with a single step of photoresist formation.
    Type: Grant
    Filed: June 10, 1996
    Date of Patent: March 28, 2000
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Tue Nguyen, Sheng Teng Hsu, Jer-shen Maa, Bruce Dale Ulrich, Chien-Hsiung Peng
  • Patent number: 6023102
    Abstract: A method of forming a direct, copper-to-copper, connection between levels in an IC is disclosed. The method involves the IC processes of conformal deposition and anisotropic etching. A via interconnection is formed by isotropically depositing a barrier material in a via through an insulator to a lower copper level, and then anisotropically etching the via to remove the barrier material covering the lower copper level. The anisotropic etch leaves the barrier material lining the via through the insulator. The subsequently deposited upper metal level then directly contacts the lower copper level when the via is filled. A dual damascene interconnection is formed by anisotropically depositing a non-conductive barrier material in the trench bottom. Then a via is formed with a conductive barrier lining the via sidewalls. An IC via interconnection structure and a dual damascene interconnection structure, made in accordance with the above described methods, are also provided.
    Type: Grant
    Filed: October 8, 1998
    Date of Patent: February 8, 2000
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Tue Nguyen, Sheng Teng Hsu
  • Patent number: 6020639
    Abstract: A method of using diluted nitric acid and an edge bead removal tool to remove copper from the perimeter of a semiconductor wafer is provided. In one embodiment, sensitive areas of the wafer are covered with photoresist, and the wafer perimeter cleared of photoresist, before the acid is applied. In another embodiment, sensitive areas of the wafer are protected with water spray as the copper etchant is applied. In a third embodiment, the nitric acid is applied to clear the wafer perimeter of copper before a chemical mechanical polishing (CMP) is performed on the layer of deposited copper. The excess thickness of copper protects copper interconnection structures from reacting with the copper etchant. All these methods permit copper to be removed at a low enough temperature that copper oxides are not formed. A semiconductor wafer cleaned of copper in accordance with the above-described method, and a system for low temperature copper removal is also provided.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: February 1, 2000
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Bruce Dale Ulrich, Tue Nguyen, Masato Kobayashi
  • Patent number: 6015918
    Abstract: A Cu(hfac) allyl-derived ligand precursor has been provided. The ligand includes group consisting of alkyl, phenyl, trialkylsilane, trialkoxylsilane, halodialkylsilane, dihaloalkylsilane, trihalosilane, triphenylsilane, alkoxyl, halogen, chloroformate, cynanide, cycloalkyl, cycloalkylamine, alkyl ether, isocyanate, and pentafluorobenzene. Examples of the allyl-derived ligand precursors have proved to be stable at room temperatures, and sufficiently volatile at higher temperatures. Copper deposited with this precursor has low resistivity and high adhesive characteristics. A synthesis method has been provided which produces a high yield of the above-described precursors, including a Cu(hfac)(allyltrimethylsilane) precursor.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: January 18, 2000
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Wei-Wei Zhuang, Tue Nguyen, Greg Michael Stecker, David Russell Evans, Sheng Teng Hsu
  • Patent number: 6002176
    Abstract: A method for selectively applying CVD copper to metallic surfaces, that are co-located with non-metallic surfaces, is provided. The method prepares both the metal and non-metallic surfaces with a low energy ion etch of an inert gas. The etching promotes the growth of copper on the metallic surface, and inhibits the growth on the non-metallic surface. Following an application of CVD copper, the surfaces are etched again to clean any residual copper from the non-metallic surface, and to again prepare the surfaces for another deposition of copper. Through repeated cycles of etching and copper deposition, the copper overlying the metallic surface is accumulated to achieve the desired thickness, while the non-metallic surface remains free of copper. A method is also provided for the selective deposition of copper on metallic surfaces to fill interconnects in damascene IC structures.
    Type: Grant
    Filed: August 17, 1998
    Date of Patent: December 14, 1999
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Tue Nguyen, Lawrence J. Charneski, Sheng Teng Hsu
  • Patent number: 5994571
    Abstract: A Cu(hfac) precursor with a substituted ethylene ligand has been provided. The substituted ethylene ligand includes bonds to molecules selected from the group consisting of C.sub.1 to C.sub.8 alkyl, C.sub.1 to C.sub.8 haloalkyl, H, and C.sub.1 to C.sub.8 alkoxyl. One variation, the 2-methyl-1-butene ligand precursor has proved to be stable at room temperature, and extremely volatile at higher temperatures. Copper deposited with this precursor has low resistivity and high adhesive characteristics. Because of the volatility, the deposition rate of copper deposited with this precursor is very high. A synthesis method has been provided which produces a high yield of the above-described precursor.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: November 30, 1999
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Wei-Wei Zhuang, Tue Nguyen, Lawrence J. Charneski, David Russell Evans, Sheng Teng Hsu
  • Patent number: 5948467
    Abstract: A method of enhancing copper adhesion to a substrate includes preparing a single-crystal silicon substrate; forming integrated circuit components on active areas of the substrate; metallizing the integrated circuit components, including metallizing a first copper layer by low-rate CVD, and metallizing a second copper layer by high-rate CVD; and finalizing construction of the structure.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: September 7, 1999
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Tue Nguyen, Lawrence J. Charneski, Masato Kobayashi
  • Patent number: 5939334
    Abstract: A system and method of selectively etching copper surfaces free of copper oxides in preparation for the deposition of an interconnecting metallic material is provided. The method removes metal oxides with .beta.-diketones, such as Hhfac. The Hhfac is delivered into the system in vapor form, and reacts almost exclusively to copper oxides. The by-products of the cleaning process are likewise volatile for removal from the system with a vacuum pressure. Since the process is easily adaptable to most IC process systems, it can be conducted in an oxygen-free environment, without the removal of the IC from the process chamber. The in-situ cleaning process permits a minimum amount of copper oxide to reform before the deposition of the overlying interconnection metal. In this manner, a highly conductive electrical interconnection between the copper surface and the interconnecting metal material is formed.
    Type: Grant
    Filed: May 22, 1997
    Date of Patent: August 17, 1999
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Tue Nguyen, Lawrence J. Charneski, David R. Evans, Sheng Teng Hsu
  • Patent number: 5936707
    Abstract: A method is providing for making a multi-level reticle which transmits a plurality of incident light intensities, which in turn, are used to form a plurality of thicknesses in a photoresist profile. A partially transmitting film, used as one of the layers of the reticle, is able to provide an intermediate intensity light. The intermediate intensity light has an intensity approximately midway between the intensity of the unattenuated light passing through the reticle substrate layer, and the totally attenuated light blocked by an opaque layer of the reticle. The exposed photoresist receives light at two intensities to form a via hole in the resist in response to the higher intensity light, and a connecting line to the via at an intermediate level of the photoresist in response to the intermediate light intensity. A method for forming the multi-level resist profile from the multi-level reticle is provided as well as a multi-level reticle apparatus.
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: August 10, 1999
    Assignees: Sharp Laboratories of America, Inc., Sharp Kabushiki Kaisha
    Inventors: Tue Nguyen, Bruce Dale Ulrich, David Russell Evans