Abstract: In part, the disclosure relates to an optical coupler. The optical coupler may include two ridge waveguides that include a first waveguide and a second waveguide. One or more segments of the two waveguides extend over a coupling length or other distance. One or more sections of each ridge waveguide is at least partially defined by a set of cross-sectional profiles, a plurality of sections of each ridge waveguide have a width that tapers along a length of the two ridge waveguides. Within the coupling length, a subset of the set of cross-sectional profiles may define a first pair of transition regions and a second pair of transition regions. The coupler may include a coupling region between the two ridge waveguides and spanning at least a section of the coupling length.

Abstract: In part, the disclosure relates to a photonic device that may include a curved waveguide that includes a plurality of layers; a curved elongate structure defining an upper surface, an inner elongate surface, and an outer elongate surface, the curved elongate structure comprising a first end, and a second end; and a ridge extending from the upper surface, the ridge having a first side and a second side; and a trench defined by one or more of the plurality of layers and the first side; the curved elongate structure defines a first elongate section and a second elongate section, wherein a first cross-section of the ridge has a first shape that substantially extends along the first elongate section of the structure, the first shape is defined by the first side and a step extending from the first side and above the bottom of the trench.

Abstract: Structures including an edge coupler and methods of fabricating a structure including an edge coupler. The structure includes a waveguide core region on a first dielectric layer, and a second dielectric layer on the waveguide core region and the first dielectric layer. The waveguide core region has a tapered section with an end surface that terminates adjacent to an edge of the first dielectric layer. The second dielectric layer includes a first trench and a second trench that are each positioned adjacent to the tapered section of the waveguide core region.

Abstract: Structures for managing light polarization on a photonics chip and methods of forming a structure for managing light polarization on a photonics chip. A single-mode waveguiding structure is formed that includes a first waveguide core region and a second waveguide core region positioned above the first waveguide core region. The second waveguide core region includes a first section, a second section connected to the first section, and a third section connected to the second section. The second section has a first width at an intersection with the first section and a second width at an intersection with the third section. The second width is greater than the first width. The first and second waveguide core regions contain materials of different composition.

Abstract: One illustrative backscattering generator disclosed herein includes a low-reflection waveguide structure, a slot waveguide structure comprising a first waveguide, a second waveguide and a slot located between the first waveguide and the second waveguide, and a variable direction coupler operatively coupled to the low-reflection waveguide structure and the slot waveguide structure.

Abstract: Structures for polarization filtering and methods of forming a structure for polarization filtering. A waveguiding structure has a first waveguide core region including a first plurality of bends, a second waveguide core region including a second plurality of bends laterally spaced from the first plurality of bends by a gap, and a third waveguide core region including a third plurality of bends positioned beneath the gap. The first waveguide core region and the second waveguide core region contain a first material. The third waveguide core region contains a second material that differs in composition from the first material.

Abstract: Structures including an edge coupler and methods of fabricating a structure including an edge coupler. The structure includes a waveguide core region on a first dielectric layer, and a second dielectric layer on the waveguide core region and the first dielectric layer. The waveguide core region has a tapered section with an end surface that terminates adjacent to an edge of the first dielectric layer. The second dielectric layer includes a first trench and a second trench that are each positioned adjacent to the tapered section of the waveguide core region.

Abstract: Structures for polarization filtering and methods of forming a structure for polarization filtering. A waveguiding structure has a first waveguide core region including a first plurality of bends, a second waveguide core region including a second plurality of bends laterally spaced from the first plurality of bends by a gap, and a third waveguide core region including a third plurality of bends positioned beneath the gap. The first waveguide core region and the second waveguide core region contain a first material. The third waveguide core region contains a second material that differs in composition from the first material.

Abstract: Structures for managing light polarization on a photonics chip and methods of forming a structure for managing light polarization on a photonics chip. A single-mode waveguiding structure is formed that includes a first waveguide core region and a second waveguide core region positioned above the first waveguide core region. The second waveguide core region includes a first section, a second section connected to the first section, and a third section connected to the second section. The second section has a first width at an intersection with the first section and a second width at an intersection with the third section. The second width is greater than the first width. The first and second waveguide core regions contain materials of different composition.

Abstract: A method of forming a laser including device is provided that in one embodiment includes providing a laser chip including at least one ridge structure that provides an alignment features. The method further includes bonding a type IV photonics chip to the laser chip, wherein a vertical alignment feature from the type IV photonics chip is inserted in a recess relative to the at least one ridge structure that provides the alignment features of the laser structure.

Abstract: Embodiments of the invention are directed a waveguide having a first waveguide segment that includes a set of first waveguide segment confinement parameters; a second waveguide segment having routing bends and a set of second waveguide segment confinement parameters; and a third waveguide segment having a set of third waveguide segment confinement parameters. The waveguide is configured to guide optical data according to an asymmetric optical-loss performance curve that is a plot of the sets of first, second, and third waveguide segment confinement parameters on a first axis; and a level of optical-loss performance that results from the sets of first, second, and third waveguide segment confinement parameters on a second axis. The sets of first, second, and third waveguide segment confinement parameters are configured to, collectively, maximize a predetermined worst-case optical-loss performance level of the asymmetric optical-loss performance curve within a range of waveguide fabrication tolerances.

Abstract: Solder-pinning metal pads for electronic components and techniques for use thereof to mitigate de-wetting are provided. In one aspect, a structure includes: a substrate; and a solder pad on the substrate, wherein the solder pad has sidewalls extending up from a surface thereof. For instance, the sidewalls can be present at edges of the solder pad, or inset from the edges of the solder pad. The sidewalls can be vertical or extend up from the solder pad at an angle. The sidewalls can be formed from the same material or a different material as the solder pad. A method is also provided that includes forming a solder pad on a substrate, the solder pad comprising sidewalls extending up from a surface thereof.

Abstract: Approaches for silicon photonics integration are provided. A method includes: forming at least one encapsulating layer over and around a photodetector; thermally crystallizing the photodetector material after the forming the at least one encapsulating layer; and after the thermally crystallizing the photodetector material, forming a conformal sealing layer on the at least one encapsulating layer and over at least one device. The conformal sealing layer is configured to seal a crack in the at least one encapsulating layer. The photodetector and the at least one device are on a same substrate. The at least one device includes a complementary metal oxide semiconductor device or a passive photonics device.

Abstract: One illustrative backscattering generator disclosed herein includes a low-reflection waveguide structure, a slot waveguide structure comprising a first waveguide, a second waveguide and a slot located between the first waveguide and the second waveguide, and a variable direction coupler operatively coupled to the low-reflection waveguide structure and the slot waveguide structure.

Abstract: A semiconductor optical amplifier having a 3 dB coupler is described for use in providing an amplified optical data signal to a photonic chip. The semiconductor optical amplifier includes an amplifier die having a signal coupling facet, waveguides terminating at the signal coupling facet, a 3 dB coupler, and a reflector. The 3 dB coupler is optically coupled between the signal coupling facet and the reflector.

Abstract: Embodiments of the invention are directed a waveguide having a first waveguide segment that includes a set of first waveguide segment confinement parameters; a second waveguide segment having routing bends and a set of second waveguide segment confinement parameters; and a third waveguide segment having a set of third waveguide segment confinement parameters. The waveguide is configured to guide optical data according to an asymmetric optical-loss performance curve that is a plot of the sets of first, second, and third waveguide segment confinement parameters on a first axis; and a level of optical-loss performance that results from the sets of first, second, and third waveguide segment confinement parameters on a second axis. The sets of first, second, and third waveguide segment confinement parameters are configured to, collectively, maximize a predetermined worst-case optical-loss performance level of the asymmetric optical-loss performance curve within a range of waveguide fabrication tolerances.

Abstract: Systems and methods for coupling optical fiber to a photonic chip are described. The apparatus may include a low index contrast waveguide overlapping a region of a photonic chip, a high index contrast waveguide at least partially embedded within the overlapped region of the photonic chip, where the high index contrast waveguide comprises a tapered region and a fixed-width routing region, and where the tapered region comprises an adiabatic crossing region and a wide waveguide region connecting the adiabatic crossing region and the fixed-width routing region. A rate of increase of the width of the high index contrast waveguide with respect to position along the length of the high index contrast waveguide is substantially non-linear within the adiabatic crossing region and substantially asymmetric about a minimum slope point.

Abstract: Photonic circuits are disclosed having an efficient optical power distribution network. Laser chips (InP) having different wavelengths are flip-chip assembled near the center of a silicon photonic chip. Each InP die has multiple optical lanes, but a given die has only one wavelength. Waveguides formed in the photonic chip are optically connected to the lanes, and fan out to form multiple waveguide sets, where each waveguide set has one of the waveguides from each of the different wavelengths, i.e., one waveguide from each InP die. The waveguide network is optimized to minimize the number of crossings that any given waveguide may have, and no waveguide having a particular wavelength crosses another waveguide of the same wavelength. The unique arrangements of light sources and waveguides allows the use of a smaller number of more intense laser sources, particularly in applications such as performance-optimized datacenters where liquid cooling systems may be leveraged.

Abstract: Techniques are provided for single edge coupling of chips with integrated waveguides. For example, a package structure includes a first chip with a first critical edge, and a second chip with a second critical edge. The first and second chips include integrated waveguides with end portions that terminate on the first and second critical edges. The second chip includes a signal reflection structure that is configured to reflect an optical signal propagating in one or more of the integrated waveguides of the second chip. The first and second chips are edge-coupled at the first and second critical edges such that the end portions of the integrated waveguides of the first and second chips are aligned to each other, and wherein all signal input/output between the first and second chips occurs at the single edge-coupled interface.

Abstract: Techniques are provided for single edge coupling of chips with integrated waveguides. For example, a package structure includes a first chip with a first critical edge, and a second chip with a second critical edge. The first and second chips include integrated waveguides with end portions that terminate on the first and second critical edges. The second chip includes a signal reflection structure that is configured to reflect an optical signal propagating in one or more of the integrated waveguides of the second chip. The first and second chips are edge-coupled at the first and second critical edges such that the end portions of the integrated waveguides of the first and second chips are aligned to each other, and wherein all signal input/output between the first and second chips occurs at the single edge-coupled interface.