Abstract: A method for forming openings in an underlayer includes: forming a photoresist layer on an underlayer formed on a substrate; exposing the photoresist layer; forming photoresist patterns by developing the exposed photoresist layer, the photoresist patterns covering regions of the underlayer in which the openings are to be formed; forming a liquid layer over the photoresist patterns; after forming the liquid layer, performing a baking process so as to convert the liquid layer to an organic layer in a solid form; performing an etching back process to remove a portion of the organic layer on a level above the photoresist patterns; removing the photoresist patterns, so as to expose portions of the underlayer by the remaining portion of the organic layer; forming the openings in the underlayer by using the remaining portion of the organic layer as an etching mask; and removing the remaining portion of the organic layer.

Abstract: A photoresist composition includes a photoactive compound and a polymer. The polymer has a polymer backbone including one or more groups selected from: The polymer backbone includes at least one group selected from B, C-1, or C-2, wherein ALG is an acid labile group, and X is linking group.

Abstract: A light emitting module including a circuit carrier and a plurality of light emitting devices is provided. The circuit carrier includes a first circuit layer, a second circuit layer, a dielectric layer and a plurality of conductive vias. The first circuit layer and the second circuit layer are located at two opposite sides of the dielectric layer. The conductive vias pass through the dielectric layer and two opposite end portions of each of the conductive vias are respectively connected to the first circuit layer and the second circuit layer. The light emitting devices are electrically bonded to the first circuit layer. Moreover, the light emitting devices are disposed in a device disposing area of the circuit carrier and the conductive vias are arranged outside the device disposing area. A display device is also provided.

Abstract: A micro LED display device includes a display substrate. The display substrate has a first transfer area and a second transfer area adjacent to each other. Both the first transfer area and the second transfer area include a plurality of pixel areas. The pixel area of the first transfer area includes a first micro light-emitting element arranged in a straight line along a first direction. The pixel area of the second transfer area includes a second micro light-emitting element arranged in another straight line along the first direction. In the first direction, the first micro light-emitting element and the second micro light-emitting element are arranged in a staggered manner. A manufacturing method of a micro LED display device is also provided.

Abstract: A micro LED display device including a display substrate, a plurality of conductive pad pairs and a plurality of micro light emitting elements is provided. The display substrate has a first arranging area, a splicing area connected to the first arranging area, and a second arranging area connected to the splicing area, wherein the splicing area is located between the first arranging area and the second arranging area. The conductive pad pairs are disposed on the display substrate in an array with the same pitch. The micro light emitting elements are disposed on the display substrate and are electrically bonded to the conductive pad pairs. A manufacturing method of the micro LED display device is also provided.

Abstract: A method for manufacturing a micro light emitting diode device is provided. A plurality of first type epitaxial structures are formed on a first substrate and the first type epitaxial structures are separated from each other. A first connection layer and a first adhesive layer are configured between the first type epitaxial structures and the first substrate. The first connection layer is connected to the first type epitaxial structures. The first adhesive layer is located between the first connection layer and the first type epitaxial substrate. The Young's modulus of the first connection layer is larger than the Young's modulus of the first adhesive layer. The first connection layer located between any two adjacent first type epitaxial structures is removed so as to form a plurality of first connection portions separated from each other. Each of the first connection portions is connected to the corresponding first type epitaxial structure.

Abstract: A micro light-emitting diode chip includes an epitaxial structure, a first electrode, and a second electrode. The epitaxial structure includes a first type doped semiconductor layer, a light emitting layer, and a second type doped semiconductor layer, and the epitaxial structure further includes a first surface, a side surface and a second surface opposite to the first surface. The side surface of the epitaxial structure connects to an outer edge of the first surface and an outer edge of the second surface. The first electrode is disposed on the first surface, and is electrically connected to the first type doped semiconductor layer and contacts the first type doped semiconductor layer on a portion of the first surface. The second electrode is disposed on and surrounds the side surface, and electrically connected to the second type doped semiconductor layer, and directly contacts the second type doped semiconductor layer on a portion of the side surface.

Abstract: A micro LED carrier board is provided. The micro LED carrier board includes a substrate structure having a first surface and a second surface and having a central region and a peripheral region on the outside of the central region. The micro LED carrier board includes a plurality of micro LED elements forming an array and on the second surface of the substrate structure. The micro LED carrier board includes a patterned structure formed on the first surface and the second surface. The patterned structure has a first pattern density in the central region and a second pattern density in the peripheral region, and the first pattern density is different from the second pattern density.

Abstract: A lithography includes a storage tank that stores process chemical fluid, an anti-collision frame, and an integrated sensor assembly. The storage tank includes a dispensing port positioned at a lowest part of the storage tank in a gravity direction. The anti-collision frame is coupled to the storage tank. An integrated sensor assembly is disposed on at least one of the anti-collision frame and the storage tank to measure a variation in fluid quality in response to fluid quality measurement of fluid.

Abstract: Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.

Abstract: A method for forming openings in an underlayer includes: forming a photoresist layer on an underlayer formed on a substrate; exposing the photoresist layer; forming photoresist patterns by developing the exposed photoresist layer, the photoresist patterns covering regions of the underlayer in which the openings are to be formed; forming a liquid layer over the photoresist patterns; after forming the liquid layer, performing a baking process so as to convert the liquid layer to an organic layer in a solid form; performing an etching back process to remove a portion of the organic layer on a level above the photoresist patterns; removing the photoresist patterns, so as to expose portions of the underlayer by the remaining portion of the organic layer; forming the openings in the underlayer by using the remaining portion of the organic layer as an etching mask; and removing the remaining portion of the organic layer.

Abstract: A micro semiconductor device and a micro semiconductor display are provided. The micro semiconductor device includes an epitaxial structure, a first electrode, a second electrode and a supporting layer. The epitaxial structure has a bottom surface and a top surface, wherein the bottom surface is defined as a central region and a peripheral region. A first electrode and a second electrode are disposed on the central region of the bottom surface of the epitaxial structure, or the first electrode is disposed on the central region of the bottom surface of the epitaxial structure and the second electrode is disposed on the top surface of the epitaxial structure. The supporting layer is disposed on the peripheral region of the bottom surface of the epitaxial structure.

Abstract: A micro light emitting diode chip having a plurality of light-emitting regions, including a semiconductor epitaxial structure, a first electrode and a plurality of second electrodes disposed at interval is provided. The semiconductor epitaxial structure includes a first-type doped semiconductor layer, a plurality of second-type doped semiconductor layers and a plurality of light-emitting layers disposed at interval. The light-emitting layers are located between the first-type doped semiconductor layer and the second-type doped semiconductor layer. The light-emitting layers are located in the light-emitting regions respectively and electrically contact to the first-type doped semiconductor layer. The first electrode is electrically connected and contacts to the first-type doped semiconductor layers. The second electrodes are electrically connected to the second-type doped semiconductor layers. Furthermore, a display panel is also provided.

Abstract: A micro semiconductor chip, a micro semiconductor structure, and a display device are provided. The micro semiconductor chip includes an epitaxial layer, a first electrode, a second electrode and a side light guide element. The epitaxial layer has a top surface, a bottom surface and a side surface. The first electrode and the second electrode are disposed on the bottom surface of the epitaxial layer. The side light guide element disposed on the side surface has a connecting portion and an extending portion. The connecting portion is in contact with a part of the extending portion, and the extending portion extends away from the side surface of the epitaxial layer. The extending portion has a top surface and a bottom surface, wherein a plane containing the top surface of the epitaxial layer forms an acute angle ?1 with a plane containing the top surface of the extending portion.

Abstract: A micro light-emitting device module includes a circuit substrate, a planarization layer and a micro light-emitting device. The planarization layer is disposed on an upper surface of the circuit substrate and has a first surface and a second surface opposite to each other. The second surface is in contact with the upper surface of the circuit substrate. The micro light-emitting device is disposed on the first surface of the planarization layer. A maximum height difference of the second surface of the planarization layer is greater than a thickness of the micro light-emitting device.

Abstract: A micro LED display panel includes a display area, a plurality of micro light-emitting elements and a plurality of micro control elements. The plurality of micro light-emitting elements is disposed in the display area and include a plurality of first color micro LEDs and a plurality of second color micro LEDs. A light wavelength of each of the first color micro LEDs is different from a light wavelength of each of the second color micro LEDs. The plurality of micro control elements is disposed in the display area, and include a plurality of first color micro circuit-chips and a plurality of second color micro circuit-chips. The plurality of first color micro circuit-chips control the plurality of first color micro LEDs, and the plurality of second color micro circuit-chips control the plurality of second color micro LEDs.

Abstract: A method is provided including forming a first layer over a substrate and forming an adhesion layer over the first layer. The adhesion layer has a composition including an epoxy group. A photoresist layer is formed directly on the adhesion layer. A portion of the photoresist layer is exposed to a radiation source. The composition of the adhesion layer and the exposed portion of the photoresist layer cross-link using the epoxy group. Thee photoresist layer is then developed (e.g., by a negative tone developer) to form a photoresist pattern feature, which may overlie the formed cross-linked region.

Abstract: A micro semiconductor chip, a micro semiconductor structure, and a display device are provided. The micro semiconductor chip includes an epitaxial layer, a first electrode, a second electrode and a side light guide element. The epitaxial layer has a top surface, a bottom surface and a side surface. The first electrode and the second electrode are disposed on the bottom surface of the epitaxial layer. The side light guide element disposed on the side surface has a connecting portion and an extending portion. The connecting portion is in contact with a part of the extending portion, and the extending portion extends away from the side surface of the epitaxial layer. The extending portion has a top surface and a bottom surface, wherein a plane containing the top surface of the epitaxial layer forms an acute angle ?1 with a plane containing the top surface of the extending portion.

Abstract: Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material.

Abstract: A micro semiconductor structure is provided. The micro semiconductor structure includes a substrate, at least one supporting layer, and at least one micro semiconductor device. The supporting layer includes at least one upper portion and a bottom portion, wherein the upper portion extends in a first direction. The length L1 of the upper portion in the first direction is greater than the length L2 of the bottom portion in the first direction. Furthermore, the bottom surface of the micro semiconductor device is in direct contact with the upper portion of the supporting layer.