Abstract: A touch panel including a substrate, a first patterned conductive layer, a second patterned conductive layer and a circuit board is provided. The substrate has a first surface, a second surface, a first bonding area and a second bonding area. The first patterned conductive layer disposed on the first surface includes first sensing series electrically insulated from each other. The second patterned conductive layer disposed on the second surface includes second sensing series electrically insulated from each other. The circuit board includes a rigid portion, a first flexible bonding portion and a second flexible bonding portion. The first flexible bonding portion and the second flexible bonding portion are electrically connected to the rigid portion. The first flexible bonding portion is electrically connected to the first sensing series in the first bonding area. The second flexible bonding portion is electrically connected to the second sensing series in the second bonding area.

Abstract: A method for fabricating a solder pad structure. A circuit board having thereon at least one copper pad is provided. A solder resist is formed on the circuit board and covers the copper pad. A solder resist opening, which exposes a portion of the copper pad, is formed in the solder resist by laser. The laser also creates a laser activated layer on sidewalls of the solder resist opening. A chemical copper layer is then grown from the exposed copper pad and concurrently from the laser activated layer.

Abstract: A process for fabricating a circuit board is provided. A circuit substrate having a first surface and a first circuit layer is provided. A first dielectric layer having a second surface is formed on the circuit substrate and covers the first surface and the first circuit layer. An antagonistic activation layer is formed on the second surface. The antagonistic activation layer is irradiated by a laser beam to form at least a blind via extended from the antagonistic activation layer to the first circuit layer and an intaglio pattern. A first conductive layer is formed inside the blind via. A second conductive layer is formed in the intaglio pattern and the blind via. The second conductive layer covers the first conductive layer and is electrically connected with the first circuit layer through the first conductive layer. The antagonistic activation layer is removed to expose the second surface.

Abstract: A manufacturing method of a circuit substrate includes the following steps. A dielectric layer is formed on at least one surface of a substrate. An insulating layer is formed on the dielectric layer. A portion of the insulating layer and a portion of the dielectric layer are removed, so as to form at least one blind via in the dielectric layer and the insulating layer. An electroless plating layer is formed on the sidewall of the blind via and a remaining portion of the insulating layer, wherein the binding strength between the insulating layer and the electroless plating layer is greater than that between the dielectric layer and the electroless plating layer. A patterned conductive layer is plated to cover the electroless plating layer.

Abstract: A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer.

Abstract: A circuit board includes a circuit substrate, a dielectric layer, and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit, a first intaglio pattern, and a second intaglio pattern. The patterned circuit structure includes at least a second circuit and a plurality of third circuits. The second circuit is disposed in the first intaglio pattern. The third circuits are disposed in the second intaglio pattern and the blind via. Each third circuit has a first conductive layer, a second conductive layer, and a barrier layer. The first conductive layer is located between the barrier layer and the second intaglio pattern and between the barrier layer and the blind via. The second conductive layer covers the barrier layer.

Abstract: A circuit board including a circuit substrate, a first dielectric layer, an antagonistic activation layer, a first conductive layer, a second conductive layer and a second dielectric layer is provided. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer and an intaglio pattern. The antagonistic activation layer is disposed on the second surface of the dielectric layer. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer via the first conductive layer.

Abstract: A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate.

Abstract: A manufacturing method of circuit structure is described as follows. Firstly, a composite dielectric layer, a circuit board and an insulating layer disposed therebetween are provided. The composite dielectric layer includes a non-platable dielectric layer and a platable dielectric layer between the non-platable dielectric layer and the insulating layer wherein the non-platable dielectric layer includes a chemical non-platable material and the platable dielectric layer includes a chemical platable material. Then, the composite dielectric layer, the circuit board and the insulating layer are compressed. Subsequently, a through hole passing through the composite dielectric layer and the insulating layer is formed and a conductive via connecting a circuit layer of the circuit board is formed therein. Then, a trench pattern passing through the non-platable dielectric layer is formed on the composite dielectric layer.

Abstract: A circuit structure including a circuit board, an insulating layer, a conductive via, a platable dielectric layer and a conductive pattern is provided. The insulating layer is disposed on the circuit board and covers a circuit layer of the circuit board. The conductive via passes through the insulating layer and connects the circuit layer and protrudes from a surface of the insulating layer. The platable dielectric layer having a trench pattern is disposed on the surface of the insulating layer wherein the portion of the conductive via protruding from the surface is located in the trench pattern. The material of the platable dielectric layer includes a chemical platable material. The conductive pattern is in the trench pattern and connects the conductive via wherein an interface exists between the conductive pattern and the conductive via and protrudes from the surface of the insulating layer.

Abstract: A method for fabricating a solder pad structure. A circuit board having thereon at least one copper pad is provided. A solder resist is formed on the circuit board and covers the copper pad. A solder resist opening, which exposes a portion of the copper pad, is formed in the solder resist by laser. The laser also creates a laser activated layer on sidewalls of the solder resist opening. A chemical copper layer is then grown from the exposed copper pad and concurrently from the laser activated layer.

Abstract: A composite circuit substrate structure includes a first dielectric layer, a second dielectric layer, a glass fiber structure, and a patterned circuit. The first dielectric layer has a first surface and a second surface opposite to each other. The second dielectric layer is disposed on the first dielectric layer and entirely connected to the first surface. The glass fiber structure is distributed in the second dielectric layer. The patterned circuit is embedded in the first dielectric layer from the second surface, and the patterned circuit is not contacted with the glass fiber structure.

Abstract: A method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink jet printing that includes providing a substrate, forming a first self-assembly membrane (SAM) on at least one side of the substrate, forming a non-adhesive membrane on the first SAM, forming at least one microhole in the substrate, forming a second SAM on a surface of the microhole, providing catalyst particles on the at least one side of the substrate and on the surface of the microhole, and forming a catalyst circuit pattern on the substrate.

Abstract: A method of fabricating a substrate includes following steps. First, a metallic panel having a first surface and a second surface is provided. A first half-etching process is carried out to etch the first surface of the metallic panel to a first depth so that a first patterned metallic layer is formed on the first surface. Next, a first insulating material is deposited into gaps in the first patterned metallic layer to form a first insulator. Thereafter, a second half-etching process is carried out to etch the second surface of the metallic panel to a second depth and expose at least a portion of the first insulator so that a second patterned metallic layer is formed on the second surface. The first depth and the second depth together equal the thickness of the metallic panel.

Abstract: A method for fabricating a double-sided or multi-layer printed circuit board (PCB) by ink-jet printing that includes providing a substrate, forming a first self-assembly membrane (SAM) on at least one side of the substrate, forming a non-adhesive membrane on the first SAM, forming at least one microhole in the substrate, forming a second SAM on a surface of the microhole, providing catalyst particles on the at least one side of the substrate and on the surface of the microhole, and forming a catalyst circuit pattern on the substrate.

Abstract: A method for forming a circuit board structure of composite material is disclosed. First, a composite material structure including a substrate and a composite material dielectric layer is provided. The composite material dielectric layer includes a catalyst dielectric layer contacting the substrate and at least one sacrificial layer contacting the catalyst dielectric layer. The sacrificial layer is insoluble in water. Later, the composite material dielectric layer is patterned and simultaneously catalyst particles are activated. Then, a conductive layer is formed on the activated catalyst particles. Afterwards, at least one sacrificial layer is removed.

Abstract: A composite circuit substrate structure includes a first dielectric layer, a second dielectric layer, a glass fiber structure, and a patterned circuit. The first dielectric layer has a first surface and a second surface opposite to each other. The second dielectric layer is disposed on the first dielectric layer and entirely connected to the first surface. The glass fiber structure is distributed in the second dielectric layer. The patterned circuit is embedded in the first dielectric layer from the second surface, and the patterned circuit is not contacted with the glass fiber structure.

Abstract: A method for manufacturing a three-dimensional circuit is described as follows. Firstly, a three-dimensional insulating structure having at least one uneven surface is provided. Secondly, a self-assembly film is formed on the uneven surface for completely covering the uneven surface. Next, a catalytic film is formed on the self-assembly film. Afterward, the self-assembly film and the catalytic film are patterned. Then, a three-dimensional circuit structure is formed on the catalytic film by chemical deposition.

Abstract: A substrate including a first patterned metallic layer, a second patterned metallic layer and an insulator is provided. One side of the first patterned metallic layer is connected to a corresponding side of the second patterned metallic layer. The first patterned metallic layer and the second patterned metallic layer are formed as a whole. The insulator fills the gaps in the first patterned metallic layer and the gaps in the second patterned metallic layer.

Abstract: A process of a package substrate is provided. A plurality of metal layers stacked in sequence is used as a foundation structure. A thick heat conductive core is fabricated from one of the metal layers for providing high heat dissipation capability, and a plurality of pads is fabricated from another one of the metal layers for electrically connecting an electronic package at the next level.