Patents by Inventor Ung Lee

Ung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8519412
    Abstract: A semiconductor light-emitting device and a method for manufacturing the same is disclosed, which improves light extraction efficiency by forming a plurality of protrusions on a surface of a substrate for growing a nitride semiconductor material thereon, the semiconductor light-emitting device comprising a substrate; one or more first protrusions on the substrate, each first protrusion having a recess through which a surface of the substrate is exposed planarly; a first semiconductor layer on the substrate including the first protrusions; an active layer on the first semiconductor layer; a second semiconductor layer on the active layer; a first electrode on a predetermined portion of the first semiconductor layer, wherein the active layer and second semiconductor layer are not formed on the predetermined portion of the first semiconductor layer; and a second electrode on the second semiconductor layer.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: August 27, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Su Hyoung Son, Kyoung Jin Kim, Eun Mi Ko, Ung Lee
  • Patent number: 8502249
    Abstract: A semiconductor light-emitting device capable of improving current distribution, and a method for manufacturing the same is disclosed, wherein the semiconductor light-emitting device comprises a substrate; an N-type nitride semiconductor layer on the substrate; an active layer on the N-type nitride semiconductor layer; a P-type nitride semiconductor layer on the active layer; a groove in the P-type nitride semiconductor layer to form a predetermined pattern in the P-type nitride semiconductor layer; a light guide of transparent non-conductive material in the groove; and a transparent electrode layer on the P-type nitride semiconductor layer with the light guide.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: August 6, 2013
    Assignee: LG Display Co., Ltd.
    Inventors: Ung Lee, Yoon Seok Park, Won Keun Cho, So Young Jang
  • Publication number: 20130114326
    Abstract: Disclosed is a semiconductor memory apparatus, including: a memory cell array configured to include a plurality of memory cells; a switching unit configured to be coupled to data input and output pads and control a data transfer path of data applied to the data input and output pads in response to a test mode signal; a write driver configured to drive data transferred from the switching unit and write the data in the memory cell array at a normal mode; and a controller configured to transfer the data from the switching unit to the memory cell at a test mode.
    Type: Application
    Filed: December 30, 2011
    Publication date: May 9, 2013
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Jae Ung LEE
  • Patent number: 8274205
    Abstract: The system and method provided herein for limiting the effects of arcing in field-type electron emitter arrays improves the robustness of such arrays. Field-type electron emitter arrays generally have a substrate, an insulator, and a gating electrode. By including a resistive substance in the gate of the emitter array, arcing events may be isolated to a single emitter such that the remaining emitters of an array can continue electron emission and/or the short circuit current of the arc can be limited.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: September 25, 2012
    Assignee: General Electric Company
    Inventors: Colin R. Wilson, Ji-Ung Lee
  • Publication number: 20110309700
    Abstract: The present invention relates to a connection molding for automation of a three- phase motor winding, which specifically comprises: a fixed coil part fixed inside of a main body, a coil part installed within the fixed coil part, a central shaft fixed to the main body and passing through the coil part, and a connector part coupled to the top of the coil part so that the coil of the coil part is connected thereto and the central shaft passes and is coupled therethrough.
    Type: Application
    Filed: February 12, 2010
    Publication date: December 22, 2011
    Inventors: Jin Wook Jang, Yong Taek Hang, Jong Ung Lee, II Kyu Choi
  • Patent number: 7982570
    Abstract: An inductor includes an electrical conductor wound in a magnetic flux concentrating pattern, the electrical conductor comprises a plurality of carbon nanotubes that are substantially aligned with an axis along a center of the electrical conductor.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: July 19, 2011
    Assignee: General Electric Company
    Inventors: William E. Burdick, Jr., Ji-Ung Lee, Michael A. de Rooij
  • Publication number: 20110155997
    Abstract: The vertical light emitting diode includes a substrate having a plurality of penetrating via-holes, a plurality of nitride semiconductor layers formed on the substrate, a first electrode formed on the plurality of nitride semiconductor layers, and a second electrode formed to fill the plurality of via-holes thereby contacting part of the plurality of nitride semiconductor layers.
    Type: Application
    Filed: December 13, 2010
    Publication date: June 30, 2011
    Inventors: Ung Lee, So-Young Jang, Sang-Jun Jung, Hyun-Goo Kim
  • Publication number: 20110140127
    Abstract: A semiconductor light-emitting device and a method for manufacturing the same is disclosed, which improves light extraction efficiency by forming a plurality of protrusions on a surface of a substrate for growing a nitride semiconductor material thereon, the semiconductor light-emitting device comprising a substrate; one or more first protrusions on the substrate, each first protrusion having a recess through which a surface of the substrate is exposed planarly; a first semiconductor layer on the substrate including the first protrusions; an active layer on the first semiconductor layer; a second semiconductor layer on the active layer; a first electrode on a predetermined portion of the first semiconductor layer, wherein the active layer and second semiconductor layer are not formed on the predetermined portion of the first semiconductor layer; and a second electrode on the second semiconductor layer.
    Type: Application
    Filed: July 15, 2010
    Publication date: June 16, 2011
    Inventors: Su Hyoung Son, Kyoung Jin Kim, Eun Mi Ko, Ung Lee
  • Publication number: 20110114980
    Abstract: A semiconductor light-emitting device capable of improving current distribution, and a method for manufacturing the same is disclosed, wherein the semiconductor light-emitting device comprises a substrate; an N-type nitride semiconductor layer on the substrate; an active layer on the N-type nitride semiconductor layer; a P-type nitride semiconductor layer on the active layer; a groove in the P-type nitride semiconductor layer to form a predetermined pattern in the P-type nitride semiconductor layer; a light guide of transparent non-conductive material in the groove; and a transparent electrode layer on the P-type nitride semiconductor layer with the light guide.
    Type: Application
    Filed: November 18, 2010
    Publication date: May 19, 2011
    Inventors: Ung Lee, Yoon Seok Park, Won Keun Cho, So Young Jang
  • Patent number: 7902736
    Abstract: The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: March 8, 2011
    Assignee: General Electric Company
    Inventors: Heather Diane Hudspeth, Ji Ung Lee, Reed Roeder Corderman, Anping Zhang, Renee Bushey Rohling, Lauraine Denault, Joleyn Eileen Balch
  • Publication number: 20100212727
    Abstract: A method for continuously growing carbon nanotubes may include providing a melt comprising carbon and a catalyst at a temperature between about 1,200 degrees Celsius and about 2,500 degrees Celsius, selecting a carbon nanotube seed having at least one of a semiconductor electrical property and a metallic electrical property from a plurality of carbon nanotube seeds, contacting the selected carbon nanotube seed to a surface of the melt, and moving the selected carbon nanotube seed away from the surface of the melt at a rate operable to continuously grow a carbon nanotube, and continuously growing the carbon nanotube having the selected electrical property. Method for continuously growing a graphene sheet, and apparatus for continuously growing carbon nanotubes and graphene sheets are also disclosed.
    Type: Application
    Filed: February 22, 2010
    Publication date: August 26, 2010
    Inventor: Ji Ung LEE
  • Publication number: 20090321721
    Abstract: The present invention is directed toward field effect transistors (FETs) and thin film transistors (TFTs) comprising carbon nanotubes (CNTs) and to methods of making such devices using solution-based processing techniques, wherein the CNTs within such devices have been fractionated so as to be concentrated in semiconducting CNTs. Additionally, the relatively low-temperature solution-based processing achievable with the methods of the present invention permit the use of plastics in the fabricated devices.
    Type: Application
    Filed: April 25, 2007
    Publication date: December 31, 2009
    Applicant: General Electric Company
    Inventors: Patrick Roland Lucien Malenfant, Ji-Ung Lee, Yun Li, Walter Vladimir Cicha
  • Patent number: 7521275
    Abstract: A method and associated structure for forming a free-standing electrostatically-doped carbon nanotube device is described. The method includes providing a carbon nanotube on a substrate in such a way as to have a free-standing portion. One way of forming a free-standing portion of the carbon nanotube is to remove a portion of the substrate. Another described way of forming a free-standing portion of the carbon nanotube is to dispose a pair of metal electrodes on a first substrate portion, removing portions of the first substrate portion adjacent to the metal electrodes, and conformally disposing a second substrate portion on the first substrate portion to form a trench.
    Type: Grant
    Filed: April 3, 2007
    Date of Patent: April 21, 2009
    Assignee: General Electric Company
    Inventor: Ji Ung Lee
  • Publication number: 20080129178
    Abstract: The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
    Type: Application
    Filed: January 9, 2008
    Publication date: June 5, 2008
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Heather Diane Hudspeth, Ji Ung Lee, Reed Roeder Corderman, Anping Zhang, Renee Bushey Rohling, Lauraine Denault, Joleyn Eileen Balch
  • Publication number: 20080129177
    Abstract: The system and method provided herein for limiting the effects of arcing in field-type electron emitter arrays improves the robustness of such arrays. Field-type electron emitter arrays generally have a substrate, an insulator, and a gating electrode. By including a resistive substance in the gate of the emitter array, arcing events may be isolated to a single emitter such that the remaining emitters of an array can continue electron emission and/or the short circuit current of the arc can be limited.
    Type: Application
    Filed: December 5, 2006
    Publication date: June 5, 2008
    Inventors: Colin R. Wilson, Ji-Ung Lee
  • Publication number: 20080122439
    Abstract: An inductor includes an electrical conductor wound in a magnetic flux concentrating pattern, the electrical conductor comprises a plurality of carbon nanotubes that are substantially aligned with an axis along a center of the electrical conductor.
    Type: Application
    Filed: November 7, 2006
    Publication date: May 29, 2008
    Inventors: William E. Burdick, Ji-Ung Lee, Michael A. de Rooij
  • Patent number: 7378715
    Abstract: A method and associated structure for forming a free-standing electrostatically-doped carbon nanotube device is described. The method includes providing a carbon nanotube on a substrate in such a way as to have a free-standing portion. One way of forming a free-standing portion of the carbon nanotube is to remove a portion of the substrate. Another described way of forming a free-standing portion of the carbon nanotube is to dispose a pair of metal electrodes on a first substrate portion, removing portions of the first substrate portion adjacent to the metal electrodes, and conformally disposing a second substrate portion on the first substrate portion to form a trench.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: May 27, 2008
    Assignee: General Electric Company
    Inventor: Ji Ung Lee
  • Patent number: 7329552
    Abstract: The present invention includes field effect transistors, field emission apparatuses, thin film transistors, and methods of forming field effect transistors. According to one embodiment, a field effect transistor includes a semiconductive layer configured to form a channel region; a pair of spaced conductively doped semiconductive regions in electrical connection with the channel region of the semiconductive layer; a gate intermediate the semiconductive regions; and a gate dielectric layer intermediate the semiconductive layer and the gate, the gate dielectric layer being configured to align the gate with the channel region of the semiconductive layer. In one aspect, chemical-mechanical polishing self-aligns the gate with the channel region. According to another aspect, a field emission device includes a transistor configured to control the emission of electrons from an emitter.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: February 12, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Ji Ung Lee, John Lee, Benham Moradi
  • Patent number: 7326328
    Abstract: The present invention relates to gated nanorod field emission devices, wherein such devices have relatively small emitter tip-to-gate distances, thereby providing a relatively high emitter tip density and low turn on voltage. Such methods employ a combination of traditional device processing techniques (lithography, etching, etc.) with electrochemical deposition of nanorods. These methods are relatively simple, cost-effective, and efficient; and they provide field emission devices that are suitable for use in x-ray imaging applications, lighting applications, flat panel field emission display (FED) applications, etc.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: February 5, 2008
    Assignee: General Electric Company
    Inventors: Heather Diane Hudspeth, Ji Ung Lee, Reed Roeder Corderman, Anping Zhang, Renee Bushey Rohling, Lauraine Denault, Joleyn Eileen Balch
  • Patent number: RE41673
    Abstract: Organic light emitting devices are disclosed that use a micro electromechanical system (MEMS) structure to enable a pixel and pixel array wherein each pixel contains a MEMS and an OLED element. A MEMS structure is used for switching the OLED element. These OLED/MEMS pixels can be fabricated on flex circuit, silicon, as well as other inorganic materials. They can be fabricated in a large array for developing a 2-dimensional display application and each pixel can be addressed through conventional matrix scanning addressing scheme. The ability of fabricating these OLED/MEMS pixels on flexible organic substrates as well as other rigid substrates enables wider selection of substrate materials for use with different applications.
    Type: Grant
    Filed: January 13, 2006
    Date of Patent: September 14, 2010
    Assignee: General Electric Company
    Inventors: Kelvin Ma, Ji-Ung Lee, Anil Raj Duggal