Abstract: A buck-boost regulation methodology operable, in one embodiment, with a single inductor, four-switch (S1-S4) buck-boost regulator configured for DCM. Buck-boost transition switching control is operable when inductor charge time exceeds a max charge time, and inductor discharge time exceeds a max discharge time, and includes: (a) during charge transition cycles, at the end of the max charge time, if IL is less than a predetermined peak current IL—MAX, switching S2 on (grounding the output side of the inductor) and S4 off, causing IL to increase (a rapid S1S2 charging current ramp), until IL reaches IL—MAX, and (b) during discharge transition cycles, at the end of the max charge time, if IL is greater than zero, switching S1 off and S3 on (grounding the input side of the inductor), causing IL to increase (a rapid S3S4 IL discharging current ramp), until IL reaches zero.

Abstract: An operational amplifier (10) capable of driving a capacitive load (CLOAD) and/or a resistive load (RLOAD) includes a first gain stage (2) having an output coupled to a high impedance node (3) and a second gain stage (5) having an input coupled to the first high impedance node. A gain reduction resistor (RD) and an AC coupling capacitor (CD) are coupled in series between the high impedance node and a reference voltage. A Miller feedback capacitor (CM) is coupled between an output conductor (7) of the second gain stage and the high impedance node. The output of the second gain stage may be coupled to the high impedance node by a cascode transistor (MCASCODE).

Abstract: A system (1-2) for efficiently transferring harvested vibration energy to a battery (6) includes a piezo harvester (2) generating an AC output voltage (VP(t)) and current (IPZ(t)) and an active rectifier (3) to produce a harvested DC voltage (Vhrv) and current (Ihrv) which charge a capacitance (C0). An enable circuit (17) causes a DC-DC converter (4) to be enabled, thereby discharging the capacitance into the converter, when a comparator (A0,A1) of the rectifier which controls switches (S1-S4) thereof detects a direction reversal of the AC output current (IPZ(t)). Another comparator (13) causes the enable circuit (17) to disable the converter (4) when the DC voltage exceeds a threshold (VREF), thereby causing the capacitance be recharged.

Abstract: An electronic device includes a bandgap reference voltage generation stage. The bandgap reference voltage generation stage comprises a device with a PN-junction, a current source feeding a first current during a first period of time and a second higher current during a second period of time through the PN-junction. The bandgap reference voltage is generated from a combination of a first voltage drop across the PN-junction during the first period of time and a second voltage drop across the PN-junction during the second period of time. This bandgap reference voltage is formed using switched capacitors.

Abstract: A method is provided. A low dropout regulator (LDO) is disabled during a first mode, and a first reference voltage is selected and applied to a switched-mode converter during the first mode. Also during the first mode, a first output voltage is generated by the switched-mode converter from a power supply, and a first capacitor is overcharged with the first output voltage. The LDO is then enabled during a second mode. During a first portion of a startup period for the second mode, a second capacitor is charged from the first capacitor, and a second reference voltage is selected and applied to the switched-mode converter. Then, during a second portion of the startup period for the second mode, the second capacitor is charged with the switched-mode converter.

Abstract: A system (1-2) for efficiently transferring harvested vibration energy to a battery (6) includes a piezo harvester (2) generating an AC output voltage (VP(t)) and current (IPZ(t)) and an active rectifier (3) to produce a harvested DC voltage (Vhrv) and current (Ihrv) which charge a capacitance (C0). An enable circuit (17) causes a DC-DC converter (4) to be enabled, thereby discharging the capacitance into the converter, when a comparator (A0,A1) of the rectifier which controls switches (S1-S4) thereof detects a direction reversal of the AC output current (IPZ(t)). Another comparator (13) causes the enable circuit (17) to disable the converter (4) when the DC voltage exceeds a threshold (VREF), thereby causing the capacitance be recharged.

Abstract: A voltage regulator controls a regulated output voltage (Vout) by feeding it back to a differential input stage (13) receiving a reference voltage (Vref) and applying an output (3) to a control electrode of a follower transistor (M4) that is coupled to an output stage (15) which generates the output voltage (Vout). The output stage operates pull-up (M7B) and pull-down (M5B) transistors in response to a signal (6A) produced by the follower transistor (M4) during normal regulation operation, and provides fast settling of the output voltage by turning on a transient pull-up transistor (M7A) or transient pull-down transistor (M5A) in response to the signal (6A) produced by the follower transistor (M4) during a fast increasing or decreasing transition, respectively, of the load current (IL). A filtering resistor (RFLT) is coupled between the output voltage and a common electrode of the transient pull-up and pull down transistors.

Abstract: An electronic device includes a bandgap reference voltage generation stage. The bandgap reference voltage generation stage comprises a device with a PN-junction, a current source feeding a first current during a first period of time and a second higher current during a second period of time through the PN-junction. The bandgap reference voltage is generated from a combination of a first voltage drop across the PN-junction during the first period of time and a second voltage drop across the PN-junction during the second period of time. This bandgap reference voltage is formed using switched capacitors.

Abstract: A voltage follower circuit including an input stage for generating a difference between the input signal and the output signal. An output circuit receiving the first signal and producing the output signal. A slew boost circuit includes a first transistor having a control electrode for receiving the input signal, a first electrode coupled to a first current source, and a second electrode coupled to a first supply voltage, a second transistor having a control electrode coupled to the first electrode of the first transistor, a first electrode coupled to the first signal, and a second electrode coupled to the first supply voltage, and a third transistor having a control electrode coupled to the first electrode of the first transistor, a first electrode coupled to the first signal, and a second electrode coupled to a second supply voltage.

Abstract: An electronic device includes a circuit for measuring a current in an inductor, wherein the current in the inductor is controlled by alternately switching a first power transistor and a second power transistor each having a first electrode, a second electrode and a control gate. The measuring circuit includes a first sense transistor having a first electrode, a second electrode and a control gate, the first sense transistor having the control gate coupled to the control gate of the first power transistor. A second electrode is coupled to the second electrode of the first power transistor. A second sense transistor has a first electrode, a second electrode and a control gate, the second sense transistor having the control gate coupled to the control gate of the second power transistor and having the second electrode coupled to the second electrode of the second power transistor.

Abstract: Charge pump circuitry (1) includes a master charge pump (2) including a voltage multiplier (5) and charge pump (30) which operate to produce a boosted, unregulated voltage (Vunreg), and also includes a slave charge pump (3) including a voltage multiplier (36) and charge pump (50) which operate to produce a boosted control voltage (Vctl) which then is filtered. The boosted, unregulated voltage (Vunreg) is regulated in response to the filtered, boosted control voltage (Vctl) to produce a boosted, regulated, low-noise voltage (Vreg). The boosted control voltage (Vctl), relative to a reference voltage (Vref_SH), is controlled by feedback circuitry (61,62,65) in response to the boosted, regulated, low-noise voltage (Vreg).

Abstract: A comparator (10) includes a first input transistor (M0) having a drain coupled to a gate and drain of a first diode-connected transistor (M2) and a gate of a first current mirror output transistor (M4), and a second input transistor (M1) having a drain coupled to a gate and drain of a second diode-connected transistor (M3) and a gate of a second current mirror output transistor (M5). Sources of the first and second current mirror output transistors are connected to a supply voltage (VDD). Gates of the first and second input transistors are coupled to first (VIN?) and second (VIN+) input signals, respectively. Sources of the first and second diode-connected transistors are coupled to drains of the first and second current mirror output transistors, respectively. A latch circuit (M8,M9) is coupled to the drains of the first and second current mirror output transistors.

Abstract: Charge pump circuitry (1) includes a master charge pump (2) including a voltage multiplier (5) and charge pump (30) which operate to produce a boosted, unregulated voltage (Vunreg), and also includes a slave charge pump (3) including a voltage multiplier (36) and charge pump (50) which operate to produce a boosted control voltage (Vctl) which then is filtered. The boosted, unregulated voltage (Vunreg) is regulated in response to the filtered, boosted control voltage (Vctl) to produce a boosted, regulated, low-noise voltage (Vreg). The boosted control voltage (Vctl), relative to a reference voltage (Vref_SH), is controlled by feedback circuitry (61,62,65) in response to the boosted, regulated, low-noise voltage (Vreg).

Abstract: A voltage follower circuit including an input stage for generating a difference between the input signal and the output signal. An output circuit receiving the first signal and producing the output signal. A slew boost circuit includes a first transistor having a control electrode for receiving the input signal, a first electrode coupled to a first current source, and a second electrode coupled to a first supply voltage, a second transistor having a control electrode coupled to the first electrode of the first transistor, a first electrode coupled to the first signal, and a second electrode coupled to the first supply voltage, and a third transistor having a control electrode coupled to the first electrode of the first transistor, a first electrode coupled to the first signal, and a second electrode coupled to a second supply voltage.

Abstract: A voltage regulator controls a regulated output voltage (Vout) by feeding it back to a differential input stage (13) receiving a reference voltage (Vref) and applying an output (3) to a control electrode of a follower transistor (M4) that is coupled to an output stage (15) which generates the output voltage (Vout). The output stage operates pull-up (M7B) and pull-down (M5B) transistors in response to a signal (6A) produced by the follower transistor (M4) during normal regulation operation, and provides fast settling of the output voltage by turning on a transient pull-up transistor (M7A) or transient pull-down transistor (M5A) in response to the signal (6A) produced by the follower transistor (M4) during a fast increasing or decreasing transition, respectively, of the load current (IL). A filtering resistor (RFLT) is coupled between the output voltage and a common electrode of the transient pull-up and pull down transistors.

Abstract: A method is provided. A first reference voltage during an idle mode is selected, and the first reference voltage is applied to a switched-mode converter. A first output voltage is then generated by the switched-mode converter from a power supply, and a capacitor is overcharged with the first output voltage. The first output voltage is regulated to generate a second output voltage during the idle mode. Then, a second reference voltage during a quiet mode, where the second reference voltage to the buck converter. During the quiet mode, a third output voltage is generated from the switched-mode converter and from discharging the overcharged capacitor, and the third output voltage is regulated to generate the second output voltage.

Abstract: A method is provided. A low dropout regulator (LDO) is disabled during a first mode, and a first reference voltage is selected and applied to a switched-mode converter during the first mode. Also during the first mode, a first output voltage is generated by the switched-mode converter from a power supply, and a first capacitor is overcharged with the first output voltage. The LDO is then enabled during a second mode. During a first portion of a startup period for the second mode, a second capacitor is charged from the first capacitor, and a second reference voltage is selected and applied to the switched-mode converter. Then, during a second portion of the startup period for the second mode, the second capacitor is charged with the switched-mode converter.

Abstract: A comparator (10) includes a first input transistor (M0) having a drain coupled to a gate and drain of a first diode-connected transistor (M2) and a gate of a first current mirror output transistor (M4), and a second input transistor (M1) having a drain coupled to a gate and drain of a second diode-connected transistor (M3) and a gate of a second current mirror output transistor (M5). Sources of the first and second current mirror output transistors are connected to a supply voltage (VDD). Gates of the first and second input transistors are coupled to first (VIN?) and second (VIN+) input signals, respectively. Sources of the first and second diode-connected transistors are coupled to drains of the first and second current mirror output transistors, respectively. A latch circuit (M8,M9) is coupled to the drains of the first and second current mirror output transistors.

Abstract: A system for managing AC energy harvested from a harvesting device (1) including a coil (4) including switching circuitry (S1-S4) coupled between first (7A) and second (7B) terminals of the coil. The switching circuitry includes first (S1), second (S2), third (S1), and fourth (S4) switches. A switch controller (17) closes the second and fourth switches to allow build-up of current (ILh) in the coil, opens one of the second and fourth switches, and closes a corresponding one of the third and first switches in response to the built-up inductor current reaching a predetermined threshold value (Ihrv) to steer the built-up inductor current through the corresponding one of the third and first switches to a current-receiving device (24 and/or RL, CL).

Abstract: An active rectifier (12) couples a first input voltage (Vin1) to a first electrode of a first transistor (M3) having a second electrode coupled to an output (4) conducting an output voltage (Vout), and couples a second input voltage (Vin2) to a first electrode of a second transistor (M4) having a second electrode coupled to the output conductor. A first amplifier (A1) controls a voltage (V16) of a gate of the first transistor to maintain an input offset of the first amplifier between the first input voltage and the output voltage while the first input voltage exceeds the output voltage, and a second amplifier (A2) controls a voltage (V15) on a gate of the second transistor to maintain an input offset between the second input voltage and the output voltage while the first input voltage exceeds the output voltage. The input offsets prevent backflow of current from the output to either of the first electrodes when the first or second input is nearly equal to the output voltage.