Abstract: Power management circuitry (7-2,3,4) for converting a harvested voltage (Vhrv) to an output voltage (VBAT) applied to a battery (6) includes an inductor (L0) having a first terminal (3) coupled to receive the harvested voltage (Vhrv) and a second terminal coupled to a first terminal of a first switch (S0). The power management circuitry transfers the current generated by an energy harvester (2) to the battery if it (6) is not fully charged, and shunts the current away from the battery (6) to avoid overcharging if it is fully charged.

Abstract: An oscillator includes oscillator circuitry (8) including a transconductance stage (2) and a resonator (3). A comparator (10) produces first (CLK) and second (/CLK) clock signals which indicate the timing of positive and negative phases of a differential output signal (VIN+?VIN?) produced by the transconductance circuit in response to the resonator. A synchronous rectifier (14) converts the differential output signal to a current (IRECT) in response to the first and second clock signals. A switched capacitor notch filter (15) filters the current in response to the first and second clock signals. A control current (ICONTROL) which controls the transconductance of the transconductance circuit is generated in response to the notch filter. The resonator may be a MEMS resonator.

Abstract: An oscillator includes oscillator circuitry (8) including a transconductance stage (2) and a resonator (3). A comparator (10) produces first (CLK) and second (/CLK) clock signals which indicate the timing of positive and negative phases of a differential output signal (VIN+-VIN?) produced by the transconductance circuit in response to the resonator. A synchronous rectifier (14) converts the differential output signal to a current (IRECT) in response to the first and second clock signals. A switched capacitor notch filter (15) filters the current in response to the first and second clock signals. A control current (ICONTROL) which controls the transconductance of the transconductance circuit is generated in response to the notch filter. The resonator may be a MEMS resonator.

Abstract: A converter (10) for converting a first DC voltage (VDD) to a second DC voltage (VOUT) includes an output stage (40) for producing the second DC voltage (VOUT) in response to both the first DC voltage (VDD) and an output of an error amplifier (20). A sampling circuit (15) periodically energizes a voltage divider (R0,R1) by periodically coupling a first terminal thereof to the second DC voltage and periodically coupling an output (14) of the energized voltage divider to a feedback conductor (7) to refresh a feed back capacitor (C0) coupled between the second DC voltage and the feedback conductor. The feedback conductor is coupled to an input of the error amplifier.

Abstract: An LDO regulator (10) produces an output voltage (Vout) by applying the output voltage to a feedback input (6) of a differential input stage (10A) and applying an output (3) of the differential input stage to a gate of a first follower transistor (MP4) having a source coupled to an input (8) of a class AB output stage (10C) which generates the output voltage. Demanded load current is supplied by the output voltage during a dip in its value to a gate of a second follower transistor (MP5) having a gate coupled to the output of the input stage to decrease current in a current mirror (MN5,6) having an output coupled to a current source (I1) and a gate of an amplifying transistor (MN7). This causes the current source to rapidly turn on the amplifying transistor to cause it to rapidly turn on a cascode transistor (MN3), causing it to turn on a pass transistor (MP3) of the output stage.

Abstract: A start up circuit (4-1) for a boost circuit (10) includes an adjustable-duty-cycle oscillator (1-2) that turns on a switch transistor (MSW) connected to an inductor (L) receiving an input voltage (VIN). If a voltage (V9) of a junction between the transistor and the inductor exceeds a predetermined value corresponding to a maximum inductor current (IL), an amplifier (A1) immediately terminates a first phase of an oscillator cycle, which turns off the transistor. Built-up inductor current is steered into a load. Duty-cycle-adjustment circuitry (R1,R2,C1) causes the oscillator to complete a normal second phase of the cycle before a new cycle begins.

Abstract: A system (1-2) for efficiently transferring harvested vibration energy to a battery (6) includes a piezo harvester (2) generating an AC output voltage (VP(t)) and current (IPZ(t)) and an active rectifier (3) to produce a harvested DC voltage (Vhrv) and current (Ihrv) which charge a capacitance (C0). An enable circuit (17) causes a DC-DC converter (4) to be enabled, thereby discharging the capacitance into the converter, when a comparator (A0,A1) of the rectifier which controls switches (S1-S4) thereof detects a direction reversal of the AC output current (IPZ(t)). Another comparator (13) causes the enable circuit (17) to disable the converter (4) when the DC voltage exceeds a threshold (VREF), thereby causing the capacitance be recharged.

Abstract: An energy harvesting system for transferring energy from an energy harvester (2) having an output impedance (Zi) to a DC-DC converter (10) includes a maximum power point tracking (MPPT) circuit (12) including a replica impedance (ZR) which is a multiple (N) of the output impedance. The MPPT circuit applies a voltage across the replica impedance that is equal to an output voltage (Vin) of the harvester to generate a feedback current (IZR) which is equal to an input current (Iin) received from the harvester, divided by the multiple (N), to provide maximum power point tracking between the harvester and the converter.

Abstract: Power management circuitry (7-2,3,4) for converting a harvested voltage (Vhrv) to an output voltage (VBAT) applied to a battery (6) includes an inductor (L0) having a first terminal (3) coupled to receive the harvested voltage (Vhrv) and a second terminal coupled to a first terminal of a first switch (S0). The power management circuitry transfers the current generated by an energy harvester (2) to the battery if it (6) is not fully charged, and shunts the current away from the battery (6) to avoid overcharging if it is fully charged.

Abstract: A converter (10) for converting a first DC voltage (VDD) to a second DC voltage (VOUT) includes an output stage (40) for producing the second DC voltage (VOUT) in response to both the first DC voltage (VDD) and an output of an error amplifier (20). A sampling circuit (15) periodically energizes a voltage divider (R0,R1) by periodically coupling a first terminal thereof to the second DC voltage and periodically coupling an output (14) of the energized voltage divider to a feedback conductor (7) to refresh a feed back capacitor (C0) coupled between the second DC voltage and the feedback conductor. The feedback conductor is coupled to an input of the error amplifier.

Abstract: A system for managing AC energy harvested from a harvesting device (1) including a coil (4) including switching circuitry (S1-S4) coupled between first (7A) and second (7B) terminals of the coil. The switching circuitry includes first (S1), second (S2), third (S1), and fourth (S4) switches. A switch controller (17) closes the second and fourth switches to allow build-up of current (ILh) in the coil, opens one of the second and fourth switches, and closes a corresponding one of the third and first switches in response to the built-up inductor current reaching a predetermined threshold value (Ihrv) to steer the built-up inductor current through the corresponding one of the third and first switches to a current-receiving device (24 and/or RL,CL).

Abstract: A start up circuit (4-1) for a boost circuit (10) includes an adjustable-duty-cycle oscillator (1-2) that turns on a switch transistor (MSW) connected to an inductor (L) receiving an input voltage (VIN). If a voltage (V9) of a junction between the transistor and the inductor exceeds a predetermined value corresponding to a maximum inductor current (IL), an amplifier (A1) immediately terminates a first phase of an oscillator cycle, which turns off the transistor. Built-up inductor current is steered into a load. Duty-cycle-adjustment circuitry (R1,R2,C1) causes the oscillator to complete a normal second phase of the cycle before a new cycle begins.

Abstract: An active rectifier (12) couples a first input voltage (Vin1) to a first electrode of a first transistor (M3) having a second electrode coupled to an output (4) conducting an output voltage (Vout), and couples a second input voltage (Vin2) to a first electrode of a second transistor (M4) having a second electrode coupled to the output conductor. A first amplifier (A1) controls a voltage (V16) of a gate of the first transistor to maintain an input offset of the first amplifier between the first input voltage and the output voltage while the first input voltage exceeds the output voltage, and a second amplifier (A2) controls a voltage (V15) on a gate of the second transistor to maintain an input offset between the second input voltage and the output voltage while the first input voltage exceeds the output voltage. The input offsets prevent backflow of current from the output to either of the first electrodes when the first or second input is nearly equal to the output voltage.

Abstract: An electronic device includes a circuit for measuring a current in an inductor, wherein the current in the inductor is controlled by alternately switching a first power transistor and a second power transistor each having a first electrode, a second electrode and a control gate. The measuring circuit includes a first sense transistor having a first electrode, a second electrode and a control gate, the first sense transistor having the control gate coupled to the control gate of the first power transistor. A second electrode is coupled to the second electrode of the first power transistor. A second sense transistor has a first electrode, a second electrode and a control gate, the second sense transistor having the control gate coupled to the control gate of the second power transistor and having the second electrode coupled to the second electrode of the second power transistor.

Abstract: A high efficiency precision amplifier which comprises a linear amplifier stage, a class D amplifier stage and a set of switches is provided. Both amplifier stages receive the same input signal. The load is driven by the output of the linear amplifier stage. The set of switches connect the output of the class D amplifier stage to either of the positive and negative supply terminals of the linear amplifier stage and the other of the positive and negative supply terminals of the linear amplifier stage to a negative or positive supply, depending on the polarity of the signal being amplified.

Abstract: Variable gain circuitry includes a first input transistor (M1) having a source coupled to a first conductor (32), a gate coupled to a first input voltage (Vin+), and a drain coupled to a second conductor (30). An input of a first current mirror (M3,M4) is coupled to the second conductor to receive a current corresponding to the difference between the first input voltage and a second input voltage (Vin?). An output of the first current mirror is coupled to a source of current (M2). A first transistor (M5) has a gate coupled to a third conductor (31), a source coupled to a reference voltage (VSS), and a drain coupled to conduct output current (Iout). A second transistor (M6) and a resistive element (M7) are coupled in series between the third conductor and the first reference voltage (VSS), a gate of the second transistor being coupled to the third conductor to produce a nonlinear relationship between currents of the first transistor and the second transistor.

Abstract: An electronic device has an LDO regulator for varying loads. The LDO regulator includes a primary supply node coupled to a primary voltage supply. An output node provides a secondary supply voltage and a load current. A bias current source generates a bias current. A gain stage coupled to the bias current source increases the maximum available load current. The gain stage includes a first MOS transistor biased in weak inversion coupled to a current mirror which mirrors the drain current through the first MOS transistor to the output node. The gate-source voltage of the first MOS transistor increases in response to a decreasing secondary supply voltage level at the output node to increase the available load current.

Abstract: An LDO regulator (10) produces an output voltage (Vout) by applying the output voltage to a feedback input (6) of a differential input stage (10A) and applying an output (3) of the differential input stage to a gate of a first follower transistor (MP4) having a source coupled to an input (8) of a class AB output stage (10C) which generates the output voltage. Demanded load current is supplied by the output voltage during a dip in its value to a gate of a second follower transistor (MP5) having a gate coupled to the output of the input stage to decrease current in a current mirror (MN5,6) having an output coupled to a current source (I1) and a gate of an amplifying transistor (MN7). This causes the current source to rapidly turn on the amplifying transistor to cause it to rapidly turn on a cascode transistor (MN3), causing it to turn on a pass transistor (MP3) of the output stage.

Abstract: A high efficiency precision amplifier which comprises a linear amplifier stage, a class D amplifier stage and a set of switches is provided. Both amplifier stages receive the same input signal. The load is driven by the output of the linear amplifier stage. The set of switches connect the output of the class D amplifier stage to either of the positive and negative supply terminals of the linear amplifier stage and the other of the positive and negative supply terminals of the linear amplifier stage to a negative or positive supply, depending on the polarity of the signal being amplified.

Abstract: Variable gain circuitry includes a first input transistor (M1) having a source coupled to a first conductor (32), a gate coupled to a first input voltage (Vin+), and a drain coupled to a second conductor (30). An input of a first current mirror (M3,M4) is coupled to the second conductor to receive a current corresponding to the difference between the first input voltage and a second input voltage (Vin?). An output of the first current mirror is coupled to a source of current (M2). A first transistor (M5) has a gate coupled to a third conductor (31), a source coupled to a reference voltage (VSS), and a drain coupled to conduct output current (Iout). A second transistor (M6) and a resistive element (M7) are coupled in series between the third conductor and the first reference voltage (VSS), a gate of the second transistor being coupled to the third conductor to produce a nonlinear relationship between currents of the first transistor and the second transistor.