Abstract: Methods and apparatus to manage operation of variable-state computing devices using artificial intelligence are disclosed. An example computing device includes a hardware platform. The example computing device also includes an artificial intelligence (AI) engine to: determine a context of the device; and adjust an operation of the hardware platform based on an expected change in the context of the device. The adjustment modifies at least one of a computational efficiency of the device, a power efficiency of the device, or a memory response time of the device.

Abstract: The present invention is directed to a method for booting a system-on-chip (SoC) including the steps of directly executing a boot software from an on-chip magnetic random access memory (MRAM) residing on a same semiconductor as the SoC; directly executing an operating system software from an external MRAM by the SoC without loading the operating system into a volatile memory; and directly executing an application software from the external MRAM by the SoC, wherein the external MRAM is coupled to the SoC and is configured for storing the operating system software and the application software.

Abstract: A system for positioning a patient before, during or after a medical procedure can include an arm assembly having a proximal end, an opposing distal end, and at least one joint therebetween. The joint can be configured to permit the distal end of the arm assembly to move with respect to the proximal end of the arm assembly. The proximal end of the arm assembly can be configured to be fixed with respect to a surgical table. The system can also include a ball joint mechanism attached to the distal end of the arm assembly and to a head support configured to support a patient's head. The ball joint mechanism can include a ball joint and a motor. Activation of the motor can permit or prevent movement of the ball joint.

Abstract: Image data representative of an inventory location may be acquired by cameras. Described are techniques to process such image data to remove one or more perspective effects. For example, transformation data that corresponds to the inventory location may first be determined. Such transformation data is determined based on associations between points in a common plane and alternate points in a virtual camera plane. Transformed image data may then be generated by applying the transformation data to the image data that is representative of the inventory location.

Abstract: Apparatus for obstructing air flow through an aperture in an aircraft wing where a movable anti-icing duct extends through the aperture are disclosed. An exemplary apparatus comprises a base member (40) configured to be secured to the duct and a first seal member (42) configured to obstruct air flow through the aperture. The first seal member comprises a proximal portion (42A) connected to the base member and a distal portion (42B) configured to movably contact an inner surface of a skin of the wing. The use of such apparatus may reduce the amount of leakage flow from the high pressure lower wing surface to the low pressure upper wing surface through the aperture and thereby reduce the loss of lift associated with such leakage flow.

Abstract: Transistor structures may include a metal oxide contact buffer between a portion of a channel material and source or drain contact metallization. The contact buffer may improve control of transistor channel length by limiting reaction between contact metallization and the channel material. The channel material may be of a first composition and the contact buffer may be of a second composition.

Abstract: A vertical transistor structure includes a material stack having a source material, a drain material, and a channel material therebetween. The vertical transistor structure further includes a gate electrode adjacent to a sidewall of the stack, where the sidewall includes the channel material, and at least a partial thickness of both the source material and the drain material. A gate dielectric is present between the sidewall of the stack and the gate electrode. The vertical transistor structure further includes a first metallization over a first area of the stack above the gate dielectric layer, and in contact with the gate electrode on sidewall of the stack. A second metallization is adjacent to the first metallization, where the second metallization is over a second area of the stack, and in contact with the source material or the drain material.

Abstract: In memory devices where a memory cell includes a thin film cell select transistor, selection between layers of such memory cells may further comprise another thin film select transistor. Bitline and wordline encoding suitable for a memory device having a single layer of memory cells may be scaled up to a 3D memory device having two or more memory cell layers. In a DRAM device one layer of (1TFT-1C) cells may include a 2D array of metal-insulator-metal capacitors over an array of TFTs. Additional layers of such 1TFT-1C cells may be stacked monolithically to form a 3D array. Memory cells in each layer may be accessed through a wordline and local bitline. A local bitline of one cell layer may be coupled to global bitline applicable to all cell layers through a layer-selected TFT according to a voltage applied to a layer-select gate voltage.

Abstract: Architectures and techniques for co-integration of heterogeneous materials, such as group III-V semiconductor materials and group IV semiconductors (e.g., Ge) on a same substrate (e.g. silicon). In embodiments, multi-layer heterogeneous semiconductor material stacks having alternating nanowire and sacrificial layers are employed to release nanowires and permit formation of a coaxial gate structure that completely surrounds a channel region of the nanowire transistor. In embodiments, individual PMOS and NMOS channel semiconductor materials are co-integrated with a starting substrate having a blanket layers of alternating Ge/III-V layers. In embodiments, vertical integration of a plurality of stacked nanowires within an individual PMOS and individual NMOS device enable significant drive current for a given layout area.

Abstract: In implementations of collecting multimodal image editing requests (IERs), a user interface is generated that exposes an image pair including a first image and a second image including at least one edit to the first image. A user simultaneously speaks a voice command and performs a user gesture that describe an edit of the first image used to generate the second image. The user gesture and the voice command are simultaneously recorded and synchronized with timestamps. The voice command is played back, and the user transcribes their voice command based on the play back, creating an exact transcription of their voice command. Audio samples of the voice command with respective timestamps, coordinates of the user gesture with respective timestamps, and a transcription are packaged as a structured data object for use as training data to train a neural network to recognize multimodal IERs in an image editing application.

Abstract: Images of a fixture may be acquired by cameras positioned with a field-of-view of the fixture. Such images are processed to identify estimated tops of items at the fixture. Using the estimated tops and item data for items designated for stowage at the fixture, one or more estimated locations of items (such as bounding boxes representative of the items) may be determined. Each estimated location for an item is tested for validity. For example, each estimated location is checked to see if the estimated location is within a working volume of the fixture. If the estimated location of the item is within the working volume, the item is determined to be valid. Otherwise, the item is deemed invalid.

Abstract: Methods for using polymeric systems that maintain particle dispersions for extended periods of time, and methods for using dry polymeric systems that are able to undergo fast hydration.

Abstract: The present invention is directed to a method for booting a system-on-chip (SoC) including the steps of directly executing a boot software from an on-chip magnetic random access memory (MRAM) residing on a same semiconductor as the SoC; directly executing an operating system software from an external MRAM by the SoC without loading the operating system into a volatile memory; and directly executing an application software from the external MRAM by the SoC, wherein the external MRAM is coupled to the SoC and is configured for storing the operating system software and the application software.

Abstract: A power gating switch is described at a local cell level of an integrated circuit die. In one example a plurality of logic cells have a data input line and a data output line and a power supply input to receive power to drive circuits of the logic cell. A power switch for each logic cell is coupled between a power supply and the power supply input of the respective logic cell to control power being connected from the power supply to the respective logic cell.

Abstract: A subfin leakage problem with respect to the silicon-germanium (SiGe)/shallow trench isolation (STI) interface can be mitigated with a halo implant. A halo implant is used to form a highly resistive layer. For example, a silicon substrate layer 204 is coupled to a SiGe layer, which is coupled to a germanium (Ge) layer. A gate is disposed on the Ge layer. An implant is implanted in the Ge layer that causes the layer to become more resistive. However, an area does not receive the implant due to being protected (or covered) by the gate. The area remains less resistive than the remainder of the Ge layer. In some embodiments, the resistive area of a Ge layer can be etched and/or an undercuttage (etch undercut or EUC) can be performed to expose the unimplanted Ge area of the Ge layer.

Abstract: The present invention is directed to a method for booting a system-on-chip (SoC) including the steps of directly executing a boot software from an on-chip magnetic random access memory (MRAM) residing on a same semiconductor as the SoC; storing an operating system (OS) software and an application software on an external MRAM; directly executing the operating system software from the external MRAM by the SoC without loading the operating system into a volatile memory; directly executing the application software from the external MRAM by the SoC, wherein the external MRAM is coupled to the SoC and is configured for permanently storing the operating system software and the application software.

Abstract: An imaging device includes a grin lens having a proximal end and a distal end, wherein the grin lens is made from a polymeric material, an optical fiber having a distal end coupled to the proximal end of the grin lens, and a beam director coupled to the distal end of the grin lens, wherein the beam director is configured to direct light at an angle relative to a longitudinal axis of the optical fiber.

Abstract: Techniques and mechanisms for providing data to be used in an in-memory computation at a memory device. In an embodiment a memory device comprises a first memory array and circuitry, coupled to the first memory array, to perform a data computation based on data stored at the first memory array. Prior to the computation, the first memory array receives the data from a second memory array of the memory device. The second memory array extends horizontally in parallel with, but is offset vertically from, the first memory array. In another embodiment, a single integrated circuit die includes both the first memory array and the second memory array.

Abstract: In implementations of collecting multimodal image editing requests (IERs), a user interface is generated that exposes an image pair including a first image and a second image including at least one edit to the first image. A user simultaneously speaks a voice command and performs a user gesture that describe an edit of the first image used to generate the second image. The user gesture and the voice command are simultaneously recorded and synchronized with timestamps. The voice command is played back, and the user transcribes their voice command based on the play back, creating an exact transcription of their voice command. Audio samples of the voice command with respective timestamps, coordinates of the user gesture with respective timestamps, and a transcription are packaged as a structured data object for use as training data to train a neural network to recognize multimodal IERs in an image editing application.

Abstract: An imaging device includes a grin lens having a proximal end and a distal end, wherein the grin lens is made from a polymeric material, an optical fiber having a distal end coupled to the proximal end of the grin lens, and a beam director coupled to the distal end of the grin lens, wherein the beam director is configured to direct light at an angle relative to a longitudinal axis of the optical fiber.