Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a substrate; a multilayer stack of reflective layers on the substrate; a capping layer on the multilayer stack of reflecting layers; and an absorber layer on the capping layer, the absorber layer made from amorphous tantalum nitride formed by non-reactive sputtering.

Abstract: Physical vapor deposition target assemblies and methods of manufacturing such target assemblies are disclosed. An exemplary target assembly comprises a flow pattern including a plurality of arcs and bends fluidly connected to an inlet end and an outlet end.

Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a substrate; a multilayer stack of reflective layers on the substrate; a capping layer on the multilayer stack of reflecting layers; and an absorber layer including an alloy of tantalum and copper on the capping layer.

Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a substrate having a first side and a second side; a backside coating layer comprising an alloy of tantalum and nickel on the first side of the substrate; a multilayer stack of reflective layers on the second side of the substrate, the multilayer stack of reflective layers including a plurality of reflective layers including reflective layer pairs; a capping layer on the multilayer stack of reflecting layers; and an absorber layer on the capping layer.

Abstract: A physical vapor deposition (PVD) chamber and a method of operation thereof are disclosed. Chambers and methods are described that provide a chamber comprising one or more of contours that reduce particle defects, temperature control and or measurement and and/or voltage particle traps to reduce processing defects.

Abstract: Embodiments of methods for depositing doped transition metal oxides are provided herein. In some embodiments, a method of depositing a doped transition metal oxide layer includes: sputtering a first target comprising a transition metal while providing a source of oxygen atoms; sputtering a second target comprising a dopant element; and forming a doped transition metal oxide layer on a substrate from the sputtered transition metal, oxygen atoms, and dopant element. The first target can be formed from a transition metal or a transition metal oxide.

Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a substrate; a multilayer stack of reflective layers on the substrate; a capping layer on the multilayer stack of reflecting layers; and an absorber layer on the capping layer, the absorber layer made from an alloy of tantalum and nickel.

Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture, and production systems therefor are disclosed. The method for forming an EUV mask blank comprises placing a substrate in a multi-cathode physical vapor deposition chamber, the chamber comprising at least three targets, a first molybdenum target adjacent a first side of a silicon target and a second molybdenum target adjacent a second side of the silicon target.

Abstract: A deposition system, and a method of operation thereof are disclosed. The deposition system comprises a cathode assembly comprising a rotating magnet assembly including a plurality of outer peripheral magnets surrounding an inner peripheral magnet.

Abstract: A deposition system and a method of operation thereof are disclosed. A PVD chamber is disclosed comprising a plurality of cathode assemblies, a rotating shield below the plurality of cathode assemblies to expose one of the plurality cathode assemblies through the shroud and through a shield hole of the shield, the shield comprising a top surface including a raised peripheral frame. A shield mount sized and shaped to engage with the raised peripheral frame to secure the shield mount to the shield secures the shield mount to the shield.

Abstract: Magnetrons for plasma sputter chambers, plasma sputter chambers including magnetrons and methods of processing a substrate such as an EUV mask blank in a plasma sputter chamber are disclosed. The magnetron comprises a plurality of elongate magnets arranged in a pattern where there is an unbalance ratio greater than 1 and less than 3.

Abstract: Magnetrons for plasma sputter chambers, plasma sputter chambers including magnetrons and methods of processing a substrate such as an EUV mask blank in a plasma sputter chamber are disclosed. The magnetron comprises a plurality of elongate magnets arranged in a pattern where there is an unbalance ratio greater than 1 and less than 3.

Abstract: Physical vapor deposition processing chambers and methods of processing a substrate such as an EUV mask blank in a physical vapor deposition chamber are disclosed. An electric field and a magnetic field are utilized to deflect particles from a substrate being processed in the chamber.

Abstract: Physical vapor deposition target assemblies and methods of manufacturing such target assemblies are disclosed. An exemplary target assembly comprises a flow pattern including a plurality of arcs and bends fluidly connected to an inlet end and an outlet end.

Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a an absorber layer on the capping layer, the absorber layer made from an alloy of at least two absorber materials.

Abstract: Extreme ultraviolet (EUV) mask blanks, methods for their manufacture and production systems therefor are disclosed. The EUV mask blanks comprise a multilayer stack of absorber layers on the capping layer, the multilayer stack of absorber layers including a plurality of absorber layer pairs.

Abstract: Methods are provided for fabricating a process structure, such as a mask or mask blank. The methods include, for instance: providing a silicon substrate; forming a multi-layer, extreme ultra-violet lithography (EUVL) structure over the silicon substrate; subsequent to forming the multi-layer EUVL structure over the crystalline substrate, reducing a thickness of the silicon substrate; and attaching a low-thermal-expansion material (LTEM) substrate to one of the multi-layer EUVL structure, or the reduced silicon substrate. In one implementation, the silicon substrate is a silicon wafer with a substantially defect-free surface upon which the multi-layer EUVL structure is formed. The multi-layer EUVL structure may include multiple bi-layers of a first material and a second material, as well as a capping layer, and optionally, an absorber layer, where the absorber layer is patternable to facilitating forming a EUVL mask from the process structure.

Abstract: Methods are provided for fabricating a process structure, such as a mask or mask blank. The methods include, for instance: providing a silicon substrate; forming a multi-layer, extreme ultra-violet lithography (EUVL) structure over the silicon substrate; subsequent to forming the multi-layer EUVL structure over the crystalline substrate, reducing a thickness of the silicon substrate; and attaching a low-thermal-expansion material (LTEM) substrate to one of the multi-layer EUVL structure, or the reduced silicon substrate. In one implementation, the silicon substrate is a silicon wafer with a substantially defect-free surface upon which the multi-layer EUVL structure is formed. The multi-layer EUVL structure may include multiple bi-layers of a first material and a second material, as well as a capping layer, and optionally, an absorber layer, where the absorber layer is patternable to facilitating forming a EUVL mask from the process structure.

Abstract: A deposition chamber shield having a stainless steel coating of from about 100 microns to about 250 microns thick wherein the coated shield has a surface roughness of between about 300 microinches and about 800 microinches and a surface particle density of less than about 0.1 particles/mm2 of particles between about 1 micron and about 5 microns in size and no particles below about 1 micron in size, and process for production thereof is disclosed.

Abstract: A process for cleaning and restoring deposition shield surfaces which results in a cleaned shield having a surface roughness of between about 200 microinches and about 500 microinches and a particle surface density of less than about 0.1 particles/mm2 of particles between about 1 micron and about 5 microns in size and no particles less than about 1 micron in size and method for use thereof is disclosed.