Patents by Inventor Vikram Singh

Vikram Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150029303
    Abstract: The disclosure relates to video telephony and, more particularly, to techniques for detecting a video pause in a video telephony application. In one example of the disclosure, a method for video telephony comprises detecting, at a receiving device, that video data packets associated with a video telephony call have stopped arriving from a sending device, and determining that the sending device has paused a video portion of the video telephony call based on information contained in video control packets.
    Type: Application
    Filed: April 21, 2014
    Publication date: January 29, 2015
    Applicant: QUALCOMM Incorporated
    Inventors: Tien-Hsin Lee, Min Wang, Radhika Agrawal, Vikram Singh, Nathan Allan Rickey
  • Patent number: 8937004
    Abstract: A plasma processing apparatus comprises a plasma source configured to produce a plasma in a plasma chamber, such that the plasma contains ions for implantation into a workpiece. The apparatus also includes a focusing plate arrangement having an aperture arrangement configured to modify a shape of a plasma sheath of the plasma proximate the focusing plate such that ions exiting an aperture of the aperture arrangement define focused ions. The apparatus further includes a processing chamber containing a workpiece spaced from the focusing plate such that a stationary implant region of the focused ions at the workpiece is substantially narrower that the aperture. The apparatus is configured to create a plurality of patterned areas in the workpiece by scanning the workpiece during ion implantation.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: January 20, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Anthony Renau, Ludovic Godet, Timothy J. Miller, Joseph C. Olson, Vikram Singh, James Buonodono, Deepak A. Ramappa, Russell J. Low, Atul Gupta, Kevin M. Daniels
  • Patent number: 8926850
    Abstract: Plasma processing with enhanced charge neutralization and process control is disclosed. In accordance with one exemplary embodiment, the plasma processing may be achieved as a method of plasma processing a substrate. The method may comprise providing the substrate proximate a plasma source; applying to the plasma source a first RF power level during a first period and a second RF power level during a second period, the first and second RF power levels being greater than zero RF power level, wherein the second RF power level is greater than the first RF power level; generating with the plasma source a first plasma during the first period and a second plasma during the second period; and applying to the substrate a first bias voltage during the first period and a second bias voltage during the second period, wherein the first voltage has more negative potential than the second voltage.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: January 6, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Vikram Singh, Timothy J. Miller, Bernard G. Lindsay
  • Publication number: 20140355126
    Abstract: An electronic device comprising a cover plate is disclosed. The cover plate comprises one or more thin sapphire layers having a thickness of from about 50 microns to about 500 microns. Also disclosed are methods for preparing these thin sapphire layers.
    Type: Application
    Filed: May 28, 2014
    Publication date: December 4, 2014
    Applicant: GTAT CORPORATION
    Inventors: Thomas Gutierrez, Vikram Singh
  • Patent number: 8877654
    Abstract: A plasma processing method is provided. The plasma processing method includes using the after-glow of a pulsed power plasma to perform conformal processing. During the afterglow, the equipotential field lines follow the contour of the workpiece surface, allowing ions to be introduced in a variety of incident angles, especially to non-planar surfaces. In another aspect of the disclosure, the platen may be biased positively during the plasma afterglow to attract negative ions toward the workpiece. Various conformal processing steps, such as implantation, etching and deposition may be performed.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: November 4, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Helen Maynard, Vikram Singh, Svetlana Radovanov, Harold Persing
  • Publication number: 20140306127
    Abstract: A method of treating resist features comprises positioning, in a process chamber, a substrate having a set of patterned resist features on a first side of the substrate and generating a plasma in the process chamber having a plasma sheath adjacent to the first side of the substrate. The method may further comprise modifying a shape of a boundary between the plasma and the plasma sheath with a plasma sheath modifier so that a portion of the shape of the boundary is not parallel to a plane defined by a front surface of the substrate facing the plasma, wherein ions from the plasma impinge on the patterned resist features over a wide angular range during a first exposure.
    Type: Application
    Filed: May 28, 2014
    Publication date: October 16, 2014
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Ludovic Godet, Patrick M. Martin, Timothy J. Miller, Vikram Singh
  • Patent number: 8858816
    Abstract: A plasma processing tool is used to deposit material on a workpiece. For example, a method for conformal deposition of material is disclosed. In this embodiment, the plasma sheath shape is modified to allow material to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of different features can be deposited onto. In another embodiment, a plasma processing tool is used to etch a workpiece. In this embodiment, the plasma sheath shape is altered to allow ions to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of differently shaped features can be created.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: October 14, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ludovic Godet, Timothy Miller, George Papasouliotis, Vikram Singh
  • Publication number: 20140304561
    Abstract: A memory repair mechanism for the memories clustered across the multiple power domains and can be switched on and off independent of each other, thereby enabling low power operation. Enhancements in the shared Fuse Wrapper Architecture enable sharing of a plurality of parallel links connecting the memory blocks of each power domains to the Shared Fuse Wrapper architecture.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 9, 2014
    Inventors: Viraj Vikram SINGH, Ashish BANSAL, Rangarajan RAMANUJAM
  • Patent number: 8778603
    Abstract: A method of treating resist features comprises positioning, in a process chamber, a substrate having a set of patterned resist features on a first side of the substrate and generating a plasma in the process chamber having a plasma sheath adjacent to the first side of the substrate. The method may further comprise modifying a shape of a boundary between the plasma and the plasma sheath with a plasma sheath modifier so that a portion of the shape of the boundary is not parallel to a plane defined by a front surface of the substrate facing the plasma, wherein ions from the plasma impinge on the patterned resist features over a wide angular range during a first exposure.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: July 15, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ludovic Godet, Patrick M. Martin, Timothy J. Miller, Vikram Singh
  • Patent number: 8775880
    Abstract: A memory repair mechanism for the memories clustered across the multiple power domains and can be switched on and off independent of each other, thereby enabling low power operation. Enhancements in the shared Fuse Wrapper Architecture enable sharing of a plurality of parallel links connecting the memory blocks of each power domains to the Shared Fuse Wrapper architecture.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: July 8, 2014
    Assignee: STMicroelectronics Intenational N.V.
    Inventors: Viraj Vikram Singh, Ashish Bansal, Rangarajan Ramanujam
  • Patent number: 8775775
    Abstract: A method for reading data from data storage is disclosed. A prefetch hint identifying a chunk of data a requesting node anticipates the requesting node will request that a controller retrieve from data storage is received. The prefetch hint is stored in a buffer at the controller. A determination that the prefetch hint is ready for processing is made. The determination is based at least in part on an offset or other data indicating a place of the chunk of data within a sequence of related chunks of data one or more of which may have been read previously into a cache of the controller. The prefetch hint is processed in response to determining that the prefetch hint is ready for processing, including by reading the chunk of data from a data storage of the controller and storing the chunk of data in the cache.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: July 8, 2014
    Assignee: EMC Corporation
    Inventors: Dhanabal Ekambaram, Pratap Vikram Singh
  • Patent number: 8679960
    Abstract: A method of processing a substrate having horizontal and non-horizontal surfaces is disclosed. The substrate is implanted with particles using an ion implanter. During the ion implant, due to the nature of the implant process, a film may be deposited on the surfaces, wherein the thickness of this film is thicker on the horizontal surfaces. The presences of this film may adversely alter the properties of the substrate. To rectify this, a second process step is performed to remove the film deposited on the horizontal surfaces. In some embodiments, an etching process is used to remove this film. In some embodiments, a material modifying step is used to change the composition of the material comprising the film. This material modifying step may be instead of, or in addition to the etching process.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: March 25, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: George D. Papasouliotis, Vikram Singh, Heyun Yin, Helen L. Maynard, Ludovic Godet
  • Publication number: 20140061024
    Abstract: A feed device for a distillation tower or column with a flash zone, wash zone and stripping zone has an annular, open-bottomed channel located around the periphery of the feed zone of the tower with an inner wall spaced from the inner curved wall of the tower and a top covering the channel to confer a generally inverted-U shape to the cross section of the channel. One or more tangential feed inlets are provided to admit a heated, mixed phase feed to the tower and direct the feed into and along the channel. One or more vapor scoops are provided for each feed inlet with the scoop(s) located on the inner wall of the channel, each at a sufficient distance along the channel from the inlet to permit cyclonic separation of vapor and liquid to take place before the vapor in the feed from the inlet enters the scoop(s) and passes through a vapor exit port into the central core of the tower. The tower is preferably used with a radial louvre baffle at the top of the stripping zone.
    Type: Application
    Filed: July 25, 2013
    Publication date: March 6, 2014
    Applicant: EXXONMOBIL RESEARCH AND ENGINEERING COMPANY
    Inventors: Vikram SINGH, Brian D. ALBERT, Berne K. STOBER
  • Patent number: 8664561
    Abstract: A method is disclosed for adjusting the composition of plasmas used in plasma doping, plasma deposition and plasma etching techniques. The disclosed method enables the plasma composition to be controlled by modifying the energy distribution of the electrons present in the plasma. Energetic electrons are produced in the plasma by accelerating electrons in the plasma using very fast voltage pulses. The pulses are long enough to influence the electrons, but too fast to affect the ions significantly. Collisions between the energetic electrons and the constituents of the plasma result in changes in the plasma composition. The plasma composition can then be optimized to meet the requirements of the specific process being used. This can entail changing the ratio of ion species in the plasma, changing the ratio of ionization to dissociation, or changing the excited state population of the plasma.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: March 4, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Kamal Hadidi, Rajesh Dorai, Bernard G. Lindsay, Vikram Singh, George D. Papasouliotis
  • Patent number: 8664098
    Abstract: A plasma processing apparatus includes a process chamber, a platen for supporting a workpiece, a source configured to generate a plasma in the process chamber, and an insulating modifier. The insulating modifier has a gap, and a gap plane, where the gap plane is defined by portions of the insulating modifier closest to the sheath and proximate the gap. A gap angle is defined as the angle between the gap plane and a plane defined by the front surface of the workpiece. Additionally, a method of having ions strike a workpiece is disclosed, where the range of incident angles of the ions striking the workpiece includes a center angle and an angular distribution, and where the use of the insulating modifier creates a center angle that is not perpendicular to the workpiece.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: March 4, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Ludovic Godet, Timothy J. Miller, Svetlana B. Radovanov, Anthony Renau, Vikram Singh
  • Publication number: 20140034611
    Abstract: A plasma processing tool is used to deposit material on a workpiece. For example, a method for conformal deposition of material is disclosed. In this embodiment, the plasma sheath shape is modified to allow material to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of different features can be deposited onto. In another embodiment, a plasma processing tool is used to etch a workpiece. In this embodiment, the plasma sheath shape is altered to allow ions to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of differently shaped features can be created.
    Type: Application
    Filed: October 16, 2013
    Publication date: February 6, 2014
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: Ludovic Godet, Timothy Miller, George Papasouliotis, Vikram Singh
  • Patent number: 8603591
    Abstract: A plasma processing tool is used to deposit material on a workpiece. For example, a method for conformal deposition of material is disclosed. In this embodiment, the plasma sheath shape is modified to allow material to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of different features can be deposited onto. In another embodiment, a plasma processing tool is used to etch a workpiece. In this embodiment, the plasma sheath shape is altered to allow ions to impact the workpiece at a range of incident angles. By varying this range of incident angles over time, a variety of differently shaped features can be created.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: December 10, 2013
    Assignee: Varian Semiconductor Ewuipment Associates, Inc.
    Inventors: Ludovic Godet, Timothy Miller, George Papasouliotis, Vikram Singh
  • Patent number: 8507372
    Abstract: A technique for conformal processing of a substrate having a non-planar surface is disclosed. The technique includes several stages. In a first stage, some surfaces of the substrate are effectively processed. During a second stage, these surfaces are treated to limit or eliminate further processing of these surfaces. During a third stage, other surfaces of the substrate are processed. In some applications, the surfaces that are perpendicular, or substantially perpendicular to the flow of particles are processed in the first and second stages, while other surfaces are processed in the third stage. In some embodiments, the second stage includes the deposition of a film on the substrate.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: August 13, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: George D. Papasouliotis, Vikram Singh, Heyun Yin
  • Patent number: 8461030
    Abstract: A plasma processing apparatus comprises a plasma source configured to produce a plasma in a plasma chamber, such that the plasma contains ions for implantation into a workpiece. The apparatus also includes a focusing plate arrangement having an aperture arrangement configured to modify a shape of a plasma sheath of the plasma proximate the focusing plate such that ions exiting an aperture of the aperture arrangement define focused ions. The apparatus further includes a processing chamber containing a workpiece spaced from the focusing plate such that a stationary implant region of the focused ions at the workpiece is substantially narrower that the aperture. The apparatus is configured to create a plurality of patterned areas in the workpiece by scanning the workpiece during ion implantation.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: June 11, 2013
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Anthony Renau, Ludovic Godet, Timothy J. Miller, Joseph C. Olson, Vikram Singh, James Buonodono, Deepak A. Ramappa, Russell J. Low, Atul Gupta, Kevin M. Daniels
  • Patent number: 8460748
    Abstract: An improved patterned magnetic bit data storage media and a method for manufacturing the same is disclosed. In one particular exemplary embodiment, the improved patterned magnetic bit data storage media may comprise an active region exhibiting substantially ferromagnetism; and an inactive region exhibiting substantially paramagnetism, the inactive region comprising at least two grains and a grain boundary interposed therebetween, wherein each of the at least two grains contain ferromagnetic material, and wherein the at least two grains are antiferromagnetically coupled.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: June 11, 2013
    Assignee: Varian Seminconductor Equipment Associates, Inc.
    Inventors: Frank Sinclair, Vikram Singh