Patents by Inventor Vishal Anand
Vishal Anand has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20180046332Abstract: An approach is provided for monitoring disk utilization at an object level. At a first time a first size of an object (i.e., integrated file system or library) in a System i computing platform is determined. At a second time a second size of the object is determined. A difference between the first and second sizes is determined. The difference is determined to be greater than a threshold. Based on the difference exceeding the threshold, an alert is sent indicating growth at the object level rather than at an auxiliary storage pool level. Sizes of System i libraries are monitored at multiple dates and stored in a repository. Sizes of the libraries at user-entered start and end dates are retrieved from the repository. Differences between the sizes of the libraries at the start and end dates are determined and presented.Type: ApplicationFiled: October 23, 2017Publication date: February 15, 2018Inventors: Vishal Anand, Sahadev Dey, Rajneesh Kumar, Vijay S. Patil, Amit Patra
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Publication number: 20170364920Abstract: One embodiment of the invention is directed to a computer-implemented method comprising, receiving an indication that an avatar of a user has initiated a transaction in a virtual reality environment. The method further comprises obtaining a first biometric sample from the user interacting with the virtual reality hardware. The method further comprises generating a partial biometric template based at least in part on the first biometric sample. The method further comprises providing the partial biometric template and personal authentication information for the avatar to an authentication computer where the personal authentication information and the partial biometric template are used to authenticate the avatar.Type: ApplicationFiled: June 16, 2016Publication date: December 21, 2017Inventor: Vishal Anand
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Patent number: 9823814Abstract: An approach is provided for monitoring disk utilization at an object level. At a first time a first size of an object in a System i computing platform is determined by calling an application programming interface (API). The object is an integrated file system object or a library that includes other objects in the System i platform. At a second time a second size of the object is determined by calling the API. A difference between the first and second sizes is determined. The difference is determined to be greater than a threshold. Based on the difference exceeding the threshold, an alert is sent. The alert indicates the object had a growth in size that exceeds the threshold and indicates the growth at a level of the object, which is different from a growth at a level of an auxiliary storage pool in the System i platform.Type: GrantFiled: January 15, 2015Date of Patent: November 21, 2017Assignee: International Business Machines CorporationInventors: Vishal Anand, Sahadev Dey, Rajneesh Kumar, Vijay S. Patil, Amit Patra
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Publication number: 20170317951Abstract: Embodiments of the apparatus of dynamically renumbering ports relate to a network chip that minimizes the total logic on the network chip by limiting the number of states that needs to be preserved for all ports on the network chip. Each pipe on the network chip implements a dynamic port renumbering scheme that dynamically assigns a relative port number for each port assigned to that pipe. The dynamic port renumbering scheme allows for internal parallelism without increasing the total amount of state space required for the ports on the network chip.Type: ApplicationFiled: July 18, 2017Publication date: November 2, 2017Inventors: Vishal Anand, Vamsi Panchagnula
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Patent number: 9787549Abstract: A resource requirements method and system is provided. The method includes identifying dependencies and calculating a utilization value for a source server. The source server is mapped to an application and a source infrastructure is compared to a target infrastructure. Deficiencies and differences associated with the target infrastructure are determined and dependency requirements for fulfillment in the target infrastructure are generated. The utilization value is compared to a resource capability of the target server and resource requirements for fulfillment on the target server are generated.Type: GrantFiled: July 26, 2016Date of Patent: October 10, 2017Assignee: International Business Machines CorporationInventor: Vishal Anand
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Patent number: 9742694Abstract: Embodiments of the apparatus of dynamically renumbering ports relate to a network chip that minimizes the total logic on the network chip by limiting the number of states that needs to be preserved for all ports on the network chip. Each pipe on the network chip implements a dynamic port renumbering scheme that dynamically assigns a relative port number for each port assigned to that pipe. The dynamic port renumbering scheme allows for internal parallelism without increasing the total amount of state space required for the ports on the network chip.Type: GrantFiled: June 19, 2014Date of Patent: August 22, 2017Assignee: Cavium, Inc.Inventors: Vishal Anand, Vamsi Panchagnula
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Publication number: 20170212834Abstract: A method and apparatus for implementing a storage optimization process is provided. The method includes identifying a file for storage on a storage device. The storage device determines that the file comprises a file size that exceeds multiple physical disk blocks of the storage device by a fractional value. The file is divided into a first portion and a second portion. The first portion comprises a file size such that the first portion fits entirely within a first single block of the storage device. The second portion comprises a size such that the second portion exceeds a size of a second single block of the storage device by the fractional value. The first portion is stored within the first single block. The second portion is compressed such that a resulting compressed file fits entirely within the second single block.Type: ApplicationFiled: January 3, 2017Publication date: July 27, 2017Inventor: Vishal Anand
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Publication number: 20170187623Abstract: Embodiments of the apparatus of identifying internal destinations of network packets relate to a network chip that allows flexibility in handling packets. The handling of packets can be a function of what the packet contents are or where the packets are from. The handling of packets can also be a function of both what the packet contents are and where the packets are from. In some embodiments, where the packets are from refers to unique port numbers of chip ports that the packets arrived at. The packets can be distributed for processing within the network chip.Type: ApplicationFiled: March 13, 2017Publication date: June 29, 2017Inventors: Vishal Anand, Tsahi Daniel, Gerald Schmidt, Premshanth Theivendran
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Patent number: 9628385Abstract: Embodiments of the apparatus of identifying internal destinations of network packets relate to a network chip that allows flexibility in handling packets. The handling of packets can be a function of what the packet contents are or where the packets are from. The handling of packets can also be a function of both what the packet contents are and where the packets are from. In some embodiments, where the packets are from refers to unique port numbers of chip ports that the packets arrived at. The packets can be distributed for processing within the network chip.Type: GrantFiled: June 19, 2014Date of Patent: April 18, 2017Assignee: Cavium, Inc.Inventors: Vishal Anand, Tsahi Daniel, Gerald Schmidt, Premshanth Theivendran
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Patent number: 9588694Abstract: A method and apparatus for implementing a storage optimization process is provided. The method includes identifying a file for storage on a storage device. The storage device determines that the file comprises a file size that exceeds multiple physical disk blocks of the storage device by a fractional value. The file is divided into a first portion and a second portion. The first portion comprises a file size such that the first portion fits entirely within a first single block of the storage device. The second portion comprises a size such that the second portion exceeds a size of a second single block of the storage device by the fractional value. The first portion is stored within the first single block. The second portion is compressed such that a resulting compressed file fits entirely within the second single block.Type: GrantFiled: January 21, 2016Date of Patent: March 7, 2017Assignee: International Business Machines CorporationInventor: Vishal Anand
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Patent number: 9542342Abstract: A multiple access mechanism allows sources to simultaneously access different target registers at the same time without using a semaphore. The multiple access mechanism is implemented using N holding registers and source identifiers. The N holding registers are located in each slave engine. Each of the N holding registers is associated with a source and is configured to receive partial updates from the source before pushing the full update to a target register. After the source is finished updating the holding register and the holding register is ready to commit to the target register, a source identifier is added to a register bus. The source identifier identifies the holding register as the originator of the transaction on the register bus. The N holding registers are able to simultaneously handle N register transactions. The max value of N is 2n, where n is the number of bits in the source identifier.Type: GrantFiled: October 22, 2014Date of Patent: January 10, 2017Assignee: Cavium, Inc.Inventors: Vishal Anand, Harish Krishnamoorthy, Guy Townsend Hutchison
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Patent number: 9516145Abstract: Embodiments of the apparatus for extracting data from packets relate to programmable layer commands that allow fields from packets to be extracted. A packet is split into individual layers. Each layer is given a unique layer type number that identifies the layer. Based on the layer type, each layer is expanded to a generic format. Each layer has a set of layer commands that is generic to that layer. Fields of each layer command are fieldOffset and fieldLen. These layer commands allow information in the packet to be extracted in a programmable manner. Extracted fields from each protocol layer are concatenated to form a token layer. All token layers are concatenated to form a final token, which is used for further processing of the packet.Type: GrantFiled: June 19, 2014Date of Patent: December 6, 2016Assignee: Cavium, Inc.Inventors: Vishal Anand, Tsahi Daniel, Gerald Schmidt
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Publication number: 20160337201Abstract: A resource requirements method and system is provided. The method includes identifying dependencies and calculating a utilization value for a source server. The source server is mapped to an application and a source infrastructure is compared to a target infrastructure. Deficiencies and differences associated with the target infrastructure are determined and dependency requirements for fulfillment in the target infrastructure are generated. The utilization value is compared to a resource capability of the target server and resource requirements for fulfillment on the target server are generated.Type: ApplicationFiled: July 26, 2016Publication date: November 17, 2016Inventor: Vishal Anand
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Patent number: 9473601Abstract: Embodiments of the apparatus for modifying packet headers relate to a rewrite engine that represents each protocol header of packets in a generic format specific to that protocol to enable programmable modifications of packets, resulting in hardware and software flexibility in modifying packet headers. Software programs generic formats in a hardware table for various protocols. The rewrite engine is able to detect missing fields from a protocol header and is able to expand the protocol header to a maximum size such that the protocol header contains all possible fields of that protocol. Each of the fields has the same offset irrespective of which variation of the protocol the protocol header corresponds to. The expanded protocol header is represented by a data structure that is independent of a size of the protocol header.Type: GrantFiled: June 19, 2014Date of Patent: October 18, 2016Assignee: CAVIUM, INC.Inventors: Chirinjeev Singh, Vishal Anand
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Patent number: 9455865Abstract: A resource requirements method and system is provided. The method includes identifying dependencies and calculating a utilization value for a source server. The source server is mapped to an application and a source infrastructure is compared to a target infrastructure. Deficiencies and differences associated with the target infrastructure are determined and dependency requirements for fulfillment in the target infrastructure are generated. The utilization value is compared to a resource capability of the target server and resource requirements for fulfillment on the target server are generated.Type: GrantFiled: September 18, 2015Date of Patent: September 27, 2016Assignee: International Business Machines CorporationInventor: Vishal Anand
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Patent number: 9438703Abstract: Embodiments of the apparatus for forming a hash input from packet contents relate to a programmable flexible solution to form hash inputs, allowing for hardware changes and for adding support for newer protocols as and when they are defined in the future. A packet is split into individual layers. Each layer is given a unique layer type number that helps identify what that layer is. Based on the layer type, each layer is expanded to a generic format. Each layer has a set of hash commands that is generic to that layer. Fields of each hash command are fieldOffset, fieldLen, hashMask, and hashMaskMSB. These hash commands allow information in the packet to be extracted in a programmable manner. The fields extracted from each protocol layer of the packet are concatenated to form a hash layer. A bit vector indicates which hash layers are used to form the hash input.Type: GrantFiled: June 19, 2014Date of Patent: September 6, 2016Assignee: Cavium, Inc.Inventors: Vishal Anand, Tsahi Daniel, Gerald Schmidt
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Publication number: 20160210303Abstract: An approach is provided for monitoring disk utilization at an object level. At a first time a first size of an object in a System i computing platform is determined by calling an application programming interface (API). The object is an integrated file system object or a library that includes other objects in the System i platform. At a second time a second size of the object is determined by calling the API. A difference between the first and second sizes is determined. The difference is determined to be greater than a threshold. Based on the difference exceeding the threshold, an alert is sent. The alert indicates the object had a growth in size that exceeds the threshold and indicates the growth at a level of the object, which is different from a growth at a level of an auxiliary storage pool in the System i platform.Type: ApplicationFiled: January 15, 2015Publication date: July 21, 2016Inventors: Vishal Anand, Sahadev Dey, Rajneesh Kumar, Vijay S. Patil, Amit Patra
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Patent number: 9362815Abstract: A method includes controlling multiple networked input-parallel/output-parallel inverters of a fuel cell system as a single inverter assembly by a master controller. A fuel cell system includes a plurality of fuel cell segments, a plurality of DC/DC converters and at least one DC/AC inverter, where an output of each of the plurality of the fuel cell segments is connected to a pair of DC/DC converters, and each of the pair DC/DC converters is connected to an opposite polarity bus being provided to the inverter.Type: GrantFiled: October 24, 2011Date of Patent: June 7, 2016Assignee: BLOOM ENERGY CORPORATIONInventors: Ranganathan Gurunathan, Aisur Gopalakrishnan Vishal Anand, Ame Ballantine, Saravanakumar Narayanasamy, Kodali Venkata Narasimha Rao
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Publication number: 20160117282Abstract: Embodiments of the present invention are directed to a configuration interface of a network ASIC. The configuration interface allows for two modes of traversal of nodes. The nodes form one or more chains. Each chain is in a ring or a list topology. A master receives external access transactions. Once received by the master, an external access transaction traverses the chains to reach a target node. A target node either is an access to a memory space or is a module. A chain can include at least one decoder. A decoder includes logic that determines which of its leaves to send an external access transaction to. In contrast, if a module is not the target node, then the module passes an external access transaction to the next node coupled thereto; otherwise, if the module is the target node, the transmission of the external access transaction stops at the module.Type: ApplicationFiled: October 22, 2014Publication date: April 28, 2016Inventors: Guy Townsend Hutchison, Harish Krishnamoorthy, Gerald Schmidt, Vishal Anand
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Publication number: 20160117217Abstract: An error detection circuit on a semiconductor chip detects whether soft errors have affected flip-flop implemented registers on the semiconductor chip. A signature of these flip-flop implemented registers on the semiconductor chip is periodically captured. The signature allows for the integrity of the flip-flop implemented registers to be constantly monitored. A soft error occurring on any of the flip-flop implemented registers can be immediately detected. In response to the detection, an interrupt is raised to notify software to take action.Type: ApplicationFiled: October 22, 2014Publication date: April 28, 2016Inventors: Vishal Anand, Harish Krishnamoorthy, Guy Hutchison