Patents by Inventor Volume Chien

Volume Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170257554
    Abstract: Integrated circuit devices are disclosed. The integrated circuit device includes a focus detection pixel and a lens. The focus detection pixel includes a photosensitive unit and a photo-insensitive unit in a substrate. The lens is disposed over the focus detection pixel, wherein the photosensitive unit and the photo-insensitive unit are disposed opposite to each other with respect to an optical axis of the lens, and a light beam passing through the lens is simultaneously incident into the photosensitive unit and the photo-insensitive unit.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 7, 2017
    Inventors: Zen-Fong Huang, Volume Chien
  • Publication number: 20170243908
    Abstract: Among other things, one or more support structures for integrated circuitry and techniques for forming such support structures are provided. A support structure comprises one or more trench structures, such as a first trench structure and a second trench structure formed around a periphery of integrated circuitry. In some embodiments, one or more trench structures are formed according to partial substrate etching, such that respective trench structures are formed into a region of a substrate. In some embodiments, one or more trench structures are formed according to discontinued substrate etching, such that respective trench structures comprise one or more trench portions separated by separation regions of the substrate. The support structure mitigates stress energy from reaching the integrated circuitry, and facilitates process-induced charge release from the integrated circuitry.
    Type: Application
    Filed: May 1, 2017
    Publication date: August 24, 2017
    Inventors: Volume CHIEN, Yun-Wei CHENG, I-I CHENG, Shiu-Ko JANGJIAN, Chi-Cherng JENG, Chih-Mu HUANG
  • Patent number: 9728511
    Abstract: A semiconductor wafer includes a substrate, an integrated circuit and a die seal ring structure. The substrate is with a die region, a die seal ring region surrounding the die region and a scribe line region surrounding the die seal ring region. The substrate includes a first surface and a second surface opposite to the first surface, and periodic recesses within the first surface of the die seal ring region, the scribe line region or both the die seal ring region and the scribe line region. The integrated circuit is located on the first surface and the second surface of the die region. The die seal ring structure is located on the second surface of the die seal ring region. A semiconductor die is also provided.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: August 8, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsi-Jung Wu, Volume Chien, Ying-Lang Wang, Hsin-Chi Chen, Ying-Hao Chen, Hung-Ta Huang
  • Patent number: 9711468
    Abstract: A bonding pad structure comprises a first dielectric layer, a first conductive island in a second dielectric layer over the first dielectric layer and a via array having a plurality of vias in a third dielectric layer over the first conductive island. The structure also comprises a plurality of second conductive islands in a fourth dielectric layer over the via array. The second conductive islands are each separated from one another by a dielectric material of the fourth dielectric layer and in contact with at least one via of the via array. The structure further comprises a substrate over the second conductive islands. The substrate has an opening defined therein that exposes at least one second conductive island. The structure additionally comprises a bonding pad over the substrate. The bonding pad is in contact with the at least one second conductive island through the opening in the substrate.
    Type: Grant
    Filed: April 10, 2015
    Date of Patent: July 18, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsung-Han Tsai, Jung-Chi Jeng, Yueh-Ching Chang, Volume Chien, Huang-Ta Huang, Chi-Cherng Jeng
  • Patent number: 9659859
    Abstract: A semiconductor device includes a first layer including a number of first layer metal pads, a second layer formed on top of the first layer, the second layer including a number of second layer metal pads, and vias connecting the first layer metal pads to the second layer metal pads. A surface area overlap between the first layer metal pads and the second layer metal pads is below a defined threshold.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: May 23, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: I-Chih Chen, Ying-Hao Chen, Chi-Cherng Jeng, Volume Chien, Fu-Tsun Tsai, Kun-Huei Lin
  • Publication number: 20170133429
    Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A buffer layer is disposed over the second side of the substrate. A plurality of elements is disposed over the buffer layer. The elements and the buffer layer have different material compositions. A plurality of light-blocking structures is disposed over the plurality of elements, respectively. The radiation-sensing regions are respectively aligned with a plurality of openings defined by the light-blocking structures, the elements, and the buffer layer.
    Type: Application
    Filed: January 19, 2017
    Publication date: May 11, 2017
    Inventors: Yun-Wei Cheng, Chen Chiu-Jung, Volume Chien, Kuo-Cheng Lee, Yung-Lung Hsu, Chen Hsin-Chi
  • Patent number: 9640456
    Abstract: Among other things, one or more support structures for integrated circuitry and techniques for forming such support structures are provided. A support structure comprises one or more trench structures, such as a first trench structure and a second trench structure formed around a periphery of integrated circuitry. In some embodiments, one or more trench structures are formed according to partial substrate etching, such that respective trench structures are formed into a region of a substrate. In some embodiments, one or more trench structures are formed according to discontinued substrate etching, such that respective trench structures comprise one or more trench portions separated by separation regions of the substrate. The support structure mitigates stress energy from reaching the integrated circuitry, and facilitates process-induced charge release from the integrated circuitry.
    Type: Grant
    Filed: May 14, 2013
    Date of Patent: May 2, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Volume Chien, Yun-Wei Cheng, I-I Cheng, Shiu-Ko JangJian, Chi-Cherng Jeng, Chih-Mu Huang
  • Patent number: 9627426
    Abstract: Embodiments of the disclosure provide an image sensor device. The image sensor device includes a semiconductor substrate. The semiconductor substrate has a front surface, a back surface opposite to the front surface, a light-sensing region close to the front surface, and a trench adjacent to the light-sensing region. The image sensor device includes a reflective layer positioned on an inner wall of the trench, wherein the reflective layer has a light reflectivity ranging from about 70% to about 100%.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: April 18, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Volume Chien, Yu-Heng Cheng, Fu-Tsun Tsai, Hsi-Jung Wu, Chi-Cherng Jeng
  • Publication number: 20170098675
    Abstract: A method for forming an image sensor device is provided. The method includes forming a photodetector in a semiconductor substrate and forming a shielding layer over the semiconductor substrate. The method also includes forming a dielectric layer over the shielding layer and partially removing the dielectric layer to form a recess. The method further includes partially removing the shielding layer through the recess. In addition, the method includes forming a filter in the recess after the shielding layer is partially removed.
    Type: Application
    Filed: December 15, 2016
    Publication date: April 6, 2017
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Volume CHIEN, Yun-Wei CHENG, Shiu-Ko JANGJIAN, Zhe-Ju LIU, Kuo-Cheng LEE, Chi-Cherng JENG
  • Publication number: 20170092684
    Abstract: An image sensor device includes a substrate, a color filter layer, at least a pixel, a main isolation structure and a sub-isolation structure. The color filter layer is disposed over the substrate. The color filter layer includes a first color filter having a single one of primary colors. The pixel is disposed in the substrate and aligned with the first color filter. The main isolation structure surrounds the pixel in the substrate. The sub-isolation structure is disposed to divide the pixel into a plurality of sub-first pixels. The sub-pixels correspond to the first color filter having the single one of primary colors, and each of the sub-first pixels includes a radiation sensor.
    Type: Application
    Filed: September 30, 2015
    Publication date: March 30, 2017
    Inventors: Su-Hua CHANG, Volume CHIEN, Yung-Lung HSU
  • Publication number: 20170069678
    Abstract: A semiconductor device includes a substrate, a device layer, a composite grid structure, a passivation layer and color filters. The device layer overlies the substrate. The composite grid structure overlies the device layer. The composite grid structure includes cavities passing through the composite grid structure, and the composite grid structure includes a metal grid layer and a dielectric grid layer stacked on the metal grid layer. The passivation layer conformally covers the composite grid structure. The color filters respectively fill the cavities.
    Type: Application
    Filed: September 9, 2015
    Publication date: March 9, 2017
    Inventors: Yun-Wei CHENG, Chun-Hao CHOU, Tsung-Han TSAI, Kuo-Cheng LEE, Volume CHIEN, Yung-Lung HSU
  • Patent number: 9591242
    Abstract: An embodiment image sensor includes a pixel region spaced apart from a black level control (BLC) region by a buffer region. In an embodiment, a light shield is disposed over the BLC region and extends into the buffer region. In an embodiment, the buffer region includes an array of dummy pixels. Such embodiments effectively reduce light cross talk at the edge of the BLC region, which permits more accurate black level calibration. Thus, the image sensor is capable of producing higher quality images.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: March 7, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Volume Chien, Yun-Wei Cheng, Che-Min Lin, Shiu-Ko JangJian, Chi-Cherng Jeng, Chih-Mu Huang
  • Publication number: 20170025460
    Abstract: Disclosed is a method of fabricating a semiconductor image sensor device. The method includes providing a substrate having a pixel region, a periphery region, and a bonding pad region. The substrate further has a first side and a second side opposite the first side. The pixel region contains radiation-sensing regions. The method further includes forming a bonding pad in the bonding pad region; and forming light-blocking structures over the second side of the substrate, at least in the pixel region, after the bonding pad has been formed.
    Type: Application
    Filed: October 4, 2016
    Publication date: January 26, 2017
    Inventors: Chiu-Jung Chen, Chun-Hao Chou, Hsin-Chi Chen, Kuo-Cheng Lee, Volume Chien, Yung-Lung Hsu, Yun-Wei Cheng
  • Patent number: 9553118
    Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A buffer layer is disposed over the second side of the substrate. A plurality of elements is disposed over the buffer layer. The elements and the buffer layer have different material compositions. A plurality of light-blocking structures is disposed over the plurality of elements, respectively. The radiation-sensing regions are respectively aligned with a plurality of openings defined by the light-blocking structures, the elements, and the buffer layer.
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: January 24, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yun-Wei Cheng, Chiu-Jung Chen, Volume Chien, Kuo-Cheng Lee, Yung-Lung Hsu, Hsin-Chi Chen
  • Patent number: 9548329
    Abstract: A backside illuminated (BSI) image sensor device includes: a first substrate including a front side and a back side; a second substrate bonded with the first substrate on the front side; and a blocking layer between the first substrate and the second substrate. The first substrate includes an image sensor, and the image sensor is configured to collect incident light entering from the back side. The second substrate includes a circuit coupled with the image sensor. The blocking layer is configured to block radiation induced by the circuit.
    Type: Grant
    Filed: July 2, 2014
    Date of Patent: January 17, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Huan-En Lin, Shiu-Ko Jangjian, Volume Chien, Fu-Tsun Tsai, Yung-Lung Hsu, Chi-Cherng Jeng
  • Patent number: 9543353
    Abstract: A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A plurality of light-blocking structures is disposed over the second side of the substrate. A passivation layer is coated on top surfaces and sidewalls of each of the light-blocking structures. A plurality of spacers is disposed on portions of the passivation layer coated on the sidewalls of the light-blocking structures.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: January 10, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yun-Wei Cheng, Chiu-Jung Chen, Volume Chien, Kuo-Cheng Lee, Yung-Lung Hsu, Hsin-Chi Chen
  • Patent number: 9543352
    Abstract: A backside illuminated CMOS image sensor and a manufacturing method thereof are provided. Embedded micro-lenses disposed respectively on concave surfaces of a buffer oxide layer, wherein the concave surfaces are positioned to respectively align with photodiodes of pixel array of the CMOS image sensor. The embedded micro-lenses can confine incident light to the photodiodes to reduce optical crosstalk between adjacent pixels.
    Type: Grant
    Filed: December 12, 2013
    Date of Patent: January 10, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Volume Chien, Zen-Fong Huang, Chia-Yu Wei, Chi-Cherng Jeng, Hsin-Chi Chen
  • Patent number: 9543343
    Abstract: Embodiments of mechanisms for forming an image sensor device are provided. The image sensor device includes a semiconductor substrate and a photodetector in the semiconductor substrate. The image sensor device also includes a dielectric layer over the semiconductor substrate, and the dielectric layer has a recess aligned with the photodetector. The image sensor device further includes a filter in the recess of the dielectric layer. In addition, the image sensor device includes a shielding layer between the dielectric layer and the semiconductor substrate and surrounding the filter.
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: January 10, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Volume Chien, Yun-Wei Cheng, Shiu-Ko Jangjian, Zhe-Ju Liu, Kuo-Cheng Lee, Chi-Cherng Jeng
  • Patent number: 9530813
    Abstract: Seal ring structures are provided with rounded corner junctions or corner junctions that include polygons. The seal rings surround generally rectangular semiconductor devices such as integrated circuits, image sensors and other devices. The seal ring includes a configuration of two sets of generally parallel opposed sides and the corner junctions are the junctions at which adjacent orthogonal seal ring sides are joined. The seal rings are trench structures or filled trench structures in various embodiments. The rounded corner junctions are formed by a curved arc or multiple line segments joined together at various angles. The corner junctions that include one or more enclosed polygons include polygons with at least one polygon side being formed by one of the seal ring sides.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: December 27, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Volume Chien, Yun-Wei Cheng, I-l Cheng, Shiu-Ko Jangjian, Chi-Cherng Jeng, Hsin-Chi Chen
  • Patent number: 9520424
    Abstract: One or more techniques or systems for forming a black level correction (BLC) structure are provided herein. In some embodiments, the BLC structure comprises a first region, a second region above at least some of the first region, and a third region above at least some of the second region. For example, the first region comprises silicon and the third region comprises a passivation dielectric. In some embodiments, the second region comprises a first sub-region, a second sub-region above the first sub-region, and a third sub-region above the second sub-region. For example, the first sub-region comprises a metal-silicide, the second sub-region comprises a metal, and the third sub-region comprises a metal-oxide. In this manner, a BLC structure is provided, such that a surface of the BLC structure is flush, at least because the third region is flush, for example.
    Type: Grant
    Filed: October 29, 2012
    Date of Patent: December 13, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Shiu-Ko JangJian, Chi-Cherng Jeng, Volume Chien