Patents by Inventor Wachtler

Wachtler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9896330
    Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: February 20, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
  • Publication number: 20170330841
    Abstract: A floating die package including a cavity formed through sublimation of a sacrificial die encapsulant and sublimation or separation of die attach materials after molding assembly. A pinhole vent in the molding structure is provided as a sublimation path to allow gases to escape, whereby the die or die stack is released from the substrate and suspended in the cavity by the bond wires only.
    Type: Application
    Filed: August 26, 2016
    Publication date: November 16, 2017
    Inventors: Benjamin Stassen Cook, Steven Kummerl, Kurt Peter Wachtler
  • Publication number: 20170309549
    Abstract: An integrated circuit die may be fabricating to have a plurality of contacts. A metal post may be formed on each of the plurality of contacts. A plurality of bumps may be formed on a plurality of contact regions of a leadframe or on the posts, in which the plurality of bumps are formed with a material that includes metal nanoparticles. The IC die may be attached to the leadframe by aligning the metal posts to the leadframe and sintering the metal nanoparticles in the plurality of bumps to form a sintered metal bond between each metal post and corresponding contact region of the leadframe.
    Type: Application
    Filed: April 21, 2016
    Publication date: October 26, 2017
    Inventors: Kurt Peter Wachtler, Seunghyun Chae, Benjamin Stassen Cook
  • Publication number: 20170265466
    Abstract: A composition, characterized in that it comprises 1,2-dibromo-2,4-dicyanobutane (DBDCB) and zinc pyrithione (ZPT) as active components.
    Type: Application
    Filed: August 20, 2015
    Publication date: September 21, 2017
    Applicant: LANXESS Deutschland GmbH
    Inventors: Peter WACHTLER, Tanja GERHARZ
  • Publication number: 20170197823
    Abstract: A packaged micro-electro-mechanical system (MEMS) device (100) comprises a circuitry chip (101) attached to the pad (110) of a substrate with leads (111), and a MEMS (150) vertically attached to the chip surface by a layer (140) of low modulus silicone compound. On the chip surface, the MEMS device is surrounded by a polyimide ring (130) with a surface phobic to silicone compounds. A dome-shaped glob (160) of cured low modulus silicone material covers the MEMS and the MEMS terminal bonding wire spans (180); the glob is restricted to the chip surface area inside the polyimide ring and has a surface non-adhesive to epoxy-based molding compounds. A package (190) of polymeric molding compound encapsulates the vertical assembly of the glob embedding the MEMS, the circuitry chip, and portions of the substrate; the molding compound is non-adhering to the glob surface yet adhering to all other surfaces.
    Type: Application
    Filed: April 21, 2016
    Publication date: July 13, 2017
    Inventors: Kurt Peter Wachtler, Makoto Yoshino, Ayumu Kuroda, Brian E. Goodlin, Karen Kirmse, Benjamin Cook, Genki Yano, Stuart Jacobsen
  • Patent number: 9693560
    Abstract: The present application relates to biocidal substances comprising at least one isothiazolinone from the group consisting of 1,2-benzisothiazolin-3-one (BIT) and 2-methyl-4-isothiazolin-3-one (MIT), and at least one N-alkyl-guanidinium salt, methods for the production thereof, and their use for protecting technical materials and products which can be attacked by microorganisms.
    Type: Grant
    Filed: August 25, 2014
    Date of Patent: July 4, 2017
    Assignee: LANXESS Deutschland GmbH
    Inventors: Tanja Gerharz, Peter Wachtler
  • Publication number: 20170149073
    Abstract: The invention relates to an arrangement and a method for the controlled discharge of an energy store using redox shuttle additives and to the use of redox shuttle additives for the controlled discharge of an energy store. The energy store arrangement comprises a storage container with a redox shuttle additive which is dispensed into the electrolytes of the energy store upon triggering a dispensing device such that the energy store is partly or completely discharged, wherein the redox shuttle additive is oxidized on the cathode and reduced on the anode. The redox shuttle additive has a redox potential which is less than or equal to the potential of the partially or completely discharged cathode and greater than or equal to the potential of the partially or completely discharged anode.
    Type: Application
    Filed: June 19, 2015
    Publication date: May 25, 2017
    Inventors: Harry DOERING, Mario WACHTLER, Margret WOHLFAHRT-MEHRENS, Brita EMMERMACHER
  • Publication number: 20160220059
    Abstract: Cooking methods and devices for controlling doneness gradients and/or processes using modulated cooking techniques. A precision cooking appliance is provided that allows for cooking food to a precise internal temperature as well as keeping the food both before and after cooking at desired holding temperatures. One or more temperatures sensors are placed adjacent, near, and/or in the food to be cooked so that the temperature of at least one cooking surface can be controlled to reach the precise internal temperature. Related apparatus, systems, techniques and articles are also desribed.
    Type: Application
    Filed: September 9, 2014
    Publication date: August 4, 2016
    Applicant: Palate Home, Inc.
    Inventors: Mark Wachtler, Bruce Tognazzini, Donald A. Norman, Eric J. Norman
  • Publication number: 20160198712
    Abstract: The present application relates to biocidal substances comprising at least one isothiazolinone from the group consisting of 1,2-benzisothiazolin-3-one (BIT) and 2-methyl-4-isothiazolin-3-one (MIT), and at least one N-alkyl-guanidinium salt, methods for the production thereof, and their use for protecting technical materials and products which can be attacked by microorganisms.
    Type: Application
    Filed: August 25, 2014
    Publication date: July 14, 2016
    Inventors: Tanja GERHARZ, Peter WACHTLER
  • Patent number: 9312253
    Abstract: A method for fabricating a semiconductor device provides a first chip having first terminals, a second chip having second terminals, and a third chip having third terminals. A first silicon interposer having first through silicon vias TSVs and a second silicon interposer having second TSVs is provided. The first TSVs are arrayed in a first, a second, and a third set. The first set is located in a first interposer region and matching the first terminals. The second set is located in a second interposer region and matching the second terminals. The third set is located in a third interposer region between the first and second regions and matching the TSVs of the second interposer and the third terminals. The first chip is aligned with the first set TSVs. The second chip is aligned with the second set TSVs. The second interposer is aligned with the third set TSVs. A solder of a first melting temperature is used.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: April 12, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kevin Lyne, Kurt P. Wachtler
  • Patent number: 9144728
    Abstract: A golf swing training aid for training the golfer to swing a club such that the club's shaft stays in the same plane as the golfer's trailing forearm during the initial and final portion of the swing generally comprises a band for attachment to the golfer's trailing forearm and front and rear guide rods projecting downward from the band such that there is a gap between the rod's distal ends such that the shaft of the golf club can be swung into and out of the gap for guidance during the swing. The distal ends of the guide rods include a visual distinction that is seen peripherally by the golfer.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: September 29, 2015
    Inventor: John A. Wachtler
  • Patent number: 9119395
    Abstract: The invention relates to novel biocidal active substance mixtures containing o-phenylphenol and amines, methods for the production thereof, the use thereof for protecting technical materials and products from being infested and destroyed by microorganisms, and microbicidal agents based on said novel mixtures.
    Type: Grant
    Filed: October 6, 2006
    Date of Patent: September 1, 2015
    Assignee: LANXESS Deutschland GmbH
    Inventors: Peter Wachtler, Martin Kugler
  • Publication number: 20150111318
    Abstract: A method for fabricating a semiconductor device provides a first chip having first terminals, a second chip having second terminals, and a third chip having third terminals. A first silicon interposer having first through silicon vias TSVs and a second silicon interposer having second TSVs is provided. The first TSVs are arrayed in a first, a second, and a third set. The first set is located in a first interposer region and matching the first terminals. The second set is located in a second interposer region and matching the second terminals. The third set is located in a third interposer region between the first and second regions and matching the TSVs of the second interposer and the third terminals. The first chip is aligned with the first set TSVs. The second chip is aligned with the second set TSVs. The second interposer is aligned with the third set TSVs. A solder of a first melting temperature is used.
    Type: Application
    Filed: January 6, 2015
    Publication date: April 23, 2015
    Inventors: Kevin Lyne, Kurt P. Wachtler
  • Patent number: 8957525
    Abstract: A standard memory chip (150) is vertically assembled with two processor chips (130, 140) of split architecture by means of a small silicon interposer (120) stacked onto a large silicon interposer (110); both interposers include through-silicon vias (TSVs), while the chips are free of TSVs. The TSVs of small interposer (120) connect to the memory chip (150) and to the bottom interposer (110). Symmetrically positioned relative to interposer (120), and connected to it by short signal traces, chips (130, 140) are attached to the TSVs of interposer 110, which in turn is attached to a substrate (160) with supply connections.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: February 17, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Kevin Lyne, Kurt P. Wachtler
  • Patent number: 8823168
    Abstract: A method of attaching an IC wafer having a plurality of copper pillars (“CuP's) projecting from one face thereof to a substrate having a plurality of contact pads on one face thereof including applying a film having a substantial amount of filler particles therein to the one face of the wafer; applying an a-stage resin having substantially no filler particles therein to the one face of the substrate; and interfacing the film with the a-stage resin.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: September 2, 2014
    Assignee: Texas Instruments Incorporated
    Inventor: Kurt Peter Wachtler
  • Patent number: 8811618
    Abstract: A ciphering key management technique for use in a WLAN receiver is provided where a hash table is stored that has a first and a second table portion. The first table portion stores transmitter address data and the second table portion stores at least one cipher key. It is determined whether a transmitter address matches transmitter address data in the first table portion, and if so, a corresponding cipher key stored in the second table portion is determined for use in decrypting the received data. The hash table technique allows for a fast search for the correct cipher key. Embodiments are described that allow for dynamically adding and removing keys without blocking the search.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: August 19, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ingo Kuehn, Uwe Eckhardt, Axel Wachtler, Falk Tischer
  • Publication number: 20140159247
    Abstract: A standard memory chip (150) is vertically assembled with two processor chips (130, 140) of split architecture by means of a small silicon interposer (120) stacked onto a large silicon interposer (110); both interposers include through-silicon vias (TSVs), while the chips are free of TSVs. The TSVs of small interposer (120) connect to the memory chip (150) and to the bottom interposer (110). Symmetrically positioned relative to interposer (120), and connected to it by short signal traces, chips (130, 140) are attached to the TSVs of interposer 110, which in turn is attached to a substrate (160) with supply connections.
    Type: Application
    Filed: December 6, 2012
    Publication date: June 12, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Kevin Lyne, Kurt P. Wachtler
  • Publication number: 20140061896
    Abstract: A method of attaching an IC wafer having a plurality of copper pillars (“CuP's) projecting from one face thereof to a substrate having a plurality of contact pads on one face thereof including applying a film having a substantial amount of filler particles therein to the one face of the wafer; applying an a-stage resin having substantially no filler particles therein to the one face of the substrate; and interfacing the film with the a-stage resin.
    Type: Application
    Filed: August 31, 2012
    Publication date: March 6, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Kurt Peter Wachtler
  • Patent number: 8597978
    Abstract: A method for forming a semiconductor device includes physically attaching a first semiconductor die to front surface of a first substrate. The first die is electrically connected to routings on front surface of the first substrate. The routings are electrically connected with conductive pads on back surface of the first substrate. A second semiconductor die is physically attached to front surface of a second substrate. The die is electrically connected to routings on front surface of second substrate. These routings are electrically connected with conductive pads on front surface of the second substrate. A third semiconductor die is physically attached to the second die. The third die is electrically attached to the second die through a plurality of through substrate vias (TSVs) within the second die. The conductive pads on back surface of first substrate are electrically connected to the conductive pads on front surface of second substrate.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: December 3, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Kurt Wachtler, Margaret Rose Simmons-Matthews
  • Patent number: 8430969
    Abstract: A process flow exposing and cleaning contact surfaces employing a liquid cleaning agent such as flux to penetrate the interface between the glassy coats and the surface of metal and to delaminate the coats from the metal, and then, at elevated temperatures, to use the agent's vapor pressure to break up the glassy coats into smaller pieces. The glassy coats are prevented by their low density to penetrate into the molten solder. Finally, at ambient temperature, the floating filler debris is water-washed and rinsed away. Cleaning agents include low-viscosity liquids (oils) and flux, which do not decompose at elevated temperatures and are mixed with components operable to provide, at the elevated temperatures, the fumes for sufficient vapor pressure to break up and dislodge the coats from the metal contacts.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: April 30, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Mark A Gerber, Kurt P Wachtler