Abstract: A method of forming a stackable plasma cleaned via package includes forming interconnection balls on terminals. The interconnection balls are encapsulated in a package body, e.g., molding compound. Via apertures are formed through the package body to expose the interconnection balls, wherein a contamination is formed on the interconnection balls. The contamination is removed using a plasma cleaning process. By removing the contamination, robust reflow of the interconnection balls is insured thus maximizing yield. Further, the plasma cleaning process is a cost efficient high volume process with no adverse effect on package reliability.

Abstract: A hermetic MEMS device (100) comprising a carrier (110) having a surface (111) including a device (101) and an attachment stripe (122), the stripe spaced from the device and surrounding the device; a metallic foil (102) having a central bulge portion (103) and a peripheral rim portion (104) meeting the stripe, the bulge cross section parallel to the carrier monotonically decreasing from the rim (104) towards the bulge apex (105); and the foil positioned over the carrier surface so that the bulge arches over the device and the rim forms a seal with the stripe.

Abstract: A semiconductor device including a first memory die having a first memory type, a second memory die having a second memory type different from the first memory type, and a logic die such as a microprocessor. The first memory die can be electrically connected to the logic die using a first type of electrical connection preferred for the first memory type. The second memory die can be electrically connected to the logic die using a second type of electrical connection different from the first type of electrical connection which is preferred for the second memory type. Other devices can include dies all of the same type, or two or more dies of a first type and two or more dies of a second type different from the first type.

Abstract: A method for forming a semiconductor device includes physically attaching a first semiconductor die to front surface of a first substrate. The first die is electrically connected to routings on front surface of the first substrate. The routings are electrically connected with conductive pads on back surface of the first substrate. A second semiconductor die is physically attached to front surface of a second substrate. The die is electrically connected to routings on front surface of second substrate. These routings are electrically connected with conductive pads on front surface of the second substrate. A third semiconductor die is physically attached to the second die. The third die is electrically attached to the second die through a plurality of through substrate vias (TSVs) within the second die. The conductive pads on back surface of first substrate are electrically connected to the conductive pads on front surface of second substrate.

Abstract: The invention relates to synergistic mixtures of o-phenylphenol with other microbicidally active compounds, such as bronopol (2-bromo-2-nitro-1,3-propanedial), 2-methyl-2H-isothiazol-3-one, 1,2-dibromo-2,4-dicyanobutane.

Abstract: A semiconductor system (200) of one or more semiconductor interposers (201) with a certain dimension (210), conductive vias (212) extending from the first to the second surface, with terminals and attached non-reflow metal studs (215) at the ends of the vias. A semiconducting interposer surface may include discrete electronic components or an integrated circuit. One or more semiconductor chips (202, 203) have a dimension (220, 230) narrower than the interposer dimension, and an active surface with terminals and non-reflow metal studs (224, 234). One chip is flip-attached to the first interposer surface, and another chip to the second interposer surface, so that the interposer dimension projects over the chip dimension. An insulating substrate (204) has terminals and reflow bodies (242) to connect to the studs of the projecting interposer.

Abstract: The invention relates to synergistic mixtures of o-phenylphenol with other microbicidally active compounds, such as bronopol (2-bromo-2-nitro-1,3-propanedial), 2-methyl-2H-isothiazol-3-one, 1,2-dibromo-2,4-dicyanobutane.

Abstract: A composite suitable as a charge-storing material for electrochemical capacitors contains carbon nanotubes and a carbonaceous materiel. The carbonaceous material is the carbonization residue of a biopolymer or seaweed rich in heteroatoms. Wherein the carbonization residue of the biopolymer or seaweed is electrically conductive and has a heteroatom content as detected by XPS of at least 6%.

Abstract: A semiconductor device including a first memory die having a first memory type, a second memory die having a second memory type different from the first memory type, and a logic die such as a microprocessor. The first memory die can be electrically connected to the logic die using a first type of electrical connection preferred for the first memory type. The second memory die can be electrically connected to the logic die using a second type of electrical connection different from the first type of electrical connection which is preferred for the second memory type. Other devices can include dies all of the same type, or two or more dies of a first type and two or more dies of a second type different from the first type.

Abstract: A semiconductor device with a first (101) and a second (111) semiconductor chip assembled on an insulating flexible interposer (120). The interposer, preferably about 25 to 50 ?m thick, has conductive traces (121), a central planar rectangular area and on each side of the rectangle a wing bent at an angle from the central plane. The central area has metal studs (122, 123) on the top and the bottom surface, which match the terminals of the chips, further conductive vias of a pitch center-to-center about 50 ?m or less. The side wings have contact pads (130) with metallic connectors (131) on the bottom surface; the connectors may be solder balls, metal studs, or anisotropic conductive films. The second chip is adhesively attached to a substrate, whereby the interposer faces away from the substrate. The interposer side wings have a convex bending (150) downwardly along the second chip and a concave bending (151) over the substrate; the side wing connectors are attached to the matching substrate sites.

Abstract: In a method of manufacturing a porous coke suitable as a charge-storing material in electrochemical capacitors, one manufactures or provides a non-calcined isotropic coke with spherical or onion-shaped morphology and low graphitizability as a starting material. The starting material is comingled with a caustic alkali to obtain a homogenous mixture. The homogenous mixture is heat treated at a temperature in a range between 650 and 950° C. to obtain the porous coke. The porous coke is washed and neutralized.

Abstract: A semiconductor device with a first (101) and a second (111) semiconductor chip assembled on an insulating flexible interposer (120). The interposer, preferably about 25 to 50 ?m thick, has conductive traces (121), a central planar rectangular area and on each side of the rectangle a wing bent at an angle from the central plane. The central area has metal studs (122, 123) on the top and the bottom surface, which match the terminals of the chips, further conductive vias of a pitch center-to-center about 50 ?m or less. The side wings have contact pads (130) with metallic connectors (131) on the bottom surface; the connectors may be solder balls, metal studs, or anisotropic conductive films. The second chip is adhesively attached to a substrate, whereby the interposer faces away from the substrate. The interposer side wings have a convex bending (150) downwardly along the second chip and a concave bending (151) over the substrate; the side wing connectors are attached to the matching substrate sites.

Abstract: A semiconductor device with a first (101) and a second (111) semiconductor chip assembled on an insulating flexible interposer (120). The interposer, preferably about 25 to 50 ?m thick, has conductive traces (121), a central planar rectangular area and on each side of the rectangle a wing bent at an angle from the central plane. The central area has metal studs (122, 123) on the top and the bottom surface, which match the terminals of the chips, further conductive vias of a pitch center-to-center about 50 ?m or less. The side wings have contact pads (130) with metallic connectors (131) on the bottom surface; the connectors may be solder balls, metal studs, or anisotropic conductive films. The second chip is adhesively attached to a substrate, whereby the interposer faces away from the substrate. The interposer side wings have a convex bending (150) downwardly along the second chip and a concave bending (151) over the substrate; the side wing connectors are attached to the matching substrate sites.

Abstract: A packaged semiconductor device (200) with a substrate (220) having, sandwiched in an insulator (221), a flat sheet-like sieve member (240) made of a non-linear material switching from insulator to conductor mode at a preset voltage. Both member surfaces are free of indentations; the member is perforated by through-holes, which are grouped into a first set (241) and a second set (242). Metal traces (251) over one member surface are positioned across the first set through-holes (241); each trace is connected to a terminal on the substrate top and, through the hole, to a terminal on the substrate bottom. Analogous for metal traces (252) over the opposite member surface and second set through-holes (242). Traces (252) overlap with a portion of traces (252) to form the locations for the conductivity switches, creating local ultra-low resistance bypasses to ground for discharging overstress events.

Abstract: A process flow employing a liquid cleaning agent (510) such as flux to penetrate the interface between the glassy coats (402) and the surface of metal (120) and to delaminate the coats from the metal, and then, at elevated temperatures, to use the agent's vapor pressure to break up the glassy coats into smaller pieces (403). The glassy coats are prevented by their low density to penetrate into the molten solder. Finally, at ambient temperature, the floating filler debris is water-washed and rinsed away. Cleaning agents include low-viscosity liquids (oils) and flux, which do not decompose at elevated temperatures and are mixed with components operable to provide, at the elevated temperatures, the fumes for sufficient vapor pressure to break up and dislodge the coats from the metal contacts.

Abstract: A packaged semiconductor device (200) with a substrate (220) having, sandwiched in an insulator (221), a flat sheet-like sieve member (240) made of a non-linear material switching from insulator to conductor mode at a preset voltage. Both member surfaces are free of indentations; the member is perforated by through-holes, which are grouped into a first set (241) and a second set (242). Metal traces (251) over one member surface are positioned across the first set through-holes (241); each trace is connected to a terminal on the substrate top and, through the hole, to a terminal on the substrate bottom. Analogous for metal traces (252) over the opposite member surface and second set through-holes (242). Traces (252) overlap with a portion of traces (252) to form the locations for the conductivity switches, creating local ultra-low resistance bypasses to ground for discharging overstress events.

Abstract: The present invention relates to storage-stable, synergistically acting combinations comprising glutaraldehyde (GDA) and 2-methyl-2H-isothiazol-3-one (methylisothiazolinone, MIT) and, where appropriate, 2-bromo-2-nitropropane-1,3-diol (bronopol) and/or other active substances for protecting industrials materials.

Abstract: The invention relates to synergistic mixtures of o-phenylphenol with other microbicidally active compounds, such as bronopol (2-bromo-2-nitro-1,3-propanedial), 2-methyl-2H-isothiazol-3-one, 1,2-dibromo-2,4-dicyanobutane.

Abstract: Stacked semiconductor chip package system vertical interconnects and related methods are disclosed. A preferred embodiment of the invention includes a first semiconductor chip with a surface bearing a plurality of first fusible metallic coupling elements. A second semiconductor chip has a plurality of second fusible metallic coupling elements. The first and second fusible metallic coupling elements correspond at the adjoining surfaces of the first and second semiconductor chips when stacked, and are fused to form a gold-tin eutectic alloy fused metallic coupling vertically interconnecting the stacked chips.

Abstract: A composite suitable as a charge-storing material for electrochemical capacitors contains carbon nanotubes and a carbonaceous materiel. The carbonaceous material is the carbonization residue of a biopolymer or seaweed rich in heteroatoms. Wherein the carbonization residue of the biopolymer or seaweed is electrically conductive and has a heteroatom content as detected by XPS of at least 6%.