Abstract: Provided are a multi-purpose magnetic film structure using a spin charge, a method of manufacturing the same, a semiconductor device having the same, and a method of operating the semiconductor memory device. The multi-purpose magnetic film structure includes a lower magnetic film, a tunneling film formed on the lower magnetic film, and an upper magnetic film formed on the tunneling film, wherein the lower and upper magnetic films are ferromagnetic films forming an electrochemical potential difference therebetween when the lower and upper magnetic films have opposite magnetization directions.

Abstract: A method of growing single-walled carbon nanotubes. The method may include supplying at least one of an oxidant and an etchant into a vacuum chamber and supplying a source gas into the vacuum chamber to grow carbon nanotubes on a substrate in an oxidant or an etchant atmosphere. The carbon nanotubes may be grown in an H2O plasma atmosphere. The carbon nanotubes may be grown at a temperature less than 500° C.

Abstract: A method for manufacturing ZnO nanowires with a small diameter and increased length and a device comprising the same. The manufacturing method includes: forming a ZnO seed layer containing a hydroxyl group on a substrate; and growing ZnO nanowires on the ZnO seed layer containing the hydroxyl group. Preferably, the ZnO seed layer is a thin ZnO seed layer containing more than 50% of the hydroxyl group.

Abstract: In a thin film semiconductor device realized on a flexible substrate, an electronic device using the same, and a manufacturing method thereof, the thin film semiconductor device and an electronic device include a flexible substrate, a semiconductor chip, which is formed on the flexible substrate, and a protective cap, which seals the semiconductor chip. Durability of the thin film semiconductor device against stress due to bending of the substrate is improved by using the protective cap.

Abstract: A method of forming nitrogen-doped or other Group V-doped single-walled nanotubes including: forming a catalyst metal layer on a substrate; loading a substrate having the catalyst metal layer into a reaction chamber; forming an H2O or other plasma atmosphere in a reaction chamber; and forming the nitrogen-doped or other Group V-doped carbon nanotubes on the catalyst metal layer by supplying a carbon or other Group IV precursor and a nitrogen or other Group V precursor into a reaction chamber where a chemical reaction therebetween is generated in the H2O or other plasma atmosphere.

Abstract: Provided are an n-type carbon nanotube field effect transistor (CNT FET) and a method of fabricating the n-type CNT FET. The n-type CNT FET may include a substrate; electrodes formed on the substrate and separated from each other; a CNT formed on the substrate and electrically connected to the electrodes; a gate oxide layer formed on the CNT; and a gate electrode formed on the gate oxide layer, wherein the gate oxide layer contains electron donor atoms which donate electrons to the CNT such that the CNT may be n-doped by the electron donor atoms.

Abstract: A memory device may include a channel including at least one carbon nanotube. A source and a drain may be arranged at opposing ends of the channel and may contact different parts of the channel. A first storage node may be formed under the channel, and a second storage node may be formed on the channel. A first gate electrode may be formed under the first storage node and a second gate electrode may be formed on the second storage node.

Abstract: A method of manufacturing silicon nano wires including forming microgrooves on a surface of a silicon substrate, forming a first doping layer doped with a first dopant on the silicon substrate and forming a second doping layer doped with a second dopant between the first doping layer and a surface of the silicon substrate, forming a metal layer on the silicon substrate, forming catalysts by heating the metal layer within the microgrooves of the silicon substrate and growing the nano wires between the catalysts and the silicon substrate using a thermal process.

Abstract: A memory device may include a channel including at least one carbon nanotube. A source and a drain may be arranged at opposing ends of the channel and may contact different parts of the channel. A first storage node may be formed under the channel, and a second storage node may be formed on the channel. A first gate electrode may be formed under the first storage node and a second gate electrode may be formed on the second storage node.

Abstract: A method of selectively removing carbonaceous impurities from carbon nanotubes (CNTs). In an example method, impurities formed on the surface of the CNTs may be removed by a sulfidation reaction between the impurities and sulfur in a sealed space. More specifically, a method of selectively removing only amorphous carbon by which carbon nanotube walls do not react with sulfur and only carbonaceous impurities formed on the surface of the CNTs make sulfidation reaction (C+2S?CS2), that is, a method of selectively removing carbonaceous impurities from the CNTs integrated in a device by sulfidation is provided.

Abstract: A method of selectively removing carbonaceous impurities from carbon nanotubes (CNTs). In an example method, impurities formed on the surface of the CNTs may be removed by a sulfidation reaction between the impurities and sulfur in a sealed space. More specifically, a method of selectively removing only amorphous carbon by which carbon nanotube walls do not react with sulfur and only carbonaceous impurities formed on the surface of the CNTs make sulfidation reaction (C+2S—>CS2), that is, a method of selectively removing carbonaceous impurities from the CNTs integrated in a device by sulfidation is provided.

Abstract: A nanodot material including nanodots formed on silicon oxide, and a method of manufacturing the same, is provided. The nanodot material includes a substrate, a silicon oxide layer, and a plurality of nanodots on the silicon oxide layer.

Abstract: A magnetic random access memory (MRAM) includes a memory cell having a first transistor and a first magnetic tunneling junction (MTJ) layer, and a reference cell operable as a basis when reading data stored in the memory cell, the reference cell including second and third MTJ layers arranged in parallel to each other, and a second transistor connected in series to each of the second and third MTJ layers, the second transistor having a driving capability corresponding to twice a driving capability of the first transistor of the memory cell.

Abstract: A nano-elastic memory device and a method of manufacturing the same. The nano-elastic memory device may include a substrate, a plurality of lower electrodes arranged in parallel on the substrate, a support unit formed of an insulating material to a desired or predetermined thickness on the substrate having cavities that expose the lower electrodes, a nano-elastic body extending perpendicular from a surface of the lower electrodes in the cavities, and a plurality of upper electrodes formed on the support unit and perpendicularly crossing the lower electrodes over the nano-elastic bodies.

Abstract: A nano-elastic memory device and a method of manufacturing the same. The nano-elastic memory device may include a substrate, a plurality of lower electrodes arranged in parallel on the substrate, a support unit formed of an insulating material to a desired or predetermined thickness on the substrate having cavities that expose the lower electrodes, a nano-elastic body extending perpendicular from a surface of the lower electrodes in the cavities, and a plurality of upper electrodes formed on the support unit and perpendicularly crossing the lower electrodes over the nano-elastic bodies.

Abstract: Provided are an n-type carbon nanotube field effect transistor (CNT FET) and a method of fabricating the n-type CNT FET. The n-type CNT FET may include a substrate; electrodes formed on the substrate and separated from each other; a CNT formed on the substrate and electrically connected to the electrodes; a gate oxide layer formed on the CNT; and a gate electrode formed on the gate oxide layer, wherein the gate oxide layer contains electron donor atoms which donate electrons to the CNT such that the CNT may be n-doped by the electron donor atoms.

Abstract: Provided are a field emission electrode, a method of manufacturing the field emission electrode, and a field emission device including the field emission electrode. The field emission electrode may include a substrate, carbon nanotubes formed on the substrate, and a conductive layer formed on at least a portion of the surface of the substrate. Conductive nanoparticles may be attached to the external walls of the carbon nanotubes.

Abstract: A non-volatile memory device including a metal-insulator transition (MIT) material is provided. The non-volatile memory device includes a gate stack having a tunneling layer, a charge trap layer, a blocking layer and a gate electrode formed on a substrate, wherein at least one of the tunneling layer and the blocking layer is formed of an MIT (metal-insulator transition) material.

Abstract: A method of isolating semiconducting carbon nanotubes includes mixing carbon nanotubes with a mixed acid solution of nitric acid and sulfuric acid to obtain a dispersion of carbon nanotubes, stirring the carbon nanotube dispersion, and filtering the carbon nanotube dispersion. Functional groups remaining on the filtered carbon nanotubes may then be removed, e.g., via heating.

Abstract: Provided are an n-type carbon nanotube field effect transistor (CNT FET) and a method of fabricating the n-type CNT FET. The n-type CNT FET may include a substrate; electrodes formed on the substrate and separated from each other; a CNT forrmed on the substrate and electrically connected to the electrodes; a gate oxide layer formed on the CNT; and a gate electrode formed on the gate oxide layer, wherein the gate oxide layer contains electron donor atoms which donate electrons to the CNT such that the CNT may be n-doped by the electron donor atoms.