Patents by Inventor Wan-jun Park

Wan-jun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050156203
    Abstract: Provided are a vertical carbon nanotube field effect transistor (CNTFET) and a method of manufacturing the same. The method includes: forming a first electrode on a substrate; forming a stack of multiple layers (“multi-layer stack”) on the first electrode, the multiple layers including first and second buried layers and a sacrificial layer interposed between the first and second buried layers; forming a vertical well into the multi-layer stack; growing a CNT within the well; forming a second electrode connected to the CNT on the multi-layer stack into which the well has been formed; forming a protective layer on the second electrode; removing the sacrificial layer and exposing the CNT between the first and second buried layers; forming a gate insulating layer on the exposed surface of the CNT; and forming a gate enclosing the CNT on the gate insulating layer.
    Type: Application
    Filed: December 13, 2004
    Publication date: July 21, 2005
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Eun-ju Bae, Yo-sep Min, Wan-jun Park
  • Publication number: 20050158777
    Abstract: A method of isolating nucleic acid using a carbon nanotube is provided. The method includes contacting a mixture of a sample containing nucleic acid and a salt solution with a carbon nanotube to form a nucleic acid-carbon nanotube composite; washing the nucleic acid-carbon nanotube composite with a washing buffer; and eluting the nucleic acid from the nucleic acid-carbon nanotube composite.
    Type: Application
    Filed: December 28, 2004
    Publication date: July 21, 2005
    Inventors: Yoon-kyoung Cho, Joon-ho Kim, Jung-joo Hwang, Wan-jun Park, Geun-bae Lim
  • Publication number: 20050146967
    Abstract: A magnetic random access memory (MRAM), and a method of manufacturing the same, includes a switching device and a magnetic tunneling junction (MTJ) cell connected to the switching device, wherein the MTJ cell includes a pinned film having a metal film and a magnetic film, the magnetic film enclosing the metal film.
    Type: Application
    Filed: October 25, 2004
    Publication date: July 7, 2005
    Inventors: Sang-jin Park, Tae-wan Kim, Wan-jun Park, Jang-eun Lee
  • Publication number: 20050111253
    Abstract: In an apparatus for analyzing a magnetic random access memory (MRAM), and a method of analyzing an MRAM, the apparatus includes an MRAM mounting unit on which an MRAM is mounted, a magnetic field applying unit positioned around the MRAM mounting unit for applying an external magnetic field to the MRAM mounted on the MRAM mounting unit, a cell addressing unit for selecting one of a plurality of unit cells of the MRAM mounted on the MRAM mounting unit, a source measurement unit for applying an internal magnetic field to the selected unit cell of the MRAM or for measuring a resistance of the selected unit cell of the MRAM, and a computer unit for storing and for analyzing data regarding the measured resistance of the each of the plurality of unit cells of the MRAM.
    Type: Application
    Filed: November 24, 2004
    Publication date: May 26, 2005
    Inventors: Wan-jun Park, In-jun Hwang, Tae-wan Kim
  • Patent number: 6894920
    Abstract: A magnetic RAM (MRAM) using a thermo-magnetic spontaneous Hall effect includes a MOS transistor formed on a substrate; a heating layer formed above the MOS transistor and connected to a source region of the MOS transistor; a memory layer having a data write area to which data is written, the data write area being formed on the heating means; a bit line formed on the data write area; an upper insulating film formed on the bit line and the memory layer; and a write line formed on the upper insulating film so that a magnetic field necessary for writing data is generated in at least the data write area of the memory layer. The MRAM writes or reads data using the fact that a spontaneous Hall voltage greatly differs according to the magnetization state of a memory layer, thereby providing the device a high data sensing margin.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: May 17, 2005
    Assignee: Samsung Electronics Co, Ltd.
    Inventors: Tae-wan Kim, Kee-won Kim, Wan-jun Park, I-hun Song, Sang-jin Park
  • Publication number: 20050036399
    Abstract: A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.
    Type: Application
    Filed: September 28, 2004
    Publication date: February 17, 2005
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Wan-jun Park, Taek-dong Lee, Byeong-kook Park, Tae-wan Kim, I-hun Song, Sang-jin Park
  • Publication number: 20040245557
    Abstract: A nonvolatile memory device including one transistor and one resistant material and a method of manufacturing the nonvolatile memory device are provided. The nonvolatile memory device includes a substrate, a transistor formed on the substrate, and a data storage unit connected to a drain of the transistor. The data storage unit includes a data storage material layer having different resistance characteristics in different voltage ranges.
    Type: Application
    Filed: May 25, 2004
    Publication date: December 9, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sun-Ae Seo, In-Kyeong Yoo, Myoung-Jae Lee, Wan-Jun Park
  • Patent number: 6815784
    Abstract: A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.
    Type: Grant
    Filed: May 28, 2003
    Date of Patent: November 9, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wan-jun Park, Taek-dong Lee, Byeong-kook Park, Tae-wan Kim, I-hun Song, Sang-jin Park
  • Publication number: 20040211995
    Abstract: In a magnetic random access memory (MRAM) having a transistor and a magnetic tunneling junction (MTJ) layer in a unit cell, the MTJ layer includes a lower magnetic layer, an oxidation preventing layer, a tunneling oxide layer, and an upper magnetic layer, which are sequentially stacked. The tunneling oxide layer may be formed using an atomic layer deposition (ALD) method. At least the oxidation preventing layer may be formed using a method other than the ALD method.
    Type: Application
    Filed: April 23, 2004
    Publication date: October 28, 2004
    Inventors: Sang-jin Park, Tae-wan Kim, Jung-hyun Lee, Wan-jun Park, I-hun Song
  • Publication number: 20040206994
    Abstract: In an MRAM and method for fabricating the same, the MRAM includes a semiconductor substrate, a transistor formed on the semiconductor substrate, an interlayer dielectric formed on the semiconductor substrate to cover the transistor, and first and second MTJ cells formed in the interlayer dielectric to be coupled in parallel with a drain region of the transistor, wherein the first MTJ cell is coupled to a first bit line formed in the interlayer dielectric and the second MTJ cell is coupled to a second bit line formed in the interlayer dielectric, and wherein a data line is formed between the first MTJ cell and a gate electrode of the transistor to be perpendicular to the first bit line and the second bit line. The MRAM provides high integration density, sufficient sensing margin, high-speed operation and reduced noise, requires reduced current for recording data and eliminates a voltage offset.
    Type: Application
    Filed: January 20, 2004
    Publication date: October 21, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Wan-jun Park, Hyung-soon Shin, Seung-jun Lee
  • Publication number: 20040188830
    Abstract: A magnetoresistive random access memory is provided. The magnetoresistive random access memory includes a first magnetic layer of which the direction of a magnetic vector is fixed, a second magnetic layer which is positioned in parallel with the first magnetic layer and of which the direction of a magnetic vector is reversible, and a non-magnetic layer interposed between the first and second magnetic layers, the second magnetic layer having an aspect ratio of 2 or less, a thickness of 5 nm or less, and a saturation magnetization of 800 emu/cm3 or less. The magnetoresistive random access memory has kink-free, magneto-resistance characteristics, thereby exhibiting high selectivity regardless of process capability.
    Type: Application
    Filed: January 7, 2004
    Publication date: September 30, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyung-jin Lee, Wan-jun Park
  • Patent number: 6781871
    Abstract: A magnetic random access memory using magnetic domain drag and giant magnetoresistance (GMR) or tunnel magnetoresistance (TMR) and a method of operating the same, wherein the magnetic random access memory includes a data storage unit including a fixed layer, a non-magnetic layer, and a free layer having two ends; a data input means electrically connected to both ends of the free layer, for applying current to the free layer to input data into the data storage unit; and a data output means electrically connected to the free layer and the fixed layer to output data stored in the data storage unit. Accordingly, a magnetic random access memory according to the present invention has superior performance than one using a switching field to record data.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: August 24, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Wan-jun Park, Tae-wan Kim, I-hun Song, Sang-jin Park, Richard J. Gambino
  • Publication number: 20040149987
    Abstract: In a thin film semiconductor device realized on a flexible substrate, an electronic device using the same, and a manufacturing method thereof, the thin film semiconductor device and an electronic device include a flexible substrate, a semiconductor chip, which is formed on the flexible substrate, and a protective cap, which seals the semiconductor chip. Durability of the thin film semiconductor device against stress due to bending of the substrate is improved by using the protective cap.
    Type: Application
    Filed: December 31, 2003
    Publication date: August 5, 2004
    Inventors: Do-young Kim, Wan-jun Park, Young-soo Park, June-key Lee, Yo-sep Min, Jang-yeon Kwon, Sun-ae Seo, Young-min Choi, Soo-doo Chae
  • Publication number: 20040090822
    Abstract: An MRAM having improved integration density and ability to use a magnetic tunneling junction (MTJ) layer having a low MR ratio, and methods for manufacturing and driving the same, are disclosed. The MRAM includes a semiconductor substrate having a bipolar junction transistor (BJT) formed thereon, a bit line coupled to an emitter of the BJT, an MTJ layer coupled to the BJT, a word line coupled to the MTJ layer, a plate line coupled to the BJT so as to be spaced apart from the MTJ layer, and an interlayer dielectric formed between components of the MRAM, wherein the MTJ layer is coupled to a base and a collector of the BJT, the plate line is coupled to the collector, and an amplifying unit for amplifying a signal while data is read out from the MTJ layer is coupled to the bit line, thereby allowing precise reading of the data.
    Type: Application
    Filed: November 6, 2003
    Publication date: May 13, 2004
    Inventors: In-Kyeong Yoo, Wan-Jun Park
  • Publication number: 20030235072
    Abstract: A magnetic RAM (MRAM) using a thermo-magnetic spontaneous Hall effect includes a MOS transistor formed on a substrate; a heating means formed above the MOS transistor and connected to a source region of the MOS transistor; a memory layer having a data write area to which data is written, the data write area being formed on the heating means; a bit line formed on the data write area; an upper insulating film formed on the bit line and the memory layer; and a write line formed on the upper insulating film so that a magnetic field necessary for writing data is generated in at least the data write area of the memory layer. The MRAM writes or reads data using the fact that a spontaneous Hall voltage greatly differs according to the magnetization state of a memory layer, thereby providing the device a high data sensing margin.
    Type: Application
    Filed: June 20, 2003
    Publication date: December 25, 2003
    Inventors: Tae-Wan Kim, Kee-Won Kim, Wan-Jun Park, I-Hun Song, Sang-Jin Park
  • Publication number: 20030222322
    Abstract: A magneto-resistive random access memory includes a MOS transistor having a first gate and source and drain junctions on a substrate, a lower electrode connected to the source junction, a first magnetic layer on the lower electrode, a dielectric barrier layer including aluminum and hafnium on the first magnetic layer which, together with the first magnetic layer, form a potential well, a second magnetic layer on the dielectric barrier layer opposite the first magnetic layer, an upper electrode on the second magnetic layer, a second gate interposed between the first gate and the lower electrode to control the magnetic data of one of the first and second magnetic layers, and a bit line positioned orthogonal to the first gate and electrically connected to the upper electrode. Improved characteristics of the barrier layer increase a magnetic resistance ratio and improve data storage capacity of the magneto-resistive random access memory.
    Type: Application
    Filed: May 28, 2003
    Publication date: December 4, 2003
    Inventors: Wan-jun Park, Taek-dong Lee, Byeong-kook Park, Tae-wan Kim, I-hun Song, Sang-Jin Park
  • Publication number: 20030128580
    Abstract: A high-density magnetic memory device and method of operating the same, wherein the high-density magnetic memory device includes a vertical transistor formed on a substrate, a magnetic memory element formed on the vertical transistor, the magnetic memory element using magnetic materials for storing data, a bit line connected to the vertical transistor via the magnetic memory element, a word line for writing over and across the bit line, and an insulating layer formed between the word line for writing and other components located below the word line for writing. According to the present invention, it is possible to fabricate a high-density magnetic memory device with a vertical transistor.
    Type: Application
    Filed: January 7, 2003
    Publication date: July 10, 2003
    Inventors: Sang-jin Park, Wan-jun Park, Tae-wan Kim, I-hun Song
  • Publication number: 20030116426
    Abstract: A method of manufacturing a Heusler alloy thin film by co-sputtering is provided. The Heusler alloy thin film has a general structural formula of either X2YZ or XYZ and is deposited by co-sputtering using a deposition apparatus having a substrate placed on a substrate holder in a chamber and targets positioned on a target bracket spaced apart from the substrate. Components of the Heusler alloy thin film are placed on the target bracket as either single targets or binary alloy targets. Thus, it is easy to manufacture a Heusler alloy thin film having excellent magnetic characteristics.
    Type: Application
    Filed: December 4, 2002
    Publication date: June 26, 2003
    Inventors: Kee-won Kim, Wan-Jun Park, Tae-wan Kim, I-hun Song, Sang-jin Park
  • Publication number: 20030117837
    Abstract: A magnetic random access memory using magnetic domain drag and giant magnetoresistance (GMR) or tunnel magnetoresistance (TMR) and a method of operating the same, wherein the magnetic random access memory includes a data storage unit including a fixed layer, a non-magnetic layer, and a free layer having two ends; a data input means electrically connected to both ends of the free layer, for applying current to the free layer to input data into the data storage unit; and a data output means electrically connected to the free layer and the fixed layer to output data stored in the data storage unit. Accordingly, a magnetic random access memory according to the present invention has superior performance than one using a switching field to record data.
    Type: Application
    Filed: December 12, 2002
    Publication date: June 26, 2003
    Inventors: Wan-jun Park, Tae-wan Kim, I-hun Song, Sang-jin Park, Richard J. Gambino