Abstract: A method of growing single-walled carbon nanotubes. The method may include supplying at least one of an oxidant and an etchant into a vacuum chamber and supplying a source gas into the vacuum chamber to grow carbon nanotubes on a substrate in an oxidant or an etchant atmosphere. The carbon nanotubes may be grown in an H2O plasma atmosphere. The carbon nanotubes may be grown at a temperature less than 500° C.

Abstract: In an apparatus for analyzing a magnetic random access memory (MRAM), and a method of analyzing an MRAM, the apparatus includes an MRAM mounting unit on which an MRAM is mounted, a magnetic field applying unit positioned around the MRAM mounting unit for applying an external magnetic field to the MRAM mounted on the MRAM mounting unit, a cell addressing unit for selecting one of a plurality of unit cells of the MRAM mounted on the MRAM mounting unit, a source measurement unit for applying an internal magnetic field to the selected unit cell of the MRAM or for measuring a resistance of the selected unit cell of the MRAM, and a computer unit for storing and for analyzing data regarding the measured resistance of the each of the plurality of unit cells of the MRAM.

Abstract: Provided is a method of fabricating carbon nanotubes using a focused ion beam (FIB). The method includes: preparing a substrate; scanning the substrate with the FIB; and growing the carbon nanotubes on the scanned substrate.

Abstract: Provided are a vertical carbon nanotube field effect transistor (CNTFET) and a method of manufacturing the same. The method includes: forming a first electrode on a substrate; forming a stack of multiple layers (“multi-layer stack”) on the first electrode, the multiple layers including first and second buried layers and a sacrificial layer interposed between the first and second buried layers; forming a vertical well into the multi-layer stack; growing a CNT within the well; forming a second electrode connected to the CNT on the multi-layer stack into which the well has been formed; forming a protective layer on the second electrode; removing the sacrificial layer and exposing the CNT between the first and second buried layers; forming a gate insulating layer on the exposed surface of the CNT; and forming a gate enclosing the CNT on the gate insulating layer.

Abstract: A method of synthesizing carbon nanotubes including forming a solution including an organometallic compound containing catalyst particles and a solvent, adding at least one support to the solution, wherein the carbon nanotubes are synthesized on a surface of the at least one support, and applying radiation to the solution to which the at least one support is added.

Abstract: Provided are a method of growing carbon nanotubes and a carbon nanotube device. The method includes: depositing an aluminum layer on a substrate; forming an insulating layer over the substrate to cover the aluminum layer; patterning the insulating layer and the aluminum layer on the substrate to expose a side of the aluminum layer; forming a plurality of holes in the exposed side of the aluminum layer to a predetermined depth; depositing a catalyst metal layer on the bottoms of the holes; and growing the carbon nanotubes from the catalyst metal layer.

Abstract: A catalytic resist and a method of patterning catalyst particles using the same are provided. The catalytic resist includes a resist and a metal precursor compound uniformly dispersed in the resist.

Abstract: In a magnetic random access memory (MRAM) having a transistor and a magnetic tunneling junction (MTJ) layer in a unit cell, the MTJ layer includes a lower magnetic layer, an oxidation preventing layer, a tunneling oxide layer, and an upper magnetic layer, which are sequentially stacked. The tunneling oxide layer may be formed using an atomic layer deposition (ALD) method. At least the oxidation preventing layer may be formed using a method other than the ALD method.

Abstract: In a magnetic random access memory (MRAM) having a transistor and a magnetic tunneling junction (MTJ) layer in a unit cell, the MTJ layer includes a lower magnetic layer, an oxidation preventing layer, a tunneling oxide layer, and an upper magnetic layer, which are sequentially stacked. The tunneling oxide layer may be formed using an atomic layer deposition (ALD) method. At least the oxidation preventing layer may be formed using a method other than the ALD method.

Abstract: A phase change memory device and a method of operating the same are provided. The phase change memory device may include a plurality of unit cells arranged in a matrix composed of rows and columns; a plurality of program bit lines and read bit lines arranged in rows, each of the program and read bit lines having a row selection transistor formed at one end thereof; and a plurality of program word lines and read word lines arranged in columns, each of the program and read word lines having a column selection transistor formed at one end thereof. Each of the unit cells may include a phase change resistor and an exothermal resistor used to heat the phase change resistor.

Abstract: A magnetoresistive random access memory is provided. The magnetoresistive random access memory includes a first magnetic layer of which the direction of a magnetic vector is fixed, a second magnetic layer which is positioned in parallel with the first magnetic layer and of which the direction of a magnetic vector is reversible, and a non-magnetic layer interposed between the first and second magnetic layers, the second magnetic layer having an aspect ratio of 2 or less, a thickness of 5 nm or less, and a saturation magnetization of 800 emu/cm3 or less. The magnetoresistive random access memory has kink-free, magneto-resistance characteristics, thereby exhibiting high selectivity regardless of process capability.

Abstract: Provided are a multi-purpose magnetic film structure using a spin charge, a method of manufacturing the same, a semiconductor device having the same, and a method of operating the semiconductor memory device. The multi-purpose magnetic film structure includes a lower magnetic film, a tunneling film formed on the lower magnetic film, and an upper magnetic film formed on the tunneling film, wherein the lower and upper magnetic films are ferromagnetic films forming an electrochemical potential difference therebetween when the lower and upper magnetic films have opposite magnetization directions.

Abstract: An MRAM having improved integration density and ability to use a magnetic tunneling junction (MTJ) layer having a low MR ratio, and methods for manufacturing and driving the same, are disclosed. The MRAM includes a semiconductor substrate having a bipolar junction transistor (BJT) formed thereon, a bit line coupled to an emitter of the BJT, an MTJ layer coupled to the BJT, a word line coupled to the MTJ layer, a plate line coupled to the BJT so as to be spaced apart from the MTJ layer, and an interlayer dielectric formed between components of the MRAM, wherein the MTJ layer is coupled to a base and a collector of the BJT, the plate line is coupled to the collector, and an amplifying unit for amplifying a signal while data is read out from the MTJ layer is coupled to the bit line, thereby allowing precise reading of the data.

Abstract: A nanodot material including nanodots formed on silicon oxide, and a method of manufacturing the same, is provided. The nanodot material includes a substrate, a silicon oxide layer, and a plurality of nanodots on the silicon oxide layer.

Abstract: In an MRAM and method for fabricating the same, the MRAM includes a semiconductor substrate, a transistor formed on the semiconductor substrate, an interlayer dielectric formed on the semiconductor substrate to cover the transistor, and first and second MTJ cells formed in the interlayer dielectric to be coupled in parallel with a drain region of the transistor, wherein the first MTJ cell is coupled to a first bit line formed in the interlayer dielectric and the second MTJ cell is coupled to a second bit line formed in the interlayer dielectric, and wherein a data line is formed between the first MTJ cell and a gate electrode of the transistor to be perpendicular to the first bit line and the second bit line. The MRAM provides high integration density, sufficient sensing margin, high-speed operation and reduced noise, requires reduced current for recording data and eliminates a voltage offset.

Abstract: A method of isolating semiconducting carbon nanotubes includes mixing carbon nanotubes with a mixed acid solution of nitric acid and sulfuric acid to obtain a dispersion of carbon nanotubes, stirring the carbon nanotube dispersion, and filtering the carbon nanotube dispersion. Functional groups remaining on the filtered carbon nanotubes may then be removed, e.g., via heating.

Abstract: Provided are a method of horizontally growing carbon nanotubes and a carbon nanotube device. The method includes: depositing an aluminum layer on a substrate; forming an insulating layer over the substrate to cover the aluminum layer; patterning the insulating layer and the aluminum layer on the substrate to expose a side of the aluminum layer; forming a plurality of holes in the exposed side of the aluminum layer to a predetermined depth; depositing a catalyst metal layer on the bottoms of the holes; and horizontally growing the carbon nanotubes from the catalyst metal layer. The carbon nanotubes can be grown in directions rather that horizontally relative to the substrate when laid flat.

Abstract: In a magnetic random access memory (MRAM), and a method of reading data from the same, the MRAM includes a memory cell having one transistor and one magnetic tunneling junction (MTJ) layer, and a reference cell that is operable for use as a basis when reading data stored in the memory cell, wherein the reference cell includes first and second MTJ layers provided in parallel to each other, and first and second transistors provided in parallel to each other, the first and second transistors being respectively connected in series to the first and second MTJ layers. Alternatively, one transistor having a driving capability corresponding to twice a driving capability of the transistor of the memory cell may be substituted for the first and second transistors of the reference cell.

Abstract: In an MRAM and method for fabricating the same, the MRAM includes a semiconductor substrate, a transistor formed on the semiconductor substrate, an interlayer dielectric formed on the semiconductor substrate to cover the transistor, and first and second MTJ cells formed in the interlayer dielectric to be coupled in parallel with a drain region of the transistor, wherein the first MTJ cell is coupled to a first bit line formed in the interlayer dielectric and the second MTJ cell is coupled to a second bit line formed in the interlayer dielectric, and wherein a data line is formed between the first MTJ cell and a gate electrode of the transistor to be perpendicular to the first bit line and the second bit line. The MRAM provides high integration density, sufficient sensing margin, high-speed operation and reduced noise, requires reduced current for recording data and eliminates a voltage offset.

Abstract: Provided are a vertical carbon nanotube field effect transistor (CNTFET) and a method of manufacturing the same. The method includes: forming a first electrode on a substrate; forming a stack of multiple layers (“multi-layer stack”) on the first electrode, the multiple layers including first and second buried layers and a sacrificial layer interposed between the first and second buried layers; forming a vertical well into the multi-layer stack; growing a CNT within the well; forming a second electrode connected to the CNT on the multi-layer stack into which the well has been formed; forming a protective layer on the second electrode; removing the sacrificial layer and exposing the CNT between the first and second buried layers; forming a gate insulating layer on the exposed surface of the CNT; and forming a gate enclosing the CNT on the gate insulating layer.