Abstract: An orientation detection circuit is provided. The circuit includes a processor, a first resistor, a second resistor, a third resistor, and a vibration switch. The processor comprises a first input pin and a second input pin. The second resistor has a resistance value greater than that of the first resistor. The third resistor has a resistance value greater than that of the second resistor. The switch comprises a first terminal connected to a power source and a second terminal connected to the second input pin and connected to ground via the third resistor. The switch includes a third terminal connected to the first terminal via the second resistor, and a fourth terminal connected to the first input pin and connected to ground via the first resistor. The switch also includes a fifth terminal connected to the fourth terminal, and a conductive ball for contacting two or three of the terminals.

Abstract: An orientation detection circuit is provided. The circuit includes a processor, a first resistor, a second resistor, a third resistor, a vibration switch, a first transistor, and a second transistor. The processor includes a first input pin and a second input pin. The third resistor has a resistance value greater than that of the first resistor and the third resistor. The vibration switch includes a first terminal being grounded, a second terminal connected to the second input pin, a third terminal connected to a power source, and a fourth terminal connected via the third resistor to the second terminal and connected to the first input pin. The first transistor has a first source connected via the first resistor to the power source, a first drain connected to the first input pin, and a first gate connected to the second input pin.

Abstract: A method of forming nitrogen-doped or other Group V-doped single-walled nanotubes including: forming a catalyst metal layer on a substrate; loading a substrate having the catalyst metal layer into a reaction chamber; forming an H2O or other plasma atmosphere in a reaction chamber; and forming the nitrogen-doped or other Group V-doped carbon nanotubes on the catalyst metal layer by supplying a carbon or other Group IV precursor and a nitrogen or other Group V precursor into a reaction chamber where a chemical reaction therebetween is generated in the H2O or other plasma atmosphere.

Abstract: Disclosed is a time slot allocation method for reducing consumption of energy in a wireless sensor network, including transmitting and receiving, by an upper node, a report request and a response to and from at least one lower node in order to identify whether there is data to be transmitted between the upper node and the at least one lower node, transmitting, by the upper node, information required for data transmission to the at least one lower node based on the report request and response, and transmitting and receiving, by the upper node, data to and from the at least one lower node based on the information required for data transmission.

Abstract: Provided are an n-type carbon nanotube field effect transistor (CNT FET) and a method of fabricating the n-type CNT FET. The n-type CNT FET may include a substrate; electrodes formed on the substrate and separated from each other; a CNT formed on the substrate and electrically connected to the electrodes; a gate oxide layer formed on the CNT; and a gate electrode formed on the gate oxide layer, wherein the gate oxide layer contains electron donor atoms which donate electrons to the CNT such that the CNT may be n-doped by the electron donor atoms.

Abstract: For performing a retry in a data storage device, a spin jitter value corresponding to a desired sector of a disc is determined. A read timing is adjusted according to the spin jitter value of the desired sector. A retry of a data read is performed for the desired sector with the adjusted read timing. Thus, the present invention accounts for eccentricity of the disc as indicated by the spin jitter value during retry of the data read operation.

Abstract: A memory device may include a channel including at least one carbon nanotube. A source and a drain may be arranged at opposing ends of the channel and may contact different parts of the channel. A first storage node may be formed under the channel, and a second storage node may be formed on the channel. A first gate electrode may be formed under the first storage node and a second gate electrode may be formed on the second storage node.

Abstract: A method of manufacturing silicon nano wires including forming microgrooves on a surface of a silicon substrate, forming a first doping layer doped with a first dopant on the silicon substrate and forming a second doping layer doped with a second dopant between the first doping layer and a surface of the silicon substrate, forming a metal layer on the silicon substrate, forming catalysts by heating the metal layer within the microgrooves of the silicon substrate and growing the nano wires between the catalysts and the silicon substrate using a thermal process.

Abstract: A memory device may include a channel including at least one carbon nanotube. A source and a drain may be arranged at opposing ends of the channel and may contact different parts of the channel. A first storage node may be formed under the channel, and a second storage node may be formed on the channel. A first gate electrode may be formed under the first storage node and a second gate electrode may be formed on the second storage node.

Abstract: A method of handling a servo sector defect includes recognizing a first servo sector using a controller; determining whether the first servo sector has a defect; and when the first servo sector has a defect assigning at least a part of a next data sector to be assigned to the first servo sector to a second servo sector having no defect.

Abstract: A method of selectively removing carbonaceous impurities from carbon nanotubes (CNTs). In an example method, impurities formed on the surface of the CNTs may be removed by a sulfidation reaction between the impurities and sulfur in a sealed space. More specifically, a method of selectively removing only amorphous carbon by which carbon nanotube walls do not react with sulfur and only carbonaceous impurities formed on the surface of the CNTs make sulfidation reaction (C+2S?CS2), that is, a method of selectively removing carbonaceous impurities from the CNTs integrated in a device by sulfidation is provided.

Abstract: A method of selectively removing carbonaceous impurities from carbon nanotubes (CNTs). In an example method, impurities formed on the surface of the CNTs may be removed by a sulfidation reaction between the impurities and sulfur in a sealed space. More specifically, a method of selectively removing only amorphous carbon by which carbon nanotube walls do not react with sulfur and only carbonaceous impurities formed on the surface of the CNTs make sulfidation reaction (C+2S—>CS2), that is, a method of selectively removing carbonaceous impurities from the CNTs integrated in a device by sulfidation is provided.

Abstract: A flying on demand (FOD) voltage of a hard disk drive (HDD) is controlled by detecting a shock occurring to the HDD on which a magnetic head that records data on a disk or reproduces data from the disk is mounted, and if the shock is detected, controlling the FOD voltage that is applied to the magnetic head to thermally expand an end of the magnetic head.

Abstract: A nanodot material including nanodots formed on silicon oxide, and a method of manufacturing the same, is provided. The nanodot material includes a substrate, a silicon oxide layer, and a plurality of nanodots on the silicon oxide layer.

Abstract: A magnetic random access memory (MRAM) includes a memory cell having a first transistor and a first magnetic tunneling junction (MTJ) layer, and a reference cell operable as a basis when reading data stored in the memory cell, the reference cell including second and third MTJ layers arranged in parallel to each other, and a second transistor connected in series to each of the second and third MTJ layers, the second transistor having a driving capability corresponding to twice a driving capability of the first transistor of the memory cell.

Abstract: A nano-elastic memory device and a method of manufacturing the same. The nano-elastic memory device may include a substrate, a plurality of lower electrodes arranged in parallel on the substrate, a support unit formed of an insulating material to a desired or predetermined thickness on the substrate having cavities that expose the lower electrodes, a nano-elastic body extending perpendicular from a surface of the lower electrodes in the cavities, and a plurality of upper electrodes formed on the support unit and perpendicularly crossing the lower electrodes over the nano-elastic bodies.

Abstract: A plurality of retry tables is used for adaptive and flexible error correction during a read/write operation within a disk drive. The plurality of retry tables is stored in a data storage unit, and one of the retry tables is selected to be used for the error correction. In addition, firmware is not modified for using any of the plurality of retry tables during the error correction. One of the retry tables becomes eventually selected as being optimum for the error correction depending on an application, operating conditions, and head/mechanical characteristics of the disk drive.

Abstract: The invention relates to a new process for preparing benzimidazole derivatives having a chiral sulfoxide group in enantiomerically pure form or in a form in which one of the two enantiomers is present in an increased quantity over the other enantiomer. The invention likewise relates to a process for preparing the salts of the individual enantiomers of the benzimidazole derivatives with a chiral sulfoxide group. The invention relates in particular to a process for preparing the S-enantiomer of omeprazole (also known as esomeprazole) and the salts thereof, more particularly the zinc salt of the S-enantiomer of omeprazole. In the new process a prochiral sulfide is oxidized in an organic solvent with an oxidizing agent in the presence of a titanium(IV) complex.

Abstract: A nano-elastic memory device and a method of manufacturing the same. The nano-elastic memory device may include a substrate, a plurality of lower electrodes arranged in parallel on the substrate, a support unit formed of an insulating material to a desired or predetermined thickness on the substrate having cavities that expose the lower electrodes, a nano-elastic body extending perpendicular from a surface of the lower electrodes in the cavities, and a plurality of upper electrodes formed on the support unit and perpendicularly crossing the lower electrodes over the nano-elastic bodies.

Abstract: A method of performing a retry in a data storage system, and an apparatus using the same, includes storing information regarding retry parameters corresponding to a position on a storage medium in response to successfully reading data from the position using the retry parameters, reading the data from the position in a subsequent read operation according to the stored information, and rewriting the data at the position.