Patents by Inventor WANG HUANG
WANG HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240132597Abstract: The present disclosure is generally directed to the use of compositions that include antibodies, e.g., monoclonal, chimeric, affinity-matured or humanized antibodies, antibody fragments, etc., that specifically bind one or more epitopes within a Sortilin protein, e.g., human Sortilin or mammalian Sortilin, and have improved and/or enhanced functional characteristics, in treating and/or delaying progression of a disease or injury in an individual in need thereof.Type: ApplicationFiled: December 7, 2023Publication date: April 25, 2024Applicant: Alector LLCInventors: Robert PAUL, Sam JACKSON, Omer Rizwan SIDDIQUI, Michael F. WARD, Felix Leejia YEH, Julie Y. HUANG, Whedy WANG, Yijie LIAO, Brian C. MANGAL
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Publication number: 20240133735Abstract: A device may receive, from a fiber sensor device, sensing data associated with a fiber optic cable, the sensing data being produced by an activity that poses a threat of damage to the fiber optic cable, and the sensing data identifying: amplitudes of vibration signals, frequencies of the vibration signals, patterns of the vibration signals, times associated with the vibration signals, and locations along the fiber optic cable associated with the vibration signals. The device may process, with a machine learning model, the sensing data to determine a threat level of the activity to the fiber optic cable, the machine learning model having been trained based on historical information regarding detected vibrations, historical information regarding sources of the detected vibrations, and historical information regarding threat levels to the fiber optic cable. The device may perform one or more actions based on the threat level to the fiber optic cable.Type: ApplicationFiled: December 29, 2023Publication date: April 25, 2024Applicants: Verizon Patent and Licensing Inc., NEC Laboratories America, Inc., NEC CorporationInventors: Tiejun J. XIA, Glenn A. WELLBROCK, Ming-Fang HUANG, Ting WANG, Yoshiaki AONO
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Patent number: 11965959Abstract: The present disclosure describes ultrasound systems configured to enhance flow imaging and analysis by adaptively adjusting one or more imaging parameters in response to acquired flow measurements. Example systems can include an ultrasound transducer and one or more processors. Using the system components, mean flow velocity magnitude and acceleration can be determined within a target region during an acquisition phase, which may include a cardiac cycle. One or more adjusted flow imaging parameters, such as adjusted ensemble length, temporal smoothing filter length and/or step size, can be determined based on the acquired flow measurements to increase the signal quality of newly acquired ultrasound echo signals. The adjusted flow imaging parameters can then be applied by the ultrasound transducer during a second acquisition phase.Type: GrantFiled: October 14, 2019Date of Patent: April 23, 2024Assignee: KONINKLIJKE PHILIPS N.V.Inventors: Shiying Wang, Sheng-Wen Huang, Hua Xie, Keith William Johnson, Liang Zhang, Thanasis Loupas, Truong Huy Nguyen
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Patent number: 11967571Abstract: A semiconductor structure and a method of fabricating therefor are disclosed. A second contact pad (500) is arranged lateral to a first contact pad (420) in an interconnect structure (400). As a result, during fabrication of the interconnect structure (400), the first contact pad (420) will not be present alone in a large bland area, due to the presence of the second contact pad (500). Thus, a pattern feature for the first contact pad (420) will not be over-resolved, increasing formation accuracy of the first contact pad (420) and thus guaranteeing good electrical transmission performance of the resulting interconnect structure (400).Type: GrantFiled: March 17, 2020Date of Patent: April 23, 2024Assignee: FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.Inventors: Yi-Wang Jhan, Yung-Tai Huang, Xin You, Xiaopei Fang, Yu-Cheng Tung
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Patent number: 11967096Abstract: A depth estimation from focus method and system includes receiving input image data containing focus information, generating an intermediate attention map by an AI model, normalizing the intermediate attention map into a depth attention map via a normalization function, and deriving expected depth values for the input image data containing focus information from the depth attention map. The AI model for depth estimation can be trained unsupervisedly without ground truth depth maps. The AI model of some embodiments is a shared network estimating a depth map and reconstructing an AiF image from a set of images with different focus positions.Type: GrantFiled: February 22, 2022Date of Patent: April 23, 2024Assignee: MEDIATEK INC.Inventors: Ren Wang, Yu-Lun Liu, Yu-Hao Huang, Ning-Hsu Wang
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Publication number: 20240126374Abstract: A method for touchless gesture recognition is provided. The method includes transmitting ultrasonic signals via a speaker. The method includes generating ultrasonic signals. The method includes receiving the reflected ultrasonic signals from an object via two or more microphones. The method includes computing a frequency shift according to the reflected ultrasonic signals. The method includes identifying a gesture that corresponds to a movement of the object according to the frequency shift. The method includes performing a function that corresponds to the gesture.Type: ApplicationFiled: February 13, 2023Publication date: April 18, 2024Inventors: Yu-Xuan XU, Ching-Lung CHAN, Shih-Chung WANG, Yen-Son Paul HUANG, Shih-Chin GONG
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Patent number: 11963464Abstract: A memristor may include an exchange-coupled composite (ECC) portion to provide three or more nonvolatile magneto-resistive states. The ECC portion may include a continuous layer and a granular layer magnetically exchange coupled to the continuous layer. A plurality of memristors may be used in a system to, for example, define a neural network.Type: GrantFiled: February 22, 2021Date of Patent: April 16, 2024Assignee: Seagate Technology LLCInventors: Cheng Wang, Pin-Wei Huang, Ganping Ju, Kuo-Hsing Hwang
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Patent number: 11962742Abstract: An electronic device may include a lenticular display. The lenticular display may have a lenticular lens film formed over an array of pixels. The display may have a number of independently controllable viewing zones. Each viewing zone displays a respective two-dimensional image. Each eye of the viewer may receive a different one of the two-dimensional images, resulting in a perceived three-dimensional image. The electronic device may include display pipeline circuitry that generates and processes content to be displayed on the lenticular display. Content generating circuitry may initially generate content that includes a plurality of two-dimensional images, each two-dimensional image corresponding to a respective viewing zone. The two-dimensional images may be processed by per-view processing circuitry. Pixel mapping circuitry may be used to map the two-dimensional images to the array of pixels in the lenticular display. After pixel mapping, additional panel-level processing may be performed.Type: GrantFiled: June 15, 2021Date of Patent: April 16, 2024Assignee: Apple Inc.Inventors: Sheng Zhang, Chaohao Wang, Felipe Bacim De Araujo E Silva, Karol E. Czaradzki, Pavel V. Dudrenov, Yi-Pai Huang, Yue Ma
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Patent number: 11962099Abstract: An antenna structure and a high-frequency multi-band wireless communication terminal are provided. The antenna structure includes: a metal plate, on which a first accommodation groove is provided; an antenna unit, including a radiating patch and a first coupling piece; and a radio frequency module, where the radio frequency module is disposed on a first side of the metal plate, and the radio frequency module is electrically connected to the radiating patch; where at least one of the radiating patch and the first coupling piece is disposed inside the first accommodation groove, the radiating patch is insulated from the metal plate, the first coupling piece is insulated from the metal plate, the radiating patch and the first coupling piece are disposed opposite to each other, the radiating patch is insulated from the first coupling piece, the first coupling piece is located between the radiating patch and the radio frequency module.Type: GrantFiled: June 24, 2021Date of Patent: April 16, 2024Assignee: VIVO MOBILE COMMUNICATION CO., LTD.Inventors: Huan-Chu Huang, Yijin Wang, Xianjing Jian
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Patent number: 11955191Abstract: A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.Type: GrantFiled: June 2, 2023Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Perng-Fei Yuh, Tung-Cheng Chang, Gu-Huan Li, Chia-En Huang, Chun-Ying Lee, Yih Wang
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Patent number: 11955201Abstract: A memory device includes a plurality of arrays coupled in parallel with each other. A first array of the plurality of arrays includes a first switch and a plurality of first memory cells that are arranged in a first column, a second switch and a plurality of second memory cells that are arranged in a second column, and at least one data line coupled to the plurality of first memory cells and the plurality of second memory cells. The second switch is configured to output a data signal from the at least one data line to a sense amplifier.Type: GrantFiled: July 26, 2022Date of Patent: April 9, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Meng-Sheng Chang, Chia-En Huang, Yi-Ching Liu, Yih Wang
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Patent number: 11955370Abstract: A system and methods of forming a dielectric material within a trench are described herein. In an embodiment of the method, the method includes introducing a first precursor into a trench of a dielectric layer, such that portions of the first precursor react with the dielectric layer and attach on sidewalls of the trench. The method further includes partially etching portions of the first precursor on the sidewalls of the trench to expose upper portions of the sidewalls of the trench. The method further includes introducing a second precursor into the trench, such that portions of the second precursor react with the remaining portions of the first precursor to form the dielectric material at the bottom of the trench.Type: GrantFiled: September 18, 2020Date of Patent: April 9, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Bo-Cyuan Lu, Ting-Gang Chen, Sung-En Lin, Chunyao Wang, Yung-Cheng Lu, Chi On Chui, Tai-Chun Huang, Chieh-Ping Wang
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Patent number: 11955038Abstract: An electronic device may include a lenticular display. The lenticular display may have a lenticular lens film formed over an array of pixels. The display may have a number of independently controllable viewing zones. Each viewing zone displays a respective two-dimensional image. Each eye of the viewer may receive a different one of the two-dimensional images, resulting in a perceived three-dimensional image. The electronic device may include display pipeline circuitry that generates and processes content to be displayed on the lenticular display. Content generating circuitry may generate content that includes a plurality of two-dimensional images, each two-dimensional image corresponding to a respective viewing zone. Pixel mapping circuitry may be used to map the two-dimensional images to the array of pixels in the lenticular display. The array of pixels may have a diagonal layout. An offset map may be used by the pixel mapping circuitry to account for the diagonal layout.Type: GrantFiled: June 11, 2021Date of Patent: April 9, 2024Assignee: Apple Inc.Inventors: Sheng Zhang, Chaohao Wang, Yi-Pai Huang, Yue Ma, Ping-Yen Chou, Fu-Chung Huang
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Patent number: 11952659Abstract: Atomic layer deposition methods for coating an optical substrate with magnesium fluoride. The methods include two primary processes. The first process includes the formation of a magnesium oxide layer over a surface of a substrate. The second process includes converting the magnesium oxide layer to a magnesium fluoride layer. These two primary processes may be repeated a plurality of times to create multiple magnesium fluoride layers that make up a magnesium fluoride film. The magnesium fluoride film may serve as an antireflective coating layer for an optical substrate, such as an optical lens.Type: GrantFiled: July 28, 2020Date of Patent: April 9, 2024Assignee: Corning IncorporatedInventors: Ming-Huang Huang, Hoon Kim, Jue Wang
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Publication number: 20240112628Abstract: An electronic device may include a lenticular display. The lenticular display may have a lenticular lens film formed over an array of pixels. A plurality of lenticular lenses may extend across the length of the display. The lenticular lenses may be configured to enable stereoscopic viewing of the display such that a viewer perceives three-dimensional images. The display may have a number of independently controllable viewing zones. The viewer may be particularly susceptible to artifacts caused by crosstalk at the edge viewing zones within the primary field of view of the display. Certain types of content may also be more vulnerable to crosstalk than other types of content. Therefore, to mitigate crosstalk artifacts, the pixel value for each pixel may be adjusted based on the viewing zone of the respective pixel and content information (such as texture information or brightness information) associated with the respective pixel.Type: ApplicationFiled: December 14, 2023Publication date: April 4, 2024Inventors: Yunhui Hou, Yi-Pai Huang, Fu-Chung Huang, Sheng Zhang, Chaohao Wang, Ping-Yen Chou, Yi Huang, Juan He, Alfred B. Huergo Wagner, Seung Wook Kim
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Patent number: 11948972Abstract: The present disclosure is directed to methods for the formation of high-voltage nano-sheet transistors and low-voltage gate-all-around transistors on a common substrate. The method includes forming a fin structure with first and second nano-sheet layers on the substrate. The method also includes forming a gate structure having a first dielectric and a first gate electrode on the fin structure and removing portions of the fin structure not covered by the gate structure. The method further includes partially etching exposed surfaces of the first nano-sheet layers to form recessed portions of the first nano-sheet layers in the fin structure and forming a spacer structure on the recessed portions. In addition, the method includes replacing the first gate electrode with a second dielectric and a second gate electrode, and forming an epitaxial structure abutting the fin structure.Type: GrantFiled: June 30, 2020Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Xuan Huang, Chia-En Huang, Ching-Wei Tsai, Kuan-Lun Cheng, Yih Wang
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Publication number: 20240100175Abstract: A conjugate compounds or pharmaceutically acceptable salt thereof, comprises a payload and two or more kinds of cell-interacting molecules. The cell-interacting molecules are ligands capable of specifically binding to a cell surface receptor. A method of treating diseases, comprises delivering a payload to a subject.Type: ApplicationFiled: October 6, 2022Publication date: March 28, 2024Inventors: Baohua Robert HUANG, Jian DIA, Zhongbo WANG, Xueyuan XIE, Xiaodong LIU, Xinli HU
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Publication number: 20240102833Abstract: A DFOS system and machine learning method that automatically localizes manholes, which forms a key step in a fiber optic cable mapping process. Our system and method utilize weakly supervised learning techniques to predict manhole locations based on ambient data captured along the fiber optic cable route. To improve any non-informative ambient data, we employ data selection and label assignment strategies and verify their effectiveness extensively in a variety of settings, including data efficiency and generalizability to different fiber optic cable routes. We describe post-processing steps that bridge the gap between classification and localization and combining results from multiple predictions.Type: ApplicationFiled: September 13, 2023Publication date: March 28, 2024Applicant: NEC Laboratories America, Inc.Inventors: Shaobo HAN, Yuheng CHEN, Ming-Fang HUANG, Ting WANG, Alexander BUKHARIN
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Patent number: 11942155Abstract: A memory system includes a memory array comprising a plurality of memory cells. Each of the memory cells includes a first programming transistor, a second programming transistor, a first reading transistor coupled to the first programming transistor in series, and a second reading transistor coupled to the second programming transistor in series. The memory system includes an authentication circuit operatively coupled to the memory array. The authentication circuit is configured to generate a Physically Unclonable Function (PUF) signature based on respective logic states of the plurality of memory cells. The logic state of each of the plurality of memory cells is determined based on a preceding breakdown of either the corresponding first programming transistor or second programming transistor.Type: GrantFiled: September 30, 2021Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Meng-Sheng Chang, Chia-En Huang, Yih Wang
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Patent number: 11942177Abstract: One aspect of this description relates to a memory array. In some embodiments, the memory array includes a first memory cell coupled between a first local select line and a first local bit line, a second memory cell coupled between a second local select line and a second local bit line, a first switch coupled to a global bit line, a second switch coupled between the first local bit line and the first switch, and a third switch coupled between the second local select line and the first switch.Type: GrantFiled: January 10, 2022Date of Patent: March 26, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Chia-Ta Yu, Chia-En Huang, Sai-Hooi Yeong, Yih Wang, Yi-Ching Liu