Patents by Inventor WANG HUANG

WANG HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7479461
    Abstract: A method for etching Si anisotropically uses a solution containing NH4F and HF.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: January 20, 2009
    Assignees: Infineon Technologies AG, Nanya Technology Corporation
    Inventors: Teng-Wang Huang, Kristin Schupke
  • Patent number: 7208870
    Abstract: An organic electroluminescent panel having a silver alloy is disclosed, which has a substrate; a plurality of the first electrodes; a plurality of the second electrodes; a plurality of conducting lines containing a silver alloy; a plurality of isolating walls; and a plurality of organic electroluminescent media. The first electrodes are arranged in parallel on the substrate. The organic electroluminescent media are disposed on the first electrodes. The second electrodes are disposed on the organic electroluminescent media. The conducting lines containing the silver alloy connect to the first electrodes or the second electrodes. The silver alloy contained in the conducting lines has 80 to 99.8 mol % of silver; 0.1 to 10 mol % of copper; and 0.1 to 10 mol % of at least one transition metal selected from the group consisting of palladium (Pd), magnesium (Mg), gold (Au), platinum (Pt), and the combinations thereof.
    Type: Grant
    Filed: October 24, 2003
    Date of Patent: April 24, 2007
    Assignee: RiTdisplay Corporation
    Inventors: Yih Chang, Shang-Wei Chen, Tien Wang Huang, Tien-Rong Lu, Hsin Tzu Yao, Chih-Jen Yang
  • Patent number: 7101802
    Abstract: The invention provides a method for forming a bottle-shaped trench. A semiconductor substrate having a trench and a pad stack layer formed thereon is provided. A masking layer is then formed in the lower portion of the trench. Plasma nitridation is then performed to form a nitride layer covering the sidewalls of the trench, followed by removing the masking layer to expose the sidewalls of the trench. The lower portion of the trench is then expanded by etching to form a bottle-shaped trench.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: September 5, 2006
    Assignee: Nanya Technology Corporation
    Inventors: Chien-Jung Sun, Teng-Wang Huang, Chang-Rong Wu
  • Publication number: 20050221620
    Abstract: The invention relates to a process for etching at least one substrate, in particular at least one silicon wafer for the fabrication of DRAM memory chips. The process comprising at least one substrate, for a first etching step, is arranged for a predetermined time in a first vessel containing a first etchant, then at least one substrate, for a first rinsing step, is arranged for a predetermined time in a second vessel containing a first rinsing agent, the first rinsing agent containing at least one wetting agent, and then at least one substrate, for a second etching step, is arranged for a predetermined time in a third vessel containing a second etchant.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 6, 2005
    Inventors: Teng-Wang Huang, Kristin Schupke
  • Publication number: 20050191564
    Abstract: A method for producing a liner mask on a semiconductor structure is disclosed. The method may include providing an amorphous liner layer (55) on the top side (OS;OS?) of the semiconductor structure, annealing the amorphous liner layer (55) to increase the crystallisation and generate a semi-crystalline liner layer (55); implanting (I1) extrinsic ions in a subregion (55a) of the semi-crystalline liner layer (55) to decrease the etching rate of the subregion (55a) and create an etch selectivity between the to the subregion (55a) complementary subregion (55b) and the subregion (55a) in the predetermined etchant; and selectively removing of the to the subregion (55a) complementary subregion (55b) opposite to the subregion (55a) in a etching step in the predetermined etchant for completing the liner mask.
    Type: Application
    Filed: February 27, 2004
    Publication date: September 1, 2005
    Inventors: Teng-Wang Huang, Kristin Schupke, Hai-Han Hung
  • Publication number: 20050157465
    Abstract: An organic light-emitting panel includes a rear board, a heat spreader and a front board. In this case, the rear board has a first surface and a second surface opposite to the first surface. The heat spreader covers over the first surface and extends to the second surface. The heat spreader, which covers over the first surface of the rear board is formed with plural holes. The front board is set on the first surface and the heat spreader. The invention also discloses a manufacturing method of the panel. The method includes the steps of: fitting a rear board into a heat spreader in such a manner that the heat spreader covers over a first surface of the rear board and extends to a second surface opposite to the first surface of the rear board; and adhering a front board to the first surface of the rear board and the heat spreader.
    Type: Application
    Filed: March 2, 2005
    Publication date: July 21, 2005
    Inventors: Chin-long Wu, Sung-Yi Pai, Tien-wang Huang
  • Patent number: 6914954
    Abstract: An apparatus for serial data communication between a plurality of IC chips with a reduced number of inter-chip signal lines. In the apparatus, one IC chip acts as a master, while the other chip(s) are slaved to it. In response to conditions internal to the master chip or in response to a request from at least one of the slave chips, the master chip generates a transfer control signal and a synchronization clock signal. The transfer control signal defines a transfer phase during which data transfer among the chips can take place. The chips take turns sending and receiving data in a multiplexed fashion, with sending and receiving parties designated by a count of synchronization clock signal cycles. The synchronization clock signal is generated at a high frequency, to allow fast data transfer.
    Type: Grant
    Filed: February 11, 2002
    Date of Patent: July 5, 2005
    Assignee: United Microelectronics Corp.
    Inventors: David Lee, Cheng-Wang Huang
  • Publication number: 20050079714
    Abstract: A method for etching Si anisotropically uses a solution containing NH4F and HF.
    Type: Application
    Filed: September 17, 2004
    Publication date: April 14, 2005
    Inventors: Teng-Wang Huang, Kristin Schupke
  • Patent number: 6876148
    Abstract: An organic light-emitting panel includes a rear board, a heat spreader and a front board. In this case, the rear board has a first surface and a second surface opposite to the first surface. The heat spreader covers over the first surface and extends to the second surface. The heat spreader, which covers over the first surface of the rear board is formed with plural holes. The front board is set on the first surface and the heat spreader. The invention also discloses a manufacturing method of the panel. The method includes the steps of: fitting a rear board into a heat spreader in such a manner that the heat spreader covers over a first surface of the rear board and extends to a second surface opposite to the first surface of the rear board; and adhering a front board to the first surface of the rear board and the heat spreader.
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: April 5, 2005
    Assignee: RITdisplay Corporation
    Inventors: Chin-long Wu, Sung-Yi Pai, Tien-wang Huang
  • Patent number: 6867089
    Abstract: A method of forming a bottle-shaped trench for capacitor in a semiconductor substrate. First, the semiconductor substrate is selectively etched to form a trench, wherein the trench has a top portion and a bottom portion. Then, an oxide film is formed on the top portion of the trench. Next, a rugged polysilicon layer is formed on the bottom portion and the top portion of the trench. The rugged polysilicon layer and the semiconductor substrate are etched through the bottom portion of the trench by diluted ammonia solution as the etchant to form a bottle-shaped trench having a rugged surface. Next, the oxide film is removed.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: March 15, 2005
    Assignee: Nanya Technology Corporation
    Inventors: Yi-Nan Chen, Tung-Wang Huang, Hsin-Jung Ho, Hsien-Wen Liu
  • Patent number: 6858874
    Abstract: A package structure of an OEL panel includes a printed circuit board, at least one OEL panel, and several bumps. Wherein, the OEL panel has several poly solder interconnections arranged in an array structure. The printed circuit board has several solder pads, which are also implemented with bumps. The at least one OEL panel is disposed on the printed circuit board to have the electric connection with the printed circuit board through the poly solder interconnections and the bumps.
    Type: Grant
    Filed: June 11, 2003
    Date of Patent: February 22, 2005
    Assignee: RiTdisplay Corporation
    Inventors: Chin-Long Wu, Tung-Yang Tang, Shih-Ming Hsu, Shang-Wei Chen, Tein-Wang Huang
  • Publication number: 20050009360
    Abstract: The invention provides a method for forming a bottle-shaped trench. A semiconductor substrate having a trench and a pad stack layer formed thereon is provided. A masking layer is then formed in the lower portion of the trench. Plasma nitridation is then performed to form a nitride layer covering the sidewalls of the trench, followed by removing the masking layer to expose the sidewalls of the trench. The lower portion of the trench is then expanded by etching to form a bottle-shaped trench.
    Type: Application
    Filed: November 24, 2003
    Publication date: January 13, 2005
    Inventors: Chien-Jung Sun, Teng-Wang Huang, Chang-Rong Wu
  • Publication number: 20040263055
    Abstract: An electrode substrate of a flat panel display comprises a substrate, an electrode layer, a conductive layer, and a barrier layer. In this case, the electrode layer is disposed above the substrate. The conductive layer is disposed above the electrode layer. The material of the conductive layer comprises Silver (>99.5%), Silver alloy, Aluminum (>99.5%), Aluminum alloy, Copper (>99.5%) or Copper alloy. The barrier layer is disposed above the conductive layer. The material of the barrier layer comprises Titanium, Titanium alloy, Molybdenum, Chromium, Silicon, Silicon Oxide, or Titanium Oxide.
    Type: Application
    Filed: June 28, 2004
    Publication date: December 30, 2004
    Inventors: Chin-Hsiao Chao, Tien-Wang Huang, Yih Chang, Chin-To Chen, Wei-Cheng Lih
  • Publication number: 20040251045
    Abstract: A package structure of an OEL panel includes a printed circuit board, at least one OEL panel, and several bumps. Wherein, the OEL panel has several poly solder interconnections arranged in an array structure. The printed circuit board has several solder pads, which are also implemented with bumps. The at least one OEL panel is disposed on the printed circuit board to have the electric connection with the printed circuit board through the poly solder interconnections and the bumps.
    Type: Application
    Filed: June 11, 2003
    Publication date: December 16, 2004
    Inventors: CHIN-LONG WU, twTUNG-YANG TANG, SHIH-MING HSU, SHANG-WEI CHEN, TEIN-WANG HUANG
  • Publication number: 20040189188
    Abstract: An active matrix organic electroluminescent panel is disclosed, which comprises a substrate; a plurality of functional elements, which having at least one transistor having a drain, a source, and a gate; a plurality of organic electroluminescent devices disposed over the substrate, which comprised, in sequence, a first electrode, at least one organic electroluminescent media and a second electrode; and a plurality of conductive lines disposed over the surface of the substrate to connect the and/or organic electroluminescent devices; wherein the conductive lines comprises silver-copper alloy, which is composed of 80 to 99.8 mol % of silver, 0.1 to 10 mol % of copper, and 0.1 to 10 mol % of transition metal selected from the group consisting of palladium, magnesium, gold, platinum, and the combinations thereof, and the total mol % of the silver-copper alloy is 100.
    Type: Application
    Filed: December 24, 2003
    Publication date: September 30, 2004
    Applicant: RiTdisplay Corporation
    Inventors: Ching-Lin Fan, Tien Wang Huang, Mei-Ying Chang
  • Patent number: 6790165
    Abstract: A rehabilitation aid includes a leg sleeve, an adjusting means connected to a front side of the leg sleeve, a spring connected at an end to the adjusting means, and a foot strap connected to another end of the spring. The leg sleeve and the foot strap are designed for adjustably putting around a user's leg close to a lower part thereof and the user's sole close to the toes, respectively. The spring is adapted to generate a pulling stress suitable for the user through control of the adjusting means, so that the user's toes and ball of the foot are raised along with the user's heel via an upward angular pulling force provided by the spring to protect the user from tripping and falling during practicing walking alone.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: September 14, 2004
    Inventor: Tien-Wang Huang
  • Patent number: 6770563
    Abstract: A process of forming a bottle-shaped trench. A semiconductor substrate with a trench is provided, on which a pad layer and hard mask layer are sequentially formed. A dielectric layer is formed on the hard mask layer to fill the trench. Part of the dielectric layer is etched to expose the sidewall of the upper portion of the trench. A spacer is formed on the sidewall. The residual dielectric layer in the trench is removed, and the partial trench not covered by the spacer is etched to a bottle shape.
    Type: Grant
    Filed: January 3, 2003
    Date of Patent: August 3, 2004
    Assignee: Nanya Technology Corporation
    Inventors: Tung-Wang Huang, Chang Rong Wu, Chien-Mao Liao, Hsin-Jung Ho
  • Publication number: 20040140760
    Abstract: An organic electroluminescent panel having a silver alloy is disclosed, which has a substrate; a plurality of the first electrodes; a plurality of the second electrodes; a plurality of conducting lines containing a silver alloy; a plurality of isolating walls; and a plurality of organic electroluminescent media. The first electrodes are arranged in parallel on the substrate. The organic electroluminescent media are disposed on the first electrodes. The second electrodes are disposed on the organic electroluminescent media. The conducting lines containing the silver alloy connect to the first electrodes or the second electrodes. The silver alloy contained in the conducting lines has 80 to 99.8 mol % of silver; 0.1 to 10 mol % of copper; and 0.1 to 10 mol % of at least one transition metal selected from the group consisting of palladium (Pd), magnesium (Mg), gold (Au), platinum (Pt), and the combinations thereof.
    Type: Application
    Filed: October 24, 2003
    Publication date: July 22, 2004
    Applicant: RiTdisplay Corporation
    Inventors: Yih Chang, Shang-Wei Chen, Tien Wang Huang, Tien-Rong Lu, Hsin Tzu Yao, Chih-Jen Yang
  • Patent number: 6743728
    Abstract: A method for forming shallow trench isolation. A substrate is provided with a mask layer formed thereon. The mask layer is etched to expose a portion of the substrate, and the portion of the substrate is etched to form a trench. A liner layer is formed on the inside wall of the trench. A first dielectric layer and a sacrificial layer are sequentially deposited on the substrate such that the trench is substantially filled, wherein the first dielectric layer is formed by high density plasma chemical vapor deposition (HDPCVD). Portions of the first dielectric layer and the sacrificial layer are removed from the trench. A second dielectric layer is deposited on the substrate such that the trench is substantially filled, wherein the second dielectric layer is formed by high density plasma chemical vapor deposition (HDPCVD). A portion of the second dielectric layer is removed from the trench.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: June 1, 2004
    Assignee: Nanya Technology Corporation
    Inventors: Tzu En Ho, Chang Rong Wu, Tung-Wang Huang, Shing-Yih Shih
  • Publication number: 20040058549
    Abstract: A method for forming shallow trench isolation. A substrate is provided with a mask layer formed thereon. The mask layer is etched to expose a portion of the substrate, and the portion of the substrate is etched to form a trench. A liner layer is formed on the inside wall of the trench. A first dielectric layer and a sacrificial layer are sequentially deposited on the substrate such that the trench is substantially filled, wherein the first dielectric layer is formed by high density plasma chemical vapor deposition (HDPCVD). Portions of the first dielectric layer and the sacrificial layer are removed from the trench. A second dielectric layer is deposited on the substrate such that the trench is substantially filled, wherein the second dielectric layer is formed by high density plasma chemical vapor deposition (HDPCVD). A portion of the second dielectric layer is removed from the trench.
    Type: Application
    Filed: December 17, 2002
    Publication date: March 25, 2004
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Tzu En Ho, Chang Rong Wu, Tung-Wang Huang, Shing-Yih Shih