Abstract: A termination circuit for a plurality of memories controlled by a controller is provided. The termination circuit includes a plurality of drivers, a plurality of resistors and a plurality of capacitors. Each of the drivers is coupled to the memories via a transmission line. Each of the resistors is coupled to the corresponding driver via the corresponding transmission line. Each of the capacitors is coupled between the corresponding resistor and a reference voltage. The controller is coupled to the memories via the drivers, and the controller provides a specific code to one of the drivers when a quantity of logic “0” and a quantity of logic “1” transmitted to the memories via the transmission line corresponding to the one of the drivers are unbalanced, so as to adjust a termination voltage of the capacitor corresponding to the one of the drivers.

Abstract: The present invention provides a method and device for position detection. For detection of a touch position, a segment of surface acoustic wave (SAW) is provided multiple times to be propagated on a SAW touch panel, and the multiple SAW segments are received by the SAW touch panel. In addition, during or after reception, partial output electrical signals are provided based on different portions of each received SAW segment to construct a complete output electrical signal.

Abstract: A mask, a pattern disposing method thereof and an exposing method thereof are provided. A plurality of geometric patterns are arranged on the mask along a plurality of columns. The arrangement of the patterns arranged along odd columns is similar to that of the patterns arranged along even columns. Two odd columns or two even columns are selected to be a first edge column and a second edge column respectively. At each corresponding position of the first edge column and the second edge column, only one of the first edge column and the second edge column is selected to be disposed one geometric pattern.

Abstract: A preparation method of a battery composite material includes steps of providing phosphoric acid, iron powder, a carbon source and a first reactant, processing a reaction of the phosphoric acid and the iron powder to produce a first product, calcining the first product to produce a precursor, among which the formula of the precursor is written by Fe7(PO4)6, and processing a reaction of the precursor, the carbon source and the first reactant to get a reaction mixture and calcining the reaction mixture to produce the battery composite material. As a result, the present invention achieves the advantages of reducing grind time of fabricating processes, so that the prime cost, the time cost, and the difficulty of fabricating are reduced.

Abstract: A backlight module includes a light guide plate, at least one light source, and a reflective plate. The light source is configured for emitting light toward the light guide plate. The reflective plate has a plurality of reflective units arranging along a curved direction. Each of the reflective units includes a body and a plurality of microstructures. The body has a main surface facing the light guide plate. The plurality of microstructures are disposed on the main surface of the body. Each of the microstructures has a reflective surface. A first angle is included between the reflective surface of each of the microstructures and the main surface of the body. The first angles of the microstructures in one reflective unit are different from the first angles of the microstructures in an adjacent reflective unit.

Abstract: A cathode material with oxygen vacancy is provided. The cathode material includes a lithium metal phosphate compound having a general formula LiMPO4-z, wherein M represents at least one of a first-row transition metal, and 0.001?z?0.05.

Abstract: A semiconductor manufacturing process includes the following steps of providing a silicon substrate having at least one connection pad and a protection layer, forming a first seed layer having at least one first section and at least one second section, forming a first photoresist layer, forming a first buffer layer having a coupling portion and a cladding portion, removing the first photoresist layer, removing the second section of the first seed layer to form a first under bump metallurgy layer, forming a support layer on the protection layer and the first buffer layer, the first under bump metallurgy layer has a first ring wall, the first buffer layer has a second ring wall, wherein the first ring wall, the second ring wall and the cladding portion are cladded by the support layer, and forming a connection portion and covering the coupling portion with the connection portion.

Abstract: A semiconductor manufacturing process includes the following steps of providing a silicon substrate having at least one connection pad and a protection layer, forming a first seed layer having at least one first section and at least one second section, forming a first photoresist layer, forming a first buffer layer having a coupling portion and a cladding portion, removing the first photoresist layer, removing the second section of the first seed layer to form a first under bump metallurgy layer, forming a support layer on the protection layer and the first buffer layer, the first under bump metallurgy layer has a first ring wall, the first buffer layer has a second ring wall, wherein the first ring wall, the second ring wall and the cladding portion are cladded by the support layer, and forming a connection portion and covering the coupling portion with the connection portion.

Abstract: A method of forming a semiconductor device is disclosed. Provided is a substrate having at least one MOS device, at least one metal interconnection and at least one MOS device formed on a first surface thereof. A first anisotropic etching process is performed to remove a portion of the substrate from a second surface of the substrate and thereby form a plurality of vias in the substrate, wherein the second surface is opposite to the first surface. A second anisotropic etching process is performed to remove another portion of the substrate from the second surface of the substrate and thereby form a cavity in the substrate, wherein the remaining vias are located below the cavity. An isotropic etching process is performed to the cavity and the remaining vias.

Abstract: The present invention relates to a semiconductor structure having an integrated passive network and a method for making the same. The semiconductor structure includes a substrate which can be an interposer. The substrate can include a plurality of conductive vias. In various embodiments, the substrate includes a dielectric layer disposed thereon, the dielectric layer having an opening forming a straight hole allowing electrical connection between the passive network and the conductive via. The passive network includes a series of patterned dielectric and conductive layers, forming passive electronic components. In an embodiment, the passive device includes a common resistor coupled to a pair of inductors, each of the inductors coupled to a capacitor. In another embodiment, the passive device includes a resistor and an inductor electrically connected to each other, a bottom surface of the inductor coplanar with a bottom surface of the resistor.

Abstract: A structure comprises a p-type substrate, a deep n-type well and a deep p-type well. The deep n-type well is adjacent to the p-type substrate and has a first conductive path to a first terminal. The deep p-type well is in the deep n-type well, is separated from the p-type substrate by the deep n-type well, and has a second conductive path to a second terminal. A first n-type well is over the deep p-type well. A first p-type well is over the deep p-type well.

Abstract: An accessory suitable for an electronic device is provided. The electronic device has a display area. The accessory includes a coupling portion and a cover portion. The coupling portion is suitable to be coupled to the electronic device. The cover portion is connected to the coupling portion and is suitable for covering the display area of the electronic device. The cover portion has a plurality of light-transmitting areas, and the light-transmitting areas are arranged on the display area in an array. An image generated by the display area is projected out of the cover portion through the light-transmitting areas. Moreover, an electronic assembly containing the electronic device and the accessory is also provided. Furthermore, a control method is also provided for controlling the electronic assembly. A method is also provided for forming an accessory.

Abstract: The disclosure provides a composition for gravure offset printing, including 7-92 parts by weight of a functional material, 1-76 parts by weight of a polymer, 4-13 parts by weight of a solvent, and 1-2.5 parts by weight of an additive, wherein a surface tension of the composition is between 20-40 mN/m. The disclosure further provides a gravure offset printing process, including providing a template containing a gravure pattern, filling the composition in the gravure pattern of the template, transferring the composition from the template onto a blanket, and transferring the composition from the blanket to a substrate, wherein a transfer ratio of the composition from the blanket to the substrate is above 80%.

Abstract: A measuring method of touch sensitive area size of a SAW sensor module is provided. The SAW sensor module comprises a substrate configured for propagating SAW, a first transmitter and a first receiver corresponding to a first axis, a second transmitter and a second receiver corresponding to a second axis. The SAWs emitted by the first transmitter at least pass through a first initial distance xi, propagate through a second axis length y after reflected by a first SAW reflecting bar, and enter the first receiver after reflected by a second SAW reflecting bar. The SAWs emitted by the second transmitter at least pass through a second initial distance yi, propagate through a first axis length x after reflected by a third SAW reflecting bar, and enter the second receiver after reflected by a fourth SAW reflecting bar.

Abstract: A semiconductor manufacturing process includes the following steps of providing a silicon substrate having at least one connection pad and a protection layer, forming a first seed layer having at least one first section and at least one second section, forming a first photoresist layer, forming a first buffer layer having a coupling portion and a cladding portion, removing the first photoresist layer, removing the second section of the first seed layer to form a first under bump metallurgy layer, forming a support layer on the protection layer and the first buffer layer, the first under bump metallurgy layer has a first ring wall, the first buffer layer has a second ring wall, wherein the first ring wall, the second ring wall and the cladding portion are cladded by the support layer, and forming a connection portion and covering the coupling portion with the connection portion.

Abstract: A circular polarization antenna includes a substrate, a ground plane, a tuning stub, a feeding element, and a cavity structure. The substrate has a first surface and a second surface. The feeding element is disposed on the first surface of the substrate. The ground plane is disposed on the second surface of the substrate and has a hole. The tuning stub is disposed on the second surface of the substrate and connected to the edge of the hole. The cavity structure is connected to the ground plane and configured to reflect an electromagnetic wave.

Abstract: In a method for fabricating a self-aligned vertical comb drive structure, a multi-layer structure is first formed. The multi-layer structure includes inter-digitated first and second comb structures formed via etching using a first mask layer as a mask. The first comb structure includes a plurality of first comb fingers, each having a first finger portion formed in a first device layer and a second finger portion formed in a second device layer and separated from the first finger portion by a self-aligned pattern on a stop layer. The second comb structure includes a plurality of second comb fingers formed solely in the second device layer. The second finger portions of the first comb fingers are subsequently removed.

Abstract: A method for performing a static wear leveling on a flash memory is disclosed. Accordingly, a static wear leveling unit is disposed with a block reclamation unit of either a flash translation layer or a native file system in the flash memory, and utilizes less memory space to trace a distribution status of block leveling cycles of each physical block of the flash memory. Based on the distribution record of the block leveling cycles, the number of the leveling cycles less than a premeditated threshold would be found while the system idles. Then the static wear leveling unit requests the block reclamation unit to level the found blocks. Before leveling the found block, the rarely updated data is compelled to move from one block to another block which is leveled frequently, whereby accurate wear leveling cycles for the blocks can be averaged extremely.

Abstract: A wideband antenna includes a first substrate, a second substrate, a ground plane, an exciting element, a connection element, a first branch, a second branch, and a coupling branch. The ground plane is disposed on the first substrate. The exciting element is disposed on the second substrate and has a feed point coupled to a signal source. The connection element is disposed on the second substrate and coupled to the ground plane. The first branch is disposed on the second substrate and coupled to the connection element. The second branch is disposed on the second substrate and coupled to the connection element. The coupling element is disposed on the second substrate and coupled to the connection element. The distance between the coupling element and the second branch is smaller than 5 mm.

Abstract: This present invention discloses a detachable probe cover for an ear thermometer and a manufacturing method thereof. The detachable probe cover for the ear thermometer is for being mounted onto a measuring probe of the ear thermometer, wherein a combining mechanism is provided at a bottom of the measuring probe and the detachable probe cover comprises a main body of a hollow structure and a base, in which the main body has an open end and a closed end opposite to the open end, and the hollow structure has a diameter gradually reducing from the open end toward the closed end.