Abstract: A method of facilitating reliably accessing flash memory is provided. During the write-in process, the present invention utilizes the steps of coding write-in data to generate extra data, and then generating the first error correction code by performing an error-correcting operation on the write-in data and the extra data. Finally, store the N write-in data and the generated K extra data into the data area and the first ECC into the spare area. During read process, the present invention utilizes the steps of reading data from the data area of the target flash-memory page to generate the second ECC, counting with the counter a number of bit differences between the first ECC and the second ECC, and selecting M data from the N write-in data and the K extra data as decoding factors to retrieve the N write-in data. The higher the counter values, the lower the likelihood the corresponding bit is selected to be retrieved.

Abstract: A cache device comprises a hard disk, cache control unit and at least one flash memory, whereby the cache control unit controlling and regulating the flash memory as the hard disk cache device. The present invention method is defined by setting up a management table to manage each corresponding logical block address of the flash memory through a cache data read-out step and cache data write-in step in order to manage the cache read or write action of the flash memory on the hard disk. In addition, the step of recycling a cache space and replacing cache temporary data storage is to remove and replace temporary cache and storage space within the flash memory on the hard disk. Moreover, the step of reconstruction management table is provided to reconstruct management table loss or damage caused by power outage or irregular shut-down of the computer and will be able to provide flash memory on the hard disk cache control.

Abstract: A management method for reducing the utilization rate of random access memory (RAM) while reading data from or writing data to the flash memory is disclosed. A physical memory set is constructed from a plurality of physical memory blocks in the flash memory. A logical set is constructed from a plurality of logical blocks wherein the data stored in the logical set are stored in the physical memory set. Further, the data stored in each of the logical blocks are stored in one number of physical memory blocks. A mapping table is constructed and includes a hash function, a logical set table, a physical memory set table, and a set status table for managing the relationship among the physical memory sets, physical memory blocks, and logical blocks while reading data from or writing data to the flash memory.

Abstract: A method for detecting the data strobe signal from a Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM). The method executes a data reading process at first and records the latency period of the data read process to be a basis for detecting the arrival timing of the preamble in the data strobe signals in the subsequent data reading process.

Abstract: A power amplifier with an active bias circuit and operating method thereof are provided. The power amplifier comprises a power amplifier transistor and an active bias circuit. The active circuit receives input power and applies a bias voltage to the gate of the power amplifier transistor. The bias voltage will increase in correspondence with an increase in the input power. Therefore, the power amplifier of this invention has excellent output power, linearity of operation and power-added efficiency in a range of input power.

Abstract: A non-volatile memory cell having a local silicon nitride layer to control dispersion of hot electrons is disclosed. The dual-bit non-volatile memory cell has a stack of layers including silicon on the surface of a substrate. The stack of layers has at least one first oxide silicon layer and a silicon nitride layer overlying the first oxide silicon layer. An opening is formed in the stack of layers and a gate oxide layer is deposited on the surface of the substrate within the opening. A control gate is formed on the gate oxide layer followed by a second oxide silicon layer overlying the surfaces of the control gate and the stack of layers. A second polysilicon layer is formed overlying the gate oxide layer. Dual split-gates are then formed on the second polysilicon layer.

Abstract: The present invention relates to an electric medical thermometer for measuring temperature of patients in cavity. The electric medical thermometer comprises a temperature detecting set, including a temperature detecting element, for capturing temperature signals and a temperature calculating device for temperature signals processing. By combining a primary sampling frequency with a secondary sampling frequency, where the primary sampling frequency is greater than the secondary sampling frequency, the temperature calculating device translates temperature signals captured from the temperature detecting device into a temperature measurement. The underlining method of the present invention is realized by imitating the physiology of the heart beat pulse, which serves as a resource engine of thermal compensation and as an example for the sampling frequency in order to attain more precise and reliable temperature measurement.

Abstract: A biosensor for monitoring an analyte content with a partial voltage generated therefrom is provided. The present biosensor includes a chip having a resistance Rs, a power source, and a microprocessor. The power source is used for supplying an applied voltage on the chip. The chip generates a time-dependent response current in response to a content of an analyte of a specimen applied thereon upon supplying the applied voltage on the chip. The microprocessor receives a time-dependent partial voltage caused from the chip due to the time-dependent response current, and determines the content of the analyte in accordance with the time-dependent partial voltage. The present biosensor is provided with fewer elements than a conventional one. A purpose of cost down is thus obtained.

Abstract: An apparatus and a method for detecting position, and a touch panel using the same are provided. The apparatus for detecting position includes a frame, a plurality of first signal sources, a plurality of first signal receivers, a plurality of second signal sources, a plurality of second signal receivers, and a processor. The frame is comprised of a first portion, a second portion, a third portion, and a fourth portion. The plurality of first signal sources are disposed along the first and the second portions to emit the signals configured to detect a coordinate in a first direction. The plurality of first signal receivers are disposed along the third and the fourth portions, corresponding to the plurality of first signal sources, to receive the signals from the plurality of first signal sources respectively. The plurality of second signal sources are disposed along the first and the fourth portions to emit the signals configured to detect a coordinate in a second direction.

Abstract: Automobile and motorcycle are not electrically stable during ignition process. This invention uses a simple delaying technique to allow delaying of the timing of secondary power supply for a prescribed time after crossing the unstable period of engine ignition period. In other words, delaying of supplying power could effectively increase the stability and safety of electrical equipment and prolong the usable life time of the electrical equipment.

Abstract: A conducting structure and an electronic clinical thermometer, wherein the conducting structure is provided on the measuring end of the clinical thermometer, and the measuring end has a recess, a temperature sensor and conducting wires fitted in the recess, and a contact member having a curved top and made of metallic conductive material and having a predetermined length embedded in the recess thereby providing the contact member with a large temperature sensing contact area but only with a small portion protruded out of the measuring end, and therefore enabling the thermometer to be fully in contact with a certain portion of the human body such as the armpit, preventing the thermometer from being broken, and achieving heat balance rapidly. The measuring end of the thermometer may be bent at a predetermined angle or the contact member may be arranged at either side of the measuring end as required.

Abstract: An apparatus for improving the data access reliability of flash memory is provided, including an instruction register, an address register, a flash memory control circuit, a data register, an encoder, an error correction code (ECC) generator, a signal converter, a comparator, an arbitrator, and a decoder. The instruction register and the address register are connected to a flash memory respectively for storing the access instructions and the addresses. The flash memory control circuit is connected to both instruction register and address register for controlling the access to the flash memory. The data register is connected to flash memory control circuit for loading data to be written to the flash memory. The encoder encodes the written data, and the ECC generator generates an ECC, which is written to the flash memory through the signal converter. The comparator and the arbitrator provide the comparison with ECC and informing decoder f suspicious bit values when data is read from the flash memory.

Abstract: A structure of an electronic thermometer which mainly includes a body portion, a temperature sensing head and a core. The core includes a temperature display screen, a printed circuit board provided with an electrical contact, and a conductor fixing rod arranged adjacent to the core. The conductor fixing rod is a flexible member on which is mounted a conductor against the electrical contact. The conductor fixing rod has an end fixed mounted on the core and another end of the conductor is free. A pushbutton switch is mounted on a rear end of the body portion. The pushbutton switch is arranged against a longitudinal end of the conductor fixing rod and can get in touch with and can be depressed to exert force on the conductor fixing rod in a direction along a length of the body portion or in an acute angle with respect to the length of the body portion.

Abstract: A core stopping structure for an electronic clinical thermometer comprising a stopper protruded out of an inner wall of a thermometer body, a stopping member provided on a core and configured to block relative movement of the stopper, whereby when the core is pulled out of the thermometer for a predetermined length, the stopper will block the stopping member thereby preventing the core from further moving out of the thermometer body and therefore preventing the conductive wire connected with the core from breaking.

Abstract: A method for detecting the data strobe signal from a Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM). The method executes a data reading process at first and records the latency period of the data read process to be a basis for detecting the arrival timing of the preamble in the data strobe signals in the subsequent data reading process.

Abstract: A backlight module for use in a planar display panel is disclosed. The backlight module comprises a lamp tube set, a light guide plate and a positioning body. The lamp tube set comprises a lamp housing and at least a lamp tube. An optical film is disposed on the light guide plate. The light guide plate has a side for insetting the light guide plate into the lamp tube set. Furthermore, the positioning body is disposed on an inner wall of the lamp housing and comprises at least a flange against the side. The light guide plate is positioned to contact the positioning body so as to form gaps between the at least a lamp tube and the light guide plate or between the optical film and the lamp housing.

Abstract: A method for detecting the data strobe signal from a Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM). The method executes a data reading process at first and records the latency period of the data read process to be a basis for detecting the arrival timing of the preamble in the data strobe signals in the subsequent data reading process.

Abstract: A system and a method for configuration and management of flash memory is provided, including a flash memory, a virtual memory region, and a memory logical block region. The flash memory includes a plurality of physical erase units. Each physical erase unit is configured to include at least a consecutive segment, and each segment is configured to include at least a consecutive frame. Each frame is configured to include at least a consecutive page. Each virtual memory region is configured to include a plurality of areas, and each area is configured to include at least a virtual erase unit. The memory logical block region is configured to include a plurality of clusters, and each cluster includes at least a consecutive memory logical block.

Abstract: A highly efficient data characteristic identification method for flash memory is provided, including the steps of: (a) based on the LBA corresponding to the write request to the flash memory, finding K corresponding counters in the hash table through K hash functions; (b) determining whether to perform decay period computation on hash table; if so, proceeding to step (c); otherwise, proceeding to step (d); (c) performing decay period computation on the hash table; (d) performing state update computation on the hash table; and (e) checking the hash table state and determining whether the data in the logic block corresponding to the flash memory is frequently updated. The method contains the decay period computation, state update computation, and checking on the data in the corresponding counters in the hash table to determine whether the data is frequently updated. Therefore, the object of a highly efficient data access characteristic identification method for flash memory is provided.

Abstract: A method for detecting the data strobe signal from a Double Data Rate (DDR) Synchronous Dynamic Random Access Memory (SDRAM). The method executes a data reading process at first and records the latency period of the data read process to be a basis for detecting the arrival timing of the preamble in the data strobe signals in the subsequent data reading process.