Patents by Inventor Wei Che

Wei Che has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220021157
    Abstract: A connector includes an insulative housing and a circuit board. The insulative housing comprises a housing body, an insertion plate, two side walls and a stopping wall. The housing body has a front end surface, the insertion plate is positioned at a top side of the housing body and protrudes from the front end surface, the two side walls are respectively positioned at a left side and a right side of the housing body and protrudes from the front end surface. The housing body, the insertion plate and the two side walls together form a receiving space. The stopping wall is positioned at a side of the insulating housing opposite to the insertion plate and has a stopping end positioned in front of the front end surface. The circuit board is provided to the housing body and partially protrudes into the receiving space. The stopping end of the stopping wall is stopped by the mating connector, it can prevent the user from improperly inserting the connector in an upside down orientation into the mating connector.
    Type: Application
    Filed: July 15, 2021
    Publication date: January 20, 2022
    Applicant: Molex, LLC
    Inventor: Wei-Che SUN
  • Publication number: 20210398985
    Abstract: A semiconductor structure includes a semiconductor substrate and an isolation structure disposed in the semiconductor substrate. The isolation structure includes a lining layer disposed along a boundary between the semiconductor substrate and the isolation structure, a first oxide fill layer disposed over the lining layer, a dielectric barrier structure surrounding the first oxide fill layer in a closed loop, and a second oxide fill layer disposed over the dielectric barrier structure and adjacent to the lining layer.
    Type: Application
    Filed: June 7, 2021
    Publication date: December 23, 2021
    Inventors: Wei-Che CHANG, Kai JEN, Yu-Po WANG
  • Patent number: 11197645
    Abstract: A system and method of throat abnormal object recognition is disclosed. The system includes a throat abnormal object recognition device, a data source device, a display device, and an operation device connected to the throat abnormal object recognition device, the data source device, and the display device. The method includes the throat abnormal object recognition device generating operation parameters, the data source device generating an original X-ray image data, the throat abnormal object recognition device reading the original X-ray image data, performing a pre-stage process on the original X-ray image data to generate a pre-stage processed image data, performing a comparison process on the pre-stage processed image data to generate a comparison processed image data with an abnormal object image, employing a frame mark to mark the abnormal object image as a mark X-ray image, and employing the display device to display the mark X-ray image.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: December 14, 2021
    Assignees: Kaohsiung Chang Gung Memorial Hospital
    Inventors: Wei-Che Lin, Yueh-Sheng Chen, Sheng-Dean Luo, Jian-Feng Lin, You-Nan Chen
  • Publication number: 20210376074
    Abstract: Provided is a semiconductor isolation structure including: a substrate having a first trench in a first region of the substrate and a second trench in a second region of the substrate; a filling layer is located in the first trench and the second trench; a liner layer on the sidewalls and bottom of the first trench and the second trench; a fixed negative charge layer is located between the filling layer and the liner layer in the first trench and the second trench ; and a fixed positive charge layer located between the fixed negative charge layer and the liner layer in the first trench. The liner layer, the fixed positive charge layer, the fixed negative charge layer and the filling layer in the first trench form a first isolation structure. The liner layer, the fixed negative charge layer and the filling layer in the second trench form a second isolation structure.
    Type: Application
    Filed: May 28, 2020
    Publication date: December 2, 2021
    Applicant: Winbond Electronics Corp.
    Inventors: Yoshinori Tanaka, Wei-Che Chang
  • Publication number: 20210371618
    Abstract: A graphene dispersion includes a graphene and a polyol compound selected from the group consisting of an aromatic polyol represented by Formula (I), and a modified aromatic polyol made by subjecting the aromatic polyol represented by Formula (I) and an epoxidized vegetable oil to a ring opening reaction, wherein p and q are independently integers ranging from 1 to 20. A method for preparing the graphene dispersion, a composition for preparing a polyurethane composite material, and a polyurethane composite material made from the composition are also disclosed.
    Type: Application
    Filed: February 26, 2021
    Publication date: December 2, 2021
    Inventors: Yu-Chun Wu, Wei-Che Hung, Chun-Chieh Chien
  • Publication number: 20210368785
    Abstract: A dispersion includes a zinc oxide component, and an aromatic polyol which is represented by Formula (I) and which has terminal hydroxyl groups that form chelating bonds with zinc atoms of the zinc oxide component, wherein p and q are independently integers ranging from 1 to 40. A method for preparing the dispersion includes heating a composition including the aromatic polyol and a zinc-containing salt, so that the zinc-containing salt undergoes nucleophilic reaction and condensation reaction to form the zinc oxide component. A composition for preparing the dispersion is also disclosed.
    Type: Application
    Filed: January 12, 2021
    Publication date: December 2, 2021
    Inventors: Li-Tzu Ting, Yu-Chun Wu, Wei-Che Hung
  • Publication number: 20210371899
    Abstract: This disclosure provides a method and a kit for pesticide detection. By expressing acetylcholinesterases on cell surface, rapid pesticide screening, identification and quantification of pesticides or insecticides may be achieved.
    Type: Application
    Filed: October 17, 2019
    Publication date: December 2, 2021
    Applicant: ACADEMIA SINICA
    Inventors: Yu-Chan CHAO, Lin-Li LIAO, Chuan-yu LIAO, Chih-Hsuan TSAI, Paul Wei-che HSU
  • Publication number: 20210373430
    Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes a base material made of one or more of a Cr based material, an Ir based material, a Pt based material, or Co based material, and further contains one or more additional elements selected from the group consisting of Si, B, Ge, Al, As, Sb, Te, Se and Bi.
    Type: Application
    Filed: November 24, 2020
    Publication date: December 2, 2021
    Inventors: Hung-Yi TSAI, Wei-Che HSIEH, Ta-Cheng LIEN, Hsin-Chang LEE, Ping-Hsun LIN, Hao-Ping CHENG, Ming-Wei CHEN, Szu-Ping TSAI
  • Patent number: 11183499
    Abstract: A dynamic random access memory (DRAM) and methods of manufacturing, writing and reading the same. The DRAM includes a substrate, a bit line, a sidewall structure and an interconnection structure. The bit line is disposed on the substrate. The sidewall structure is disposed on a sidewall of the bit line. The sidewall structure includes a first insulation layer, a second insulation layer, and a shield conductor layer. The first insulation layer is disposed on the sidewall of the bit line. The second insulation layer is disposed on the first insulation layer. The shield conductor layer is disposed between the first insulation layer and the second insulation layer. The interconnection structure is electrically connected to the shield conductor layer. The DRAM and the manufacturing, writing and reading methods thereof can effectively reduce the parasitic capacitance of the bit line.
    Type: Grant
    Filed: November 21, 2018
    Date of Patent: November 23, 2021
    Assignee: Winbond Electronics Corp.
    Inventors: Yoshinori Tanaka, Wei-Che Chang, Kai Jen
  • Publication number: 20210333717
    Abstract: A method of fabricating a mask is provided. The method includes providing a hard mask layer disposed on top of absorber, a capping layer, and a multilayer that are disposed on a substrate. The method includes forming a middle layer over the hard mask layer, forming a photo resist layer over the middle layer, patterning the photo resist layer, etching the middle layer through the patterned photo resist layer, etching the hard mask layer through the patterned middle layer, and etching the absorber through the patterned hard mask layer. In some embodiments, etching the hard mask layer through the patterned middle layer includes a dry-etching process that has a first removal rate of the hard mask layer and a second removal rate of the middle layer, and a ratio of the first removal rate of the hard mask layer to the second removal rate of the middle layer is greater than 5.
    Type: Application
    Filed: October 30, 2020
    Publication date: October 28, 2021
    Inventors: Wei-Che HSIEH, Tzu-Yi WANG, Ping-Hsun LIN, Ta-Cheng LIEN, Hsin-Chang LEE, Huan-Ling LEE
  • Patent number: 11152305
    Abstract: Provided is a semiconductor device including a dielectric layer, a first via, a second via, a first barrier layer, and a second barrier layer. The dielectric layer has a first region and a second region. The first via is disposed in the dielectric layer in the first region. The second via is disposed in the dielectric layer in the second region. The first barrier layer lines a sidewall and a bottom surface of the first via. The second barrier layer lines a sidewall and a bottom surface of the second via. The first and second barrier layers each has an upper portion and a lower portion. The upper portion has a nitrogen doping concentration greater than a nitrogen doping concentration of the lower portion. A method of manufacturing a semiconductor device is also provided.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: October 19, 2021
    Assignee: Winbond Electronics Corp.
    Inventor: Wei-Che Hong
  • Publication number: 20210230680
    Abstract: Described herein are divalent nucleobases that each binds two nucleic acid strands, matched or mismatched when incorporated into a nucleic acid or nucleic acid analog backbone, such as in a ?-peptide nucleic acid (?PNA). Also provided are genetic recognition reagents comprising one or more of the divalent nucleobases and a nucleic acid or nucleic acid analog backbone, such as a ?PNA backbone. Uses for the divalent nucleobases and monomers and genetic recognition reagents containing the divalent nucleobases also are provided.
    Type: Application
    Filed: June 7, 2019
    Publication date: July 29, 2021
    Inventors: Danith H. Ly, Shivaji A. Thadke, Ashif Y. Shaikh, Wei-Che Hsieh, Ali Nakhi, J. Dinithi Perera
  • Publication number: 20210233365
    Abstract: A method of generating a graphical user interface for horse race betting includes displaying a first list of horses scheduled to run a first race from among a plurality of horses, displaying, in association with each horse of the first list of horses, a win selection element by which a user of the graphical user interface may mark the horse as selected to win the first race, displaying an automatic ticket generation button by which a user may request an automatic selection of horses, and, in response to a user interaction with the automatic ticket generation button, marking one or more horses of the first list of horses as selected to win the first race based on predicted win percentages of the horses of the first list. The method may include displaying, in association with each horse of the first list of horses, the predicted win percentage of the horse.
    Type: Application
    Filed: April 12, 2021
    Publication date: July 29, 2021
    Inventors: Scott McKeever, Wei-Che Tseng, Michael Maiorana
  • Patent number: 11057248
    Abstract: A baseband system includes: an estimation and compensation circuit estimating frequency-independent non-ideal effects based on an original IQ signal pair, and compensating the original IQ signal pair based on a result of the estimation to obtain a compensated IQ signal pair; a channel estimation and equalization circuit performing channel estimation and equalization based on the compensated IQ signal pair to obtain an equalized IQ signal pair; and a tracking and compensation circuit obtaining a result of tracking of residual quantities of the aforesaid non-ideal effects based on the equalized IQ signal pair, and compensating the equalized IQ signal pair based on the result of the tracking to obtain an output IQ signal pair.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: July 6, 2021
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Zheng-Chun Huang, Wei-Che Lee, Hung-Chih Liu, Chih-Wei Jen, Shyh-Jye Jou, Yu-Hwai Tseng
  • Patent number: 11038740
    Abstract: A communication system includes a baseband circuit, a transmitting end circuit, and a receiving end circuit is disclosed. The transmitting end circuit includes a digital analog conversion circuit and a transmitting end filtering circuit. The receiving end circuit includes a receiving end amplifying circuit, a receiving end filtering circuit, and an analog digital conversion circuit. A first data signal is transmitted to the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a first compensation parameter. A second data signal is transmitted to the receiving end filtering circuit, the receiving end amplifying circuit and the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a second compensation parameter.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: June 15, 2021
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Zheng-Chun Huang, Wei-Che Lee, Hung-Chih Liu, Chih-Wei Jen, Shyh-Jye Jou, Yu-Hwai Tseng
  • Patent number: 11004310
    Abstract: A method of generating a graphical user interface for horse race betting includes displaying a first list of horses scheduled to run a first race from among a plurality of horses, displaying, in association with each horse of the first list of horses, a win selection element by which a user of the graphical user interface may mark the horse as selected to win the first race, displaying an automatic ticket generation button by which a user may request an automatic selection of horses, and, in response to a user interaction with the automatic ticket generation button, marking one or more horses of the first list of horses as selected to win the first race based on predicted win percentages of the horses of the first list. The method may include displaying, in association with each horse of the first list of horses, the predicted win percentage of the horse.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: May 11, 2021
    Assignee: EquinEdge, LLC
    Inventors: Scott McKeever, Wei-Che Tseng, Michael Maiorana
  • Publication number: 20210119851
    Abstract: A communication system includes a baseband circuit, a transmitting end circuit, and a receiving end circuit is disclosed. The transmitting end circuit includes a digital analog conversion circuit and a transmitting end filtering circuit. The receiving end circuit includes a receiving end amplifying circuit, a receiving end filtering circuit, and an analog digital conversion circuit. A first data signal is transmitted to the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a first compensation parameter. A second data signal is transmitted to the receiving end filtering circuit, the receiving end amplifying circuit and the analog digital conversion circuit through the digital analog conversion circuit and the transmitting end filtering circuit, so that the baseband circuit obtains a second compensation parameter.
    Type: Application
    Filed: October 15, 2020
    Publication date: April 22, 2021
    Inventors: Zheng-Chun HUANG, Wei-Che LEE, Hung-Chih LIU, Chih-Wei JEN, Shyh-Jye JOU, Yu-Hwai TSENG
  • Publication number: 20210119837
    Abstract: A baseband system includes: an estimation and compensation circuit estimating frequency-independent non-ideal effects based on an original IQ signal pair, and compensating the original IQ signal pair based on a result of the estimation to obtain a compensated IQ signal pair; a channel estimation and equalization circuit performing channel estimation and equalization based on the compensated IQ signal pair to obtain an equalized IQ signal pair; and a tracking and compensation circuit obtaining a result of tracking of residual quantities of the aforesaid non-ideal effects based on the equalized IQ signal pair, and compensating the equalized IQ signal pair based on the result of the tracking to obtain an output IQ signal pair.
    Type: Application
    Filed: June 8, 2020
    Publication date: April 22, 2021
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Zheng-Chun HUANG, Wei-Che LEE, Hung-Chih LIU, Chih-Wei JEN, Shyh-Jye JOU, Yu-Hwai TSENG
  • Publication number: 20210111310
    Abstract: A light emitting chip and associated package structure are provided. The light emitting chip includes a substrate, a first type layer, an active layer, a second type layer, a first type electrode and a second type electrode. A second portion of the first type layer is located over the substrate. A first portion of the first type layer is located over the second portion of the first type layer. The active layer is located over the first portion of the first type layer. The second type layer is located over the active layer. The first type electrode is contacted with a top surface and a sidewall of the second portion of the first type layer and contacted with a portion of a sidewall of the substrate. The second type electrode is contacted with the second type layer.
    Type: Application
    Filed: November 30, 2020
    Publication date: April 15, 2021
    Inventors: Chang-Da TSAI, Wei-Che WU, Kuan-Kai HUANG
  • Patent number: D933955
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: October 26, 2021
    Inventors: Wei Che Sung, Ching Mu Sung