Patents by Inventor Wei-Cheng (Jason) Yu

Wei-Cheng (Jason) Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250253242
    Abstract: A semiconductor structure includes a first transistor having a first source/drain (S/D) feature and a first gate; a second transistor having a second S/D feature and a second gate; a multi-layer interconnection disposed over the first and the second transistors; a signal interconnection under the first and the second transistors; and a power rail under the signal interconnection and electrically isolated from the signal interconnection, wherein the signal interconnection electrically connects one of the first S/D feature and the first gate to one of the second S/D feature and the second gate.
    Type: Application
    Filed: February 17, 2025
    Publication date: August 7, 2025
    Inventors: Yu-Xuan Huang, Wei-Cheng Lin, Yi-Hsun Chiu, Chun-Yuan Chen, Wei-An Lai, Yi-Bo Liao, Hou-Yu Chen, Ching-Wei Tsai, Ming Chian Tsai, Huan-Chieh Su, Jiann-Tyng Tzeng, Kuan-Lun Cheng
  • Publication number: 20250250298
    Abstract: Compositions for oncolytic peptide therapeutics of cancer are provided. Methods of using such compositions containing the same are also described. Additionally, the oncolytic peptide can be used to inhibit tumor growth and decrease tumor volume.
    Type: Application
    Filed: April 12, 2022
    Publication date: August 7, 2025
    Inventors: Jya-Wei Cheng, Chih-Lung Wu
  • Publication number: 20250253222
    Abstract: A semiconductor device includes a first integrated circuit, a bridge die, and a redistribution layer (RDL) structure. The first integrated circuit includes a first interconnect structure, a first passivation layer and a first conductive connector electrically connected to the first interconnect structure and disposed on the first passivation layer. The bridge die bridge die includes a second interconnect structure, a second passivation layer and a second conductive connector electrically connected to the second interconnect structure. The RDL structure is disposed between and electrically connected to the first integrated circuit and the bridge die, wherein the first passivation layer is in direct contact with the first conductive connector, the first conductive connector is in direct contact with the RDL structure, and the first passivation layer is a single layer and includes a first inorganic material.
    Type: Application
    Filed: February 1, 2024
    Publication date: August 7, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Yu Chen, Hsuan-Cheng Kuo, Wan-Yu Lee, Wei-Cheng Wu, Hua-Wei Tseng, Ta-Hsuan Lin, Chih-Chiang Chang
  • Publication number: 20250252243
    Abstract: A method is provided, including following operations: identifying a first contact via, a second contact via, or a combination thereof in a first standard cell, wherein the first contact via is coupled between a first active region and a first conductive line on a first side, and the second contact via is coupled between a second active region and a second conductive line on a second side; calculating a first cell height according to a first width of the first and second active regions, and calculating a second cell height according to a second width of the first and second active regions; calculating multiple first available cell heights based on a ratio between the first and second cell heights; generating layout designs of multiple first cells; and manufacturing at least first one element in the integrated circuit based on the layout designs of the first cells.
    Type: Application
    Filed: April 24, 2025
    Publication date: August 7, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu HUANG, Wei-Cheng TZENG, Shih-Wei PENG, Wei-Cheng LIN, Jiann-Tyng TZENG
  • Publication number: 20250253243
    Abstract: A method includes patterning a substrate to define a semiconductor strip over the substrate; and forming a backside via adjacent to the semiconductor strip. The method further includes depositing a dielectric material. The method further includes etching the dielectric material to define an isolation structure having a top surface lower than a top surface of the semiconductor strip. The method further includes forming a source/drain structure over the semiconductor strip. The method further includes forming an interlayer dielectric layer over the source/drain structure. The method further includes etching the interlayer dielectric layer and the isolation structure to define an opening exposing the backside via. The method further includes forming a source/drain contact in the opening.
    Type: Application
    Filed: April 22, 2025
    Publication date: August 7, 2025
    Inventors: Shih-Wei PENG, Wei-Cheng LIN, Cheng-Chi CHUANG, Jiann-Tyng TZENG
  • Patent number: 12379539
    Abstract: An electronic device includes a reflective panel, a light guide plate and a light source. The light guide plate is disposed on the reflective panel, and the light guide plate has a first surface adjacent to the reflective panel, a second surface and a side surface connected between the first surface and the second surface. The light source is adjacent to the side surface of the light guide plate. When light emitted from the light source passes through the light guide plate, a first light shape diagram is obtained by performing measurement on the first surface, a second light shape diagram is obtained by performing measurement on the second surface, the first light shape diagram has a first maximum brightness, the second light shape diagram has a second maximum brightness, and the first maximum brightness is greater than the second maximum brightness.
    Type: Grant
    Filed: January 3, 2024
    Date of Patent: August 5, 2025
    Assignee: INNOLUX CORPORATION
    Inventors: Wei-Cheng Lee, I-An Yao, Jiunn-Shyong Lin
  • Patent number: 12382734
    Abstract: An image sensor device is disclosed which includes a semiconductor layer having a first surface and a second surface, where the second surface is opposite to the first surface. The device includes a conductive structure disposed over the first surface, with a dielectric layer disposed between the conductive structure and the first surface. The device includes a first dielectric layer disposed over the second surface of the semiconductor substrate. The device includes a second dielectric layer disposed over the first dielectric layer. The device includes a color filter layer disposed over the second dielectric layer. In some embodiments, the thickness, refractive index, or both of the first dielectric layer and the thickness, refractive index, or both of the second dielectric layer may be collectively determined to cause incident radiation passing through the first dielectric layer and the second dielectric layer and to the plurality of pixels to have destructive interference.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: August 5, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Feng-Chien Hsieh, Chia-Yen Hsu, Yun-Wei Cheng, Wei-Li Hu, Kuo-Cheng Lee, Hsin-Chi Chen
  • Publication number: 20250242480
    Abstract: This disclosure is directed to a screwdriver bit coupling structure (1) having a screwdriver base (20) and a ring plug (30). The screwdriver base (20) includes a fixing base (21) and a fixing cylinder (22). The fixing cylinder (22) includes an embedding recess (221) and an engaging recess (222). The fixing cylinder (22) has an outer end edge (223). The ring plug (30) includes an elastic segment (31) and an abutting segment (32). The abutting segment (32) is pressed by the outer end edge (223). The screwdriver bit (2) is inserted into the embedding recess (221) through the ring plug (30). The screwdriver bit (2) is pressed by the elastic segment (31) to be firmly fixed in the engaging recess (222).
    Type: Application
    Filed: January 31, 2024
    Publication date: July 31, 2025
    Inventor: Wei-Cheng CHEN
  • Patent number: 12376403
    Abstract: A method includes forming image sensors in a semiconductor substrate, thinning the semiconductor substrate from a backside of the semiconductor substrate, forming a dielectric layer on the backside of the semiconductor substrate, and forming a polymer grid on the backside of the semiconductor substrate. The polymer grid has a first refractivity value. The method further includes forming color filters in the polymer grid, wherein the color filters has a second refractivity value higher than the first refractivity value, and forming micro-lenses on the color filters.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: July 29, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kun-Huei Lin, Yun-Wei Cheng, Chun-Hao Chou, Kuo-Cheng Lee, Cheng Yuan Wang
  • Patent number: 12374153
    Abstract: An electronic device has a narrow viewing angle state and a wide viewing angle state, and includes a panel and a light source providing a light passing through the panel. In the narrow viewing angle state, the light has a first relative light intensity and a second relative light intensity. The first relative light intensity is the strongest light intensity, the second relative light intensity is 50% of the strongest light intensity, the first relative light intensity corresponds to an angle of 0°, the second relative light intensity corresponds to a half-value angle, and the half-value angle is between ?15° and 15°. In the narrow angle state, a third relative light intensity at each angle between 20° and 60° or each angle between ?20° and ?60° is lower than 20% of the strongest light intensity.
    Type: Grant
    Filed: January 3, 2024
    Date of Patent: July 29, 2025
    Assignee: InnoLux Corporation
    Inventors: Kuei-Sheng Chang, Po-Yang Chen, Kuo-Jung Wu, I-An Yao, Wei-Cheng Lee, Hsien-Wen Huang
  • Publication number: 20250238059
    Abstract: An information handling system includes first and second USB-C channels and a baseboard management controller (BMC). The first USB-C channel receives power from a first power adaptor, and the second USB-C channel receives power from a second power adaptor. The BMC determines an average current delivered to the information handling system from the first power adaptor and the second power adaptor, allocates a first portion of the average current to the first power adaptor and a second portion of the average current to the second power adaptor, and directs the first power adaptor to provide the first portion of the average current and the second power adaptor to provide the second portion of the average current.
    Type: Application
    Filed: January 22, 2024
    Publication date: July 24, 2025
    Inventors: Wei-Cheng Yu, Merle Jackson Wood, III, Chin Jui Liu, Chi-Che Wu, Wen-Yung Chang
  • Publication number: 20250233618
    Abstract: A wireless power system includes a control system configured to output radio waves to an environment and a wearable device having an energy harvesting device configured to receive the radio waves and to harvest energy from the received radio waves. The wearable device also includes a processor and a sensor configured to detect a state of the wearable device and output a state signal to the processor. The processor is configured to output a device control signal based on the detected state signal. The wearable device further includes a communicator configured to receive the device control signal from the processor and to provide an output to the control system based on the state of the wearable device. At least the processor, the sensor, or the communicator receive power via the energy harvested by the energy harvesting device.
    Type: Application
    Filed: March 31, 2025
    Publication date: July 17, 2025
    Inventors: Wei Cheng Yeh, Travis Jon Cossairt, Akiva Meir Krauthamer
  • Publication number: 20250234556
    Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes a first doped region and a second doped region disposed within a substrate. A data storage structure is arranged over the substrate and laterally between the first doped region and the second doped region. An isolation structure is arranged within the substrate along a first side of the data storage structure. The first doped region is laterally between the isolation structure and the data storage structure. A remnant is arranged over and along a sidewall of the isolation structure. The remnant includes a first material having a vertically extending segment and a horizontally extending segment protruding outward from a sidewall of the vertically extending segment.
    Type: Application
    Filed: April 7, 2025
    Publication date: July 17, 2025
    Inventors: Wei Cheng Wu, Pai Chi Chou
  • Publication number: 20250234542
    Abstract: A method is provided in which a monitor cell is made that is substantially identical to the flash memory cells of an embedded memory array. The monitor cell is formed simultaneously with the cells of the memory array, and so in certain critical aspects, is exactly comparable. An aperture is formed that extends through the control gate and intervening dielectric to the floating gate of the monitor cell. To prevent silicide contamination during a subsequent CMP process, a silicide protection layer (SPL), such as a resist protective oxide, is formed over exposed portions of the control gate prior to formation of a silicide contact formed on the floating gate. The SPL is formed simultaneously with existing manufacturing processes to avoid additional process steps.
    Type: Application
    Filed: April 2, 2025
    Publication date: July 17, 2025
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Han LIN, Wei Cheng WU
  • Patent number: 12362321
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.
    Type: Grant
    Filed: December 28, 2023
    Date of Patent: July 15, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
  • Patent number: 12364043
    Abstract: An image sensor device includes a substrate, photosensitive pixels, an interconnect structure, a dielectric layer, and a light blocking element. The photosensitive pixels are in the substrate. The interconnect structure is over a first side of the substrate. The dielectric layer is over a second side of the substrate opposite the first side of the substrate. The light blocking element has a first portion extending over a top surface of the dielectric layer and a second portion extending in the dielectric layer. The second portion of the light blocking element laterally surrounds the photosensitive pixels.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: July 15, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Feng-Chien Hsieh, Yun-Wei Cheng, Wei-Li Hu, Kuo-Cheng Lee, Ying-Hao Chen
  • Publication number: 20250223950
    Abstract: A propellant applied to a thruster, especially a pulsed plasma thruster, has a composition including a polymer and a metal powder material mixed with the polymer. A method of manufacturing the propellant includes dissolving polymer particles in a solvent for generating a solution, adding a powdered metal material to the solution for obtaining a mixture, and drying the mixture for removing the solvent from the mixture. Accordingly, a dried mixture is acquired and defined as a metal composite polymer which serves as the composition of the propellant. Accordingly, the use of the propellant allows a decrease in the voltage involved in a punching process and an efficient reduction in the energy consumption and assists the thruster in increasing the propulsive efficiency.
    Type: Application
    Filed: January 9, 2024
    Publication date: July 10, 2025
    Inventors: YUEH-HENG LI, CHAO-WEI HUANG, WEI-CHENG LO, TSUNG-YING YANG
  • Publication number: 20250225304
    Abstract: A device includes: alternating first rows and second rows correspondingly including first cell regions and second cell regions, each of the first cell regions and second cell regions correspondingly including active regions; in a first metallization layer over the active regions, each of the first cell regions and the second cell regions include first and second power grid (PG) segments, and one or more routing (RTE) segments; and in a first buried metallization layer under the active regions, each of the first cell regions includes first and second buried PG (BPG) segments, and each of the second cell regions includes one or more buried local interconnect (BLI) structures; and each of the first cell regions is free from including a BLI structure.
    Type: Application
    Filed: January 10, 2024
    Publication date: July 10, 2025
    Inventors: Chun-Hsuan WANG, Ching-Yu HUANG, Wei-Cheng LIN, Jiann-Tyng TZENG
  • Patent number: 12351694
    Abstract: The present invention provides a thermoplastic elastomer composition for foaming. The thermoplastic elastomer composition comprises: (A) an ethylene-based copolymer; (B) an olefin block copolymer; (C) an unsaturated aliphatic rubber; and (D) a crosslinking agent. The olefin block copolymer is different from the ethylene-based copolymer. The weight ratio of the unsaturated aliphatic rubber (C) to the olefin block copolymer (B) is 1:1.5 to 1:5.
    Type: Grant
    Filed: September 18, 2020
    Date of Patent: July 8, 2025
    Assignee: TSRC Corporation
    Inventors: Wen Wei Cheng, Hsi-Hsin Shih, Chia-Hung Hsu, Yu Tsan Tseng
  • Patent number: D1085274
    Type: Grant
    Filed: June 9, 2023
    Date of Patent: July 22, 2025
    Assignee: Universal City Studios LLC
    Inventors: Rachel Elise Rodgers, Wei Cheng Yeh, Christina Corrine Lee, Jon Francis Craine