Abstract: A transmission interface between at least a first module and a second module is proposed. The transmission interface includes at least two physical transmission mediums. Each physical transmission medium is arranged to carry a multiplexed signal in which at least two signals are integrated. The at least two physical transmission mediums include a first physical transmission medium arranged to carry a first multiplexed signal including a first IF signal and a reference clock signal. The first IF signal and the reference clock signal are at different frequencies.

Abstract: A pneumatic valve mechanism disposed in a toy gun includes a trigger with an action bar, a driving assembly and a firing assembly. The driving assembly is disposed pivotally on the toy gun and linked with a shaft to pivot by the action bar. The firing assembly has a pushing portion and a triggering portion disposed oppositely to the pushing portion. The triggering portion makes the firing assembly reciprocate by an elastic member. The shaft is disposed with a pushing surface. The pushing surface pushes the triggering portion of the firing assembly when the shaft rotates pivotally.

Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion used for connecting an optical element, a fixed portion, and a driving assembly used for driving the movable portion to move relative to the fixed portion. The movable portion is movable relative to the fixed portion.

Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion used for connecting an optical element, a fixed portion, and a driving assembly used for driving the movable portion to move relative to the fixed portion. The movable portion is movable relative to the fixed portion.

Abstract: A package substrate and a method of fabrication thereof including a hybrid substrate core having different material properties in different portions of the core. A first portion of the hybrid substrate core may have a lower coefficient of thermal expansion (CTE) compared to a second portion of the hybrid substrate core. The CTE of the first portion of the hybrid substrate core may be close to the CTE of semiconductor integrated circuit dies mounted to a first side of the package substrate in an assembled semiconductor package. The CTE of the second portion of the hybrid substrate core may be close to the CTE of a supporting substrate, such as a printed circuit board, to which the semiconductor package is mounted. The package substrate may help to balance stress, such as thermally-induced stress, in the semiconductor package, thereby improving package reliability.

Abstract: The present invention provides a wireless communication method of an electronic device, wherein the electronic device includes a first radio and a second radio, a maximum bandwidth or a maximum. NSS supported by the first radio is different from a maximum bandwidth or a maximum NSS supported by the second radio. The wireless communication method includes the step of: using the first radio to communicate with another electronic device; determining if parameters of the electronic device satisfy a condition; and in response to the parameters of the electronic device satisfying the condition, enabling the second radio and using the second radio to communicate with the another electronic device, and disabling the first radio.

Abstract: An integrated circuit includes a photodetector. The photodetector includes one or more dielectric structures positioned in a trench in a semiconductor substrate. The photodetector includes a photosensitive material positioned in the trench and covering the one or more dielectric structures. A dielectric layer covers the photosensitive material. The photosensitive material has an index of refraction that is greater than the indices of refraction of the dielectric structures and the dielectric layer.

Abstract: A method for manufacturing a semiconductor structure includes forming a first interconnect feature in a first dielectric feature, the first interconnect feature including a first conductive element exposed from the first dielectric feature; forming a first cap feature over the first conductive element, the first cap feature including a first cap element which includes a two-dimensional material; forming a second dielectric feature with a first opening that exposes the first cap element; forming a barrier layer over the second dielectric feature while exposing the first cap element from the barrier layer; removing a portion of the first cap element exposed from the barrier layer; and forming a second conductive element in the first opening.

Abstract: An electronic device is provided. The electronic device includes an antenna array including a plurality of antenna patterns collectively configured to provide a scan-angle coverage. Each of the antenna patterns includes a curved surface.

Abstract: A semiconductor package includes a package substrate including an upper surface layer including a first surface area having a first surface roughness, and a second surface area having a second surface roughness less than the first surface roughness, and an interposer module mounted on the upper surface layer of the package substrate in the second surface area. The semiconductor package may also include an interposer including an upper surface layer including a first surface area having a first surface roughness, and a second surface area having a second surface roughness less than the first surface roughness. The semiconductor package may also include an printed circuit board substrate including an upper surface layer including a first surface area having a first surface roughness, and a second surface area having a second surface roughness less than the first surface roughness.

Abstract: A device includes: a complementary transistor including: a first transistor having a first source/drain region and a second source/drain region; and a second transistor stacked on the first transistor, and having a third source/drain region and a fourth source/drain region, the third source/drain region overlapping the first source/drain region, the fourth source/drain region overlapping the second source/drain region. The device further includes: a first source/drain contact electrically coupled to the third source/drain region; a second source/drain contact electrically coupled to the second source/drain region; a gate isolation structure adjacent the first and second transistors; and an interconnect structure electrically coupled to the first source/drain contact and the second source/drain contact.

Abstract: The present invention provides a microplasma device and system thereof. The microplasma device comprises a reaction tank carrying with a reaction solution. A nanomaterial and its precursors are contained in the reaction solution. A first electrode is at least partially immersed in the reaction solution. A second electrode comprises a microplasma array component to eject microplasma array to the surface of the reaction solution. A power source is electrically connected between the first electrode and the second electrode. The present invention provides a novel microplasma array device to produce nanomaterial with increased yield rate. The microplasma array device can be multiplied by adding the outlet of the microplasma as desired to produce nanomaterial including but not limited to nano-metal particles, carbon quantum dots, silicon quantum dots and plasma-activated water with higher yield rate.

Abstract: A touch device includes a touch panel, a circuit board, a vibrating unit and a pressure detection module. The touch panel includes two press regions. When different press regions of the touch panel are pressed by the user, the vibration feedback values generated by different press regions are different.

Abstract: A memory device includes a plurality of memory cells; a word line, connected to one of the plurality of memory cells, that is configured to provide a first WL pulse having a rising edge and a falling edge that define a pulse width of the first WL pulse; a first tracking WL, formed adjacent to the memory cells, that is configured to provide, via being physically or operatively coupled to a bit line (BL) configured to write a logic state to the memory cell, a second WL pulse having a rising edge with a decreased slope; and a first tracking BL, configured to emulate the BL, that is coupled to the first tracking WL such that the pulse width of the first WL pulse is increased based on the decreased slope of the rising edge of the second WL pulse.

Abstract: A magnetoresistive random access memory (MRAM) structure, including a substrate and multiple MRAM cells on the substrate, wherein the MRAM cells are arranged in a memory region adjacent to a logic region. An ultra low-k (ULK) layer covers the MRAM cells, wherein the surface portion of ultra low-k layer is doped with fluorine, and dents are formed on the surface of ultra low-k layer at the boundaries between the memory region and the logic region.

Abstract: A covering structure disposed within a sound producing package includes a first portion, a second portion and a third portion. The first portion is configured to form a first sound outlet having a first diameter. The second portion is configured to form a chamber having a second diameter. The third portion is configured to form a second sound outlet having a third diameter. Wherein, the first sound outlet, the chamber and the second sound outlet provide an acoustic pathway, the first diameter is smaller than the second diameter, and the third diameter is smaller than the second diameter; and wherein, the second portion is disposed between the first portion and the third portion.

Abstract: A folding lens system includes: a polarization-dependence device, a first optical device, a first polarization controller, a second optical device and a second polarization controller. The polarization-dependence device has a first surface and a second surface opposite to the first surface. The first optical device is located at a side facing toward the first surface of the polarization-dependence device. The first polarization controller is located between the polarization-dependence device and the first optical device. The first polarization controller has the same curvature as the first surface of the polarization-dependence device. The second optical device is located at a side facing toward the second surface of the polarization-dependence device. The second polarization controller is located between the polarization-dependence device and the second optical device. The second polarization controller has the same curvature as the second surface of the polarization-dependence device.

Abstract: A semiconductor package includes a package substrate a package substrate including: a substrate core; an upper redistribution layer disposed on a first side of the substrate core; and a lower redistribution layer disposed on an opposing second side of the substrate core; a semiconductor device vertically stacked on and electrically connected to the package substrate; and an upper reinforcement layer embedded in the upper redistribution layer between the semiconductor device and the substrate core, the upper reinforcement layer having a Young's modulus that is higher than a Young's modulus of the upper redistribution layer.

Abstract: A semiconductor device includes a substrate, an interconnect structure, and conductive vias. The substrate has a first side, a second side and a sidewall connecting the first side and the second side, wherein the sidewall includes a first planar sidewall of a first portion of the substrate, a second planar sidewall of a second portion of the substrate and a curved sidewall of a third portion of the substrate, where the first planar sidewall is connected to the second planar sidewall through the curved sidewall. The interconnect structure is located on the first side of the substrate, where a sidewall of the interconnect structure is offset from the second planar sidewall. The conductive vias are located on the interconnect structure, where the interconnect structure is located between the conductive vias and the substrate.

Abstract: A plastic barrel includes an object-end portion, an image-end portion, an inner tube portion and a plurality of protrusions. The object-end portion includes an outer object-end surface, an object-end hole and an inner annular object-end surface. One side of the inner annular object-end surface is connected to the outer object-end surface and surrounds the object-end hole. The image-end portion includes an outer image-end surface, an image-end opening and an inner annular image-end surface. The inner annular image-end surface is connected to the outer image-end surface and surrounds the image-end opening. The inner tube portion connects the object-end portion and the image-end portion and includes a plurality of inclined surfaces. The protrusions are disposed at least on one of the inner annular object-end surface, the inner annular image-end surface and the inclined surfaces, wherein the protrusions are regularly arranged around the central axis of the plastic barrel.