Abstract: A method of pre-cleaning in a semiconductor structure includes performing a plasma pre-treatment process to remove impurities from a surface of a semiconductor structure comprising a metal layer and a dielectric layer, performing a selective etch process to remove molybdenum oxide from a surface of the metal layer, the selective etch process comprising soaking the semiconductor structure in a precursor including molybdenum chloride (MoCl5, MoCl6) at a temperature of between 250° C. and 350° C., and performing a post-treatment process to remove chlorine residues and by-products of the selective etch process on the surface of the semiconductor structure.

Abstract: An iron core-annular array multi-ring magnetosensitive current sensor and a current measurement method, the method comprising: using a first loop structure (101) to acquire a feedback current signal generated according to a first magnetic field signal generated by a primary side current; using a second loop structure (102) to measure a second magnetic field signal generated by the current of a wire in a coil; and using a digital processing unit (103) to calculate, according to the feedback current signal and the second magnetic field signal, the feature quantity that characterizes the current of the wire, and determining the current on the wire according to the feature quantity that characterizes the current of the wire.

Abstract: A method of metal gapfill including depositing a metal layer on a dielectric layer present on a field and/or in an opening of a feature via plasma enhanced atomic layer deposition utilizing a metal halide precursor and a plasma comprising hydrogen and a noble gas; and depositing a metal gapfill material on the field and in the opening directly over the metal layer, wherein the metal gapfill material completely fills the opening.

Abstract: The present disclosure provides a direct current (DC) transformer error detection apparatus for a pulsating harmonic signal, including a DC and pulsating harmonic current output module and an external detected input module, where the DC and pulsating harmonic current output module outputs a DC and a DC superimposed pulsating harmonic current to an internal sampling circuit and a self-calibrated standard resistor array; and the internal sampling circuit converts the input DC and the input DC superimposed pulsating harmonic current into a voltage signal, and sends the voltage signal to an analog-to-digital (AD) sampling and measurement component through a front-end conditioning circuit and a detected input channel. The DC transformer error detection apparatus can complete self-calibration for measurement of the DC and the pulsating harmonic signal on a test site.

Abstract: The present disclosure provides LPA antagonists, as well as pharmaceutical compositions comprising the compounds disclosed herein. Also provided are methods for treating LPA-associated diseases, disorders, and conditions.

Abstract: The present disclosure relates generally to GLP-1 agonists and pharmaceutical compositions comprising the same, as well as methods for treating a GLP-1 associated disease, disorder, or condition.

Abstract: An anastomosis set for anastomosing a first end to be anastomosed with a second end to be anastomosed, such anastomosis set comprising: a first manipulator, with a first telescoping part at a distal end thereof, the first telescoping part is used for telescoping toward the first end to be anastomosed; a second manipulator, with a second telescoping part at a distal end thereof, the second telescoping part is used for telescoping toward the second end to be anastomosed; and an anastomosis mechanism for anastomosing the first end to be anastomosed with the second end to be anastomosed; the first manipulator including a first exit part through which the first manipulator will be removed from the first end to be anastomosed after anastomosing; the second manipulator has a second exit part, through which the second manipulator will be removed from the second end to be anastomosed after anastomosing.

Abstract: A package structure includes a supporting base, conductive pillars, a first semiconductor die, a second semiconductor die, a first adhesive material, a second adhesive material and an isolation structure. The conductive pillars are disposed in the supporting base, and protruding out from a top surface of the supporting base. The second semiconductor die is adjacent to the first semiconductor die, wherein the first and second semiconductor dies are disposed on the supporting base and electrically connected to the conductive pillars. The first adhesive material is disposed in between the first semiconductor die and the top surface of the supporting base, and partially covering the conductive pillars. The second adhesive material is disposed in between the second semiconductor die and the top surface of the supporting base, and partially covering the conductive pillars. The isolation structure prevents a bleeding of the first and second adhesive material to an adjacent semiconductor die.

Abstract: Embodiments of the disclosure include an apparatus and method of forming a semiconductor structure that includes metal contacts with a low resistance. In some embodiments, the semiconductor device generally includes an interconnect. The interconnect generally includes a dielectric layer with a tungsten (W) plug formed therein, a feature formed in the dielectric layer and over the W plug, a liner layer formed on an exposed surface of the W plug and on sidewalls of the feature, an interruption layer formed on the liner layer, and a conductive material substantially filling the feature. The liner layer includes molybdenum (Mo) or W, and the interruption layer includes Mo.

Abstract: A device includes a first conductive line as an input line. The device further includes a second conductive line as an output line, wherein the first conductive line and the second conductive line are in a same level of the integrated circuit. The device further includes a first passive isolation structure between the first conductive line and the second conductive line, wherein the first passive isolation structure and the second conductive line are each positioned at an integer multiple of an interval between the first conductive line and the first passive isolation structure.

Abstract: Semiconductor devices and methods for molybdenum fill in semiconductor devices are provided. In one aspect, a method for processing a semiconductor device substrate is provided. The method includes exposing at least one feature formed in a dielectric layer to a grain modification layer deposition process to deposit a grain modification layer over at least a portion of the at least one feature. The at least one feature is defined by sidewall surfaces formed in the dielectric layer and a bottom surface extending between the sidewall surfaces. The method further includes exposing the at least one feature to a molybdenum deposition process to form a molybdenum-fill layer on the grain modification layer, wherein the grain modification layer comprises a metal different from molybdenum.

Abstract: Wireless communications systems may support flexible waveform configuration for autonomous uplink transmissions. A base station may transmit broadcast signaling (e.g., a system information block (SIB)) indicating waveform configuration information for an autonomous uplink transmission by a user equipment (UE). In some cases, the broadcast signaling may include a waveform configuration field (WCF) that may indicate whether flexible waveforms for autonomous uplink are supported, may configure a waveform type, may indicate waveform configuration mapping rules, etc. As such, a UE may identify whether flexible waveform configuration for autonomous uplink is supported, and may determine waveform types for autonomous uplink transmissions based on waveform type configuration information from a base station (e.g., which may include an indication of whether flexible waveform configuration is supported, an indication of waveform type/scenario mapping rules, etc.

Abstract: The present application relates to the technology field of assessment of aging state of oil paper insulation of the large power transformer and quantitative diagnostic, specifically estimating parameters of the circuit through the initial slope of the recovery voltage. It includes an improved mathematical model for solving parameters of the dielectric response equivalent circuit by using the peak of the recovery voltage, the peak time and the initial slope characteristics; transforming the identification of parameters of the equivalent circuit into a mathematical optimization problem, and then solving the mathematical optimization problem using a particle swarm algorithm. The design of the present application can significantly reduce the sampling data of the recovery voltage, and the measured data in the field and the calculated data of different capacity RVM experiments on real transformers have good consistency, which is conducive to the diagnosis of state of oil paper insulation of the transformer.

Abstract: Magnet assemblies comprising a housing with a top plate each comprising aligned openings are described. The housing has a bottom ring and an annular wall with a plurality of openings formed in the bottom ring. The top plate is on the housing and has a plurality of openings aligned with the plurality of openings in the bottom ring of the housing. The magnet assembly may also include a non-conducting base plate and/or a conductive cover plate. Methods for using the magnet assembly and magnetic field tuning are also described.

Abstract: The invention relates to a double-layer winding layout method suitable for asymmetrical winding machine. The method is implemented by three main steps: 1) the design of the initial double-layer winding layout structure for each machine unit, which is based on the principle of the largest number of spokes belonging to phase A; 2) rearranging the number of spokes in positive (e.g., labeled a-phase belt) and negative sectors (e.g., labeled x-phase belt) belonging to phase A for making slot numbers equally divided; 3) solving the serial number of the stator slot in reverse to get the final winding layout schemes which contain multiple layout structures for one slot-pole combination. The method of the present invention improves the conventional star-of-slot theory based on the distribution characteristics of the asymmetrical windings, perfects the general design theory of double-layer asymmetrical winding structure.

Abstract: The present disclosure relates generally to GLP-1 agonists and pharmaceutical compositions comprising the same, as well as methods for treating a GLP-1 associated disease, disorder, or condition.

Abstract: The present disclosure describes a method for optimizing metal cuts in standard cells. The method includes placing a standard cell in a layout area and inserting a metal cut along a metal interconnect of the standard cell at a location away from a boundary of the standard cell. The method further includes disconnecting, at the location, a metal portion of the metal interconnect from a remaining portion of the metal interconnect based on the metal cut.

Abstract: A housing of a battery cell has an opening at an end in a first direction and includes a first side plate, a second side plate and a first connection plate. The first side plate and the second side plate are arranged in a circumferential direction of the opening, the first connection plate is connected between the first side plate and the second side plate, and at least a part of the first connection plate is arcuate. The first side plate includes a first plate portion, a second plate portion and a third plate portion, the second plate portion is connected between the first plate portion and the first connection plate, and the third plate portion is located at a side of the first plate portion close to the opening.

Abstract: Methods and apparatuses of power control for additional SRS are disclosed. A method at abase unit comprises transmitting power control parameters for transmitting additional SRS by higher layers; and transmitting TPC command by DCI format 3B for additional SRS.

Abstract: An air blower, including a volute, a centrifugal wind wheel, and a motor. The volute includes an end plate, a side plate extending from an edge of the end plate, and a cavity formed by the end plate and the side plate; the centrifugal wind wheel is disposed in the cavity; the end plate includes an air inlet, and two ends of the side plate are disposed side by side to form an air outlet; the end plate further includes a support beam opposite to the air inlet, and the motor is disposed on the support beam.