Patents by Inventor Wei Lim

Wei Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240102405
    Abstract: A method of encoding video including: writing a plurality of predetermined buffer descriptions into a sequence parameter set of a coded video bitstream; writing a plurality of updating parameters into a slice header of the coded video bitstream for selecting and modifying one buffer description out of the plurality of buffer descriptions; and encoding a slice into the coded video bitstream using the slice header and the modified buffer description.
    Type: Application
    Filed: December 8, 2023
    Publication date: March 28, 2024
    Inventors: Viktor WAHADANIAH, Chong Soon LIM, Sue Mon Thet NAING, Hai Wei SUN, Takahiro NISHI, Hisao SASAI, Youji SHIBAHARA, Toshiyasu SUGIO, Kyoko TANIKAWA, Toru MATSUNOBU
  • Patent number: 11942145
    Abstract: The present disclosure describes a method for memory cell placement. The method can include placing a memory cell region in a layout area and placing a well pick-up region and a first power supply routing region along a first side of the memory cell region. The method also includes placing a second power supply routing region and a bitline jumper routing region along a second side of the memory cell region, where the second side is on an opposite side to that of the first side. The method further includes placing a device region along the second side of the memory cell region, where the bitline jumper routing region is between the second power supply routing region and the device region.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chuan Yang, Jui-Wen Chang, Feng-Ming Chang, Kian-Long Lim, Kuo-Hsiu Hsu, Lien Jung Hung, Ping-Wei Wang
  • Patent number: 11937328
    Abstract: This disclosure relates to techniques for a wireless device to perform millimeter wavelength communication with increased reliability and power efficiency using sensor inputs. The sensor inputs may include motion, rotation, or temperature measurements, among various possibilities. The sensor inputs may be used when performing beamforming tracking, antenna configuration, transmit and receive chain measurements and selection, and/or in any of various other possible operations.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: March 19, 2024
    Assignee: Apple Inc.
    Inventors: Wei Zhang, Pengkai Zhao, Shiva Krishna Narra, Sriram Subramanian, Madhukar K. Shanbhag, Sanjeevi Balasubramanian, Junsung Lim, Jia Tang, Galib A. Mohiuddin, Yu-Lin Wang, Zhu Ji, Johnson O. Sebeni
  • Patent number: 11933786
    Abstract: Antibodies that selectively bind to glycosylated PD-1 relative to unglycosylated PD-1 are provided. In some aspects, PD-1 polypeptides comprising glycosylated amino acid positions are also provided. Methods for making and using such antibodies and polypeptides (e.g., for the treatment of cancer) are also provided.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: March 19, 2024
    Assignees: STCUBE, INC., BOARD OF REGENTS, THE UNIVERSITY OF TEXAS
    Inventors: Stephen S. Yoo, Ezra M. Chung, Yong-Soo Kim, Mien-Chie Hung, Chia-Wei Li, Seung-Oe Lim
  • Publication number: 20240089479
    Abstract: An image encoder writes a first parameter and a second parameter to a bitstream, and derives a partition mode based on the first and second parameters. Responsive to the derived partition mode being a first partition mode, the image encoder executes the first partition mode including: splitting a block of a picture into a plurality of first blocks including a N×2N block sized N pixels by 2N pixels; splitting the N×2N block, wherein a ternary split is allowed to split the N×2N block in a vertical direction, which is a direction along the 2N pixels, into a plurality of sub blocks including at least one sub block sized N/4×2N, while a binary split is not allowed to split the N×2N block in the vertical direction into two sub blocks that are equally sized N/2×2N; and encoding the plurality of sub blocks.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Inventors: Chong Soon LIM, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Ru Ling LIAO, Han Boon TEO, Takahiro NISHI, Ryuichi KANOH, Tadamasa TOMA
  • Publication number: 20240086664
    Abstract: Embodiments of the disclosure provide for improved print position compensation, for example to improve accuracy of print job(s) performed by a printer. The print position compensation enables an offset of the time until printing occurs on a print media to account for changes and/or erroneous movement in a print media, such as due to slippage and/or other results of a force applied to the print media. Particular embodiments determine data values derived both for an output phase and a retraction phase of the printer's operation. Various embodiments generate a print position compensation based on sensor-based edge position distances determined during each of a media output phase and a media retraction phase. Alternatively or additionally various embodiments generate a print position compensation based on sensor-based media movement phase timestamp differentials determined during each of a media output phase and a media retraction phase.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Inventors: Cheng Khoon NG, Heng Yew LIM, Shufeng ZHENG, Jang Wei CHAO
  • Publication number: 20240089493
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Jing Ya LI, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI
  • Patent number: 11930206
    Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
    Type: Grant
    Filed: April 19, 2023
    Date of Patent: March 12, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Ru Ling Liao, Jing Ya Li, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Patent number: 11929260
    Abstract: Embodiments of methods and apparatus for reducing warpage of a substrate are provided herein. In some embodiments, a method for reducing warpage of a substrate includes: applying an epoxy mold over a plurality of dies on the substrate in a dispenser tool; placing the substrate on a pedestal in a curing chamber, wherein the substrate has an expected post-cure deflection in a first direction; inducing a curvature on the substrate in a direction opposite the first direction; and curing the substrate by heating the substrate in the curing chamber.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: March 12, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Fang Jie Lim, Chin Wei Tan, Jun-Liang Su, Felix Deng, Sai Kumar Kodumuri, Ananthkrishna Jupudi, Nuno Yen-Chu Chen
  • Publication number: 20240077667
    Abstract: An illumination panel device includes a housing, a first circuit board, a second circuit board, and a light guide. The housing includes a frame coupled to a rear cover. The frame defines an opening. The first circuit board includes a plurality of white light emitters. The first circuit board is coupled to the frame such that the plurality of white light emitters are arranged around the opening. The second circuit board includes a plurality of multi-color light emitters. The second circuit board is coupled to the frame such that the plurality of multi-color light emitters are arranged around the opening. The light guide has opposite front and back surfaces. The light guide is arranged in the opening with the back surface facing the rear cover. The light guide is optically coupled to at least the plurality of white light emitters through peripheral edges of the light guide.
    Type: Application
    Filed: February 25, 2021
    Publication date: March 7, 2024
    Inventors: Farrukh Raza RIZVI, Wooi Liang CHIN, Yi Wei LIM
  • Patent number: 11924456
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: March 5, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11924423
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: March 5, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11917150
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: February 27, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11915981
    Abstract: A semiconductor device includes a semiconductor substrate, a first gate structure over the substrate, a second gate structure over the substrate, first gate spacers, second gate spacers, first and second metal layers spanning over the first and second gate structures, first and second contact plugs extending through the first and second metal layers, respectively. The first gate structure includes a first gate dielectric, and a first work function metal layer over the first gate dielectric. The second gate structure is wider than the first gate structure, wherein the second gate structure includes a second gate dielectric, a second work function metal layer over the second gate dielectric, and a filling conductor over the second work function metal layer. The first contact plug is in contact with the first work function metal layer, and the second contact plug is in contact with the filling conductor.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Peng-Soon Lim, Zi-Wei Fang
  • Patent number: 11917179
    Abstract: A decoder includes circuitry which, in operation, parses a first flag indicating whether a CCALF (cross component adaptive loop filtering) process is enabled for a first block located adjacent to a left side of a current block; parses a second flag indicating whether the CCALF process is enabled for a second block located adjacent to an upper side of the current block; determines a first index associated with a color component of the current block; and derives a second index indicating a context model, using the first flag, the second flag, and the first index. The circuitry, in operation, performs entropy decoding of a third flag indicating whether the CCALF process is enabled for the current block, using the context model indicated by the second index; and performs the CCALF process on the current block in response to the third flag indicating the CCALF process is enabled for the current block.
    Type: Grant
    Filed: October 7, 2022
    Date of Patent: February 27, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Che-Wei Kuo, Chong Soon Lim, Han Boon Teo, Jing Ya Li, Hai Wei Sun, Chu Tong Wang, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Publication number: 20240014083
    Abstract: A method of making a semiconductor device assembly is provided. The method comprises attaching a first semiconductor device to an upper surface of a substrate and disposing a stencil over the upper surface of the substrate. The stencil includes (i) an opening and (ii) a cavity in which the first semiconductor device is disposed. The method further comprises screen-printing an epoxy material into the opening and onto the upper surface of the substrate, removing the stencil, and planarizing an upper surface of the epoxy material to form an epoxy spacer.
    Type: Application
    Filed: July 3, 2023
    Publication date: January 11, 2024
    Inventors: Hem P. Takiar, Raj K. Bansal, Jian Wei Lim, Li Wang, Jungbae Lee
  • Patent number: 11855652
    Abstract: A multiplexer (MUX) calibration system includes main MUX circuitry, first replica MUX circuitry, digital-to-analog (DAC) circuitry, detection circuitry, and control circuitry. The main MUX circuitry receives clock signals and outputs a first data signal based on the clock signals. The first replica MUX circuitry receives the clock signals and outputs a second data signal based on the clock signals. The DAC circuitry generates an offset voltage. The detection circuitry receives the second data signal and the offset voltage and generates a first error signal based on one or more of the second data signal and the offset voltage. The control circuitry receives the first error signal and generates a first control signal indicating an adjustment to the clock signals.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: December 26, 2023
    Assignee: XILINX, INC.
    Inventors: Hao-Wei Hung, Tan Kee Hian, Siok Wei Lim, Hongtao Zhang
  • Patent number: 11824534
    Abstract: A transmit driver architecture with a test mode (e.g., a JTAG configuration mode), extended equalization range, and/or multiple power supply domains. One example transmit driver circuit generally includes one or more driver unit cells having a differential input node pair configured to receive an input data signal and having a differential output node pair configured to output an output data signal; a plurality of power switches coupled between the differential output node pair and one or more power supply rails; a first set of one or more drivers coupled between a first test node of a differential test data path and a first output node of the differential output node pair; and a second set of one or more drivers coupled between a second test node of the differential test data path and a second output node of the differential output node pair.
    Type: Grant
    Filed: November 16, 2021
    Date of Patent: November 21, 2023
    Assignee: XILINX, INC.
    Inventors: Nakul Narang, Siok Wei Lim, Luhui Chen, Yipeng Wang, Kee Hian Tan
  • Patent number: 11812127
    Abstract: A system and method are disclosed for providing a display device with a self-tilting retractable camera mechanism. The retractable camera mechanism includes a display device mounting portion, the display device mounting portion being configured to mechanically attach to a display device; and, a retractable camera mounting portion, the retractable camera mounting portion including a self-tilting mechanism, the self-tilting mechanism causing the retractable camera mounting portion to automatically tilt when the retractable camera mounting portion is in an extended position relative to the display device.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: November 7, 2023
    Assignee: Dell Products L.P.
    Inventors: Chong Beng Mike Goh, Meng Wei Lim
  • Patent number: 11725097
    Abstract: An accelerator-free elastomeric formulation comprising base polymers, crosslinkers, stabilizers, an activator, an antioxidant, a pigment, a wax, an antifoam and a pH adjuster. A method of preparing an accelerator-free elastomeric formulation, comprising the steps of mixing Base polymer A with Crosslinker A to produce mixture A, adding while stirring Stabilizer A, Crosslinker B, an activator, an antioxidant, a pigment, a wax and an antifoam one after another with no particular order and followed by a pH adjuster into the mixture A to produce mixture B, adding Base polymer B and Stabilizer B one after another with no particular order into the mixture B to produce an accelerator-free elastomeric formulation and allowing the accelerator-free elastomeric formulation to mature.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: August 15, 2023
    Inventors: Chong Ban Wong, Keuw Wei Lim, Siew Szen Ling, Siti Ayuni Hamka