Patents by Inventor Wei-Ting Lin

Wei-Ting Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240379382
    Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor die and surrounding a sidewall of the semiconductor die with a dielectric material. The method further includes forming a post passivation interconnect (PPI) over the semiconductor die and electrically coupling the PPI with the semiconductor die. The method further includes molding the semiconductor die and the PPI into an integrated semiconductor package. The method further includes covering at least a portion of an outer surface of the integrated semiconductor package with a conductive layer, wherein the conductive layer is conformal to the morphology of the portion of the outer surface. Moreover, the method further includes forming a conductive path inside the integrated semiconductor package electrically coupled to the conductive layer and a ground terminal of the integrated semiconductor package.
    Type: Application
    Filed: May 29, 2024
    Publication date: November 14, 2024
    Inventors: SHOU ZEN CHANG, CHUN-LIN LU, KAI-CHIANG WU, CHING-FENG YANG, VINCENT CHEN, CHUEI-TANG WANG, YEN-PING WANG, HSIEN-WEI CHEN, WEI-TING LIN
  • Publication number: 20240255044
    Abstract: A ball screw apparatus may include a screw rod, a nut, two circulators, a plurality of rolling balls, and a return tube. The screw rod has a spiral groove formed thereon, and the two circulators are respectively connected to two ends of the nut. The nut comprises a through hole axially penetrating therethrough, and a first rolling groove is formed on the inner wall of the through hole, and an outer side of the through hole has a return channel penetrating from one end of the nut to the other. Each of the circulators comprises a second rolling groove, and the second rolling grooves are adapted to connect to the first rolling groove and the return channel, so that the rolling balls installed between the spiral groove and the first rolling groove are adapted to smoothly circulate on the ball screw apparatus.
    Type: Application
    Filed: January 26, 2023
    Publication date: August 1, 2024
    Inventor: Wei-Ting Lin
  • Patent number: 12046480
    Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor die and surrounding a sidewall of the semiconductor die with a dielectric material. The method further includes forming a post passivation interconnect (PPI) over the semiconductor die and electrically coupling the PPI with the semiconductor die. The method further includes molding the semiconductor die and the PPI into an integrated semiconductor package. The method further includes covering at least a portion of an outer surface of the integrated semiconductor package with a conductive layer, wherein the conductive layer is conformal to the morphology of the portion of the outer surface. Moreover, the method further includes forming a conductive path inside the integrated semiconductor package electrically coupled to the conductive layer and a ground terminal of the integrated semiconductor package.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: July 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shou Zen Chang, Chun-Lin Lu, Kai-Chiang Wu, Ching-Feng Yang, Vincent Chen, Chuei-Tang Wang, Yen-Ping Wang, Hsien-Wei Chen, Wei-Ting Lin
  • Publication number: 20240167039
    Abstract: The present disclosure provides a method for treating and/or ameliorating a lung injury or inflammation in the lung, and/or promoting polarization of macrophages in a subject in need thereof, wherein the method comprises administering microRNA-7704 (miR-7704) or a composition comprising miR-7704 to the subject.
    Type: Application
    Filed: November 21, 2022
    Publication date: May 23, 2024
    Inventors: Wei-Ting LIN, Hao-Hsiang WU, Oscar Kuang-Sheng LEE, Jennifer Hui-Chun HO
  • Patent number: 11972956
    Abstract: A lid attach process includes dipping a periphery of a lid in a dipping tank of adhesive material such that the adhesive material attaches to the periphery of the lid. The lid attach process further includes positioning the lid over a die attached to a substrate using a lid carrier, wherein the periphery of the lid is aligned with a periphery of the lid carrier. The lid attach process further includes attaching the lid to the substrate with the adhesive material forming an interface with the substrate. The lid attach process further includes contacting a thermal interface material (TIM) on the die with the lid.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: April 30, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Kuan-Lin Ho, Jason Shen
  • Patent number: 11837949
    Abstract: A protection circuit including an auxiliary winding, a rectifier unit, the filter unit, a voltage divider unit and a controller is provided. The auxiliary winding is configured to induce an AC voltage. The rectifier unit is coupled to the auxiliary winding and configured to rectify the AC voltage into a DC voltage. The filter unit is coupled to the rectifier unit and configured to filter the DC voltage into a DC filter voltage. The voltage divider unit is coupled to the rectifier unit and the filter unit to transmit the DC filter voltage. The controller is coupled to the voltage divider unit and configured to detect a partial voltage of the DC filter voltage and detect whether to activate a protection mechanism according to the partial voltage.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: December 5, 2023
    Assignee: LITE-ON TECHNOLOGY CORPORATION
    Inventors: Wei-Ting Lin, Han-Ju Chiang, Chih-Tai Chen
  • Publication number: 20230358529
    Abstract: The invention provides an optical pressure sensor. The light-emitting module emits a detection light, and the light-receiving module receives a reflected light reflected by an object. When the distance between the object and the light-receiving module changes due to external pressure, the intensity of reflected light changes. The control module compares the intensity difference of the signal to determines the pressing state.
    Type: Application
    Filed: June 14, 2022
    Publication date: November 9, 2023
    Inventors: WEI-TING LIN, SHENG-CHENG LEE, CHAO-YANG HSIAO
  • Publication number: 20230223837
    Abstract: A protection circuit including an auxiliary winding, a rectifier unit, the filter unit, a voltage divider unit and a controller is provided. The auxiliary winding is configured to induce an AC voltage. The rectifier unit is coupled to the auxiliary winding and configured to rectify the AC voltage into a DC voltage. The filter unit is coupled to the rectifier unit and configured to filter the DC voltage into a DC filter voltage. The voltage divider unit is coupled to the rectifier unit and the filter unit to transmit the DC filter voltage. The controller is coupled to the voltage divider unit and configured to detect a partial voltage of the DC filter voltage and detect whether to activate a protection mechanism according to the partial voltage.
    Type: Application
    Filed: April 15, 2022
    Publication date: July 13, 2023
    Inventors: Wei-Ting LIN, Han-Ju CHIANG, Chih-Tai CHEN
  • Publication number: 20230199991
    Abstract: Display cover glass includes a glass substrate. The glass substrate has a first panel and a second panel. An angle formed between the first panel and the second panel. The first panel has a first display area provided with an arbitrary first point. The second panel has a second display area provided with an arbitrary second point. The color difference value ?E between the first point and the second point is less than or equal to 17 when the viewing angle difference between the first point and the second point is 10-60 degrees. The first panel and the second panel make it possible to display driving information, such as a navigation interface, and an operation interface in the two display areas respectively so that the driver of a means of transport can read the information clearly and use the operation interface with ease.
    Type: Application
    Filed: December 16, 2022
    Publication date: June 22, 2023
    Inventors: CHIH-MING CHUNG, HSING-CHIAO LIN, YUH-CHANG LAN, WEI-TING LIN
  • Patent number: 11552054
    Abstract: A package structure includes a semiconductor device, a circuit substrate and a heat dissipating lid. The semiconductor device includes a semiconductor die. The circuit substrate is bonded to and electrically coupled to the semiconductor device. The heat dissipating lid is bonded to the circuit substrate and thermally coupled to the semiconductor device, where the semiconductor device is located in a space confined by the heat dissipating lid and the circuit substrate. The heat dissipating lid includes a cover portion and a flange portion bonded to a periphery of the cover portion. The cover portion has a first surface and a second surface opposite to the first surface, where the cover portion includes a recess therein, the recess has an opening at the second surface, and a thickness of the recess is less than a thickness of the cover portion, where the recess is part of the space.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: January 10, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Ting Lin, Ping-Kang Huang, Sao-Ling Chiu, Shang-Yun Hou
  • Patent number: 11417643
    Abstract: Embodiments relate to packages and methods of forming packages. A package includes a package substrate, a first device die, first electrical connectors, an encapsulant, a redistribution structure, and a second device die. The first device die is attached to a side of the package substrate, and the first electrical connectors are mechanically and electrically coupled to the side of the package substrate. The encapsulant at least laterally encapsulates the first electrical connectors and the first device die. The redistribution structure is on the encapsulant and the first electrical connectors. The redistribution structure is directly coupled to the first electrical connectors. The first device die is disposed between the redistribution structure and the package substrate. The second device die is attached to the redistribution structure by second electrical connectors, and the second electrical connectors are directly coupled to the redistribution structure.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Chih Liu, Kuan-Lin Ho, Wei-Ting Lin, Chin-Liang Chen, Jing Ruei Lu
  • Patent number: 11277168
    Abstract: A communication device is disclosed. The communication device includes a transceiver circuit, an echo canceler, and a processor. The transceiver circuit is configured to transmit a test signal to a channel. The echo canceler is configured to obtain a plurality of echo power of a reflected signal corresponding to the test signal. The processor is configured to obtain a plurality of positions on the channel according to a parameter value. The parameter value is N, a number of the plurality of positions is N, and the plurality of positions corresponds to the top N largest of the plurality of echo power. The echo canceler is further configured to eliminate part of the plurality of echo power corresponding to the plurality of positions according to the plurality of positions.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: March 15, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Wei-Ting Lin, Yuan-Jih Chu, Li-Chung Chen, Hsin-Yun Hu
  • Publication number: 20210407963
    Abstract: A package structure includes a semiconductor device, a circuit substrate and a heat dissipating lid. The semiconductor device includes a semiconductor die. The circuit substrate is bonded to and electrically coupled to the semiconductor device. The heat dissipating lid is bonded to the circuit substrate and thermally coupled to the semiconductor device, where the semiconductor device is located in a space confined by the heat dissipating lid and the circuit substrate. The heat dissipating lid includes a cover portion and a flange portion bonded to a periphery of the cover portion. The cover portion has a first surface and a second surface opposite to the first surface, where the cover portion includes a recess therein, the recess has an opening at the second surface, and a thickness of the recess is less than a thickness of the cover portion, where the recess is part of the space.
    Type: Application
    Filed: June 29, 2020
    Publication date: December 30, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Ting Lin, Ping-Kang Huang, Sao-Ling Chiu, Shang-Yun Hou
  • Patent number: 11211339
    Abstract: A semiconductor device includes a semiconductor die having an insulative layer and a conductive feature in the insulative layer, and a shield in contact with a lateral surface of the conductive feature. In some embodiments, the lateral surface of the conductive feature is aligned with an edge of the insulating material.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: December 28, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chuei-Tang Wang, Vincent Chen, Tzu-Chun Tang, Chen-Hua Yu, Ching-Feng Yang, Ming-Kai Liu, Yen-Ping Wang, Kai-Chiang Wu, Shou Zen Chang, Wei-Ting Lin, Chun-Lin Lu
  • Patent number: 11121261
    Abstract: A semiconductor substrate includes a substrate, a first metal oxide semiconductor layer, a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer, and a second metal oxide semiconductor layer. The first transistor includes a first metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a first gate of the first conductive layer, a first source of the second conductive layer, and a first drain of the second conductive layer. The second transistor includes a second metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a second gate of the first conductive layer, a second source of the second conductive layer, a second drain of the second conductive layer, and a third metal oxide semiconductor pattern of the second metal oxide semiconductor layer.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: September 14, 2021
    Assignee: Au Optronics Corporation
    Inventors: Wei-Ting Lin, Dean Wang, Chun-Cheng Cheng
  • Publication number: 20210175924
    Abstract: A communication device is disclosed. The communication device includes a transceiver circuit, an echo canceler, and a processor. The transceiver circuit is configured to transmit a test signal to a channel. The echo canceler is configured to obtain a plurality of echo power of a reflected signal corresponding to the test signal. The processor is configured to obtain a plurality of positions on the channel according to a parameter value. The parameter value is N, a number of the plurality of positions is N, and the plurality of positions corresponds to the top N largest of the plurality of echo power. The echo canceler is further configured to eliminate part of the plurality of echo power corresponding to the plurality of positions according to the plurality of positions.
    Type: Application
    Filed: September 8, 2020
    Publication date: June 10, 2021
    Inventors: Wei-Ting LIN, Yuan-Jih CHU, Li-Chung CHEN, Hsin-Yun HU
  • Patent number: 11031496
    Abstract: A MOSFET includes a substrate, a trench, a bottom oxide, a shield poly, two gate polys and an inter-poly oxide. The trench is formed on the substrate. The bottom oxide is formed on the trench. The shield poly is formed on the trench, and a part of the bottom oxide is separated by the shield poly. The two gate polys are formed on the bottom oxide. The inter-poly oxide is formed between the two gate polys. The shield poly is staggered from at least one of the two gate polys in a horizontal direction and a vertical direction. Therefore, the capacitance between a source electrode and a gate electrode is effectively reduced, and the delay time during switching is shorten and the energy loss is reduced at the same time.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: June 8, 2021
    Assignee: MOSEL VITELIC INC.
    Inventors: Wei-Ting Lin, Chun-Sheng Chen
  • Patent number: 10900518
    Abstract: A linear guide apparatus may include a guide rail, a carriage block, at least two recirculating tubes, and two end covers. The carriage block has an axial sliding channel formed at a middle portion of a bottom surface thereof, and the carriage block is slidably coupled on the guide rail through the sliding channel. Each of two sides of the sliding channel has at least a sliding groove formed between the carriage block and guide rail. Each sliding groove comprises a plurality of rolling balls installed therein so as to enable the carriage block to slide forward and backward on the guide rail. Each of the sliding grooves is cooperated with a recirculating channel axially penetrating through the carriage block. Each of the recirculating tubes comprises a plurality of spiral threads to enable the rolling balls to have lateral roll at a specific angle when passing therethrough.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: January 26, 2021
    Inventor: Wei-Ting Lin
  • Publication number: 20210005750
    Abstract: A semiconductor substrate includes a substrate, a first metal oxide semiconductor layer, a first insulating layer, a first conductive layer, a second insulating layer, a second conductive layer, and a second metal oxide semiconductor layer. The first transistor includes a first metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a first gate of the first conductive layer, a first source of the second conductive layer, and a first drain of the second conductive layer. The second transistor includes a second metal oxide semiconductor pattern of the first metal oxide semiconductor layer, a second gate of the first conductive layer, a second source of the second conductive layer, a second drain of the second conductive layer, and a third metal oxide semiconductor pattern of the second metal oxide semiconductor layer.
    Type: Application
    Filed: February 5, 2020
    Publication date: January 7, 2021
    Applicant: Au Optronics Corporation
    Inventors: Wei-Ting Lin, Dean Wang, Chun-Cheng Cheng
  • Patent number: 10879140
    Abstract: Disclosed herein is a device having a shaped seal ring comprising a workpiece, the workpiece comprising at least one dielectric layer disposed on a first side of a substrate, a seal ring disposed in the at least one dielectric layer, and at least one groove in the seal ring. A lid is disposed over the workpiece, the workpiece extending into a recess in the lid and a first thermal interface material (TIM) contacts the seal ring and the lid, with the first TIM extending into the at least one groove. The workpiece is mounted to the package carrier. A die is mounted over a first side of workpiece and disposed in the recess. A first underfill a disposed under the die and a second underfill is disposed between the workpiece and the package carrier. The first TIM is disposed between the first underfill and the second underfill.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Yen Lin, Yu-Chih Liu, Chin-Liang Chen, Wei-Ting Lin, Kuan-Lin Ho