Patents by Inventor Wei-Ting Lin
Wei-Ting Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150093856Abstract: A method of manufacturing a WLP semiconductor structure includes several operations. One of the operations is providing a carrier and the carrier includes a top surface. One of the operations is covering a portion of the top surface with a plurality of active dies. One of the operations is disposing a protrudent band on a periphery of the carrier, wherein the protrudent band includes a rim shaped along the contour of the carrier. One of the operations is forming a molding compound on the carrier to cover the plurality of active dies.Type: ApplicationFiled: October 2, 2013Publication date: April 2, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: YU-CHIH LIU, CHANG-CHIA HUANG, SHIH-YEN LIN, CHIN-LIANG CHEN, KUAN-LIN HO, WEI-TING LIN
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Patent number: 8993378Abstract: A method for assembling a flip chip ball grid array package includes mounting solder spheres to a ball grid array substrate, applying flux to a plurality of flip chip solder bumps provided on a diced wafer, aligning the ball grid array substrate over a chip on the diced wafer, picking and separating the chip from the diced wafer by urging the chip upwards towards the ball grid array substrate until the flip chip solder bumps on the chip come in contact with the ball grid array substrate, whereby the chip attaches to the ball grid array substrate in an upside-down orientation, and subjecting the chip and the ball grid array substrate to a thermal process whereby the solder spheres reflow and form solder balls and the flip chip solder bumps reflow and form solder joints between the chip and the ball grid array.Type: GrantFiled: September 6, 2011Date of Patent: March 31, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yu-Chih Liu, Jing Ruei Lu, Wei-Ting Lin, Sao-Ling Chiu, Hsin-Yu Pan
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Publication number: 20150083312Abstract: A substrate bonding and debonding method includes the steps of: providing a substrate; forming a first silicone glue layer on a peel-off region of the substrate and a second silicone glue layer on a peripheral region of the substrate, in which the first and second silicone glue layers contain the same silicone main agent and silicone curing agent in a different ratio; adhering an opposite substrate to the first and second silicone glue layers; curing the first and second silicone glue layers to bond the substrate to the opposite substrate; and separating a portion of the substrate from the opposite substrate.Type: ApplicationFiled: January 29, 2014Publication date: March 26, 2015Applicant: AU Optronics CorporationInventors: Shuo-Yang SUN, Wan-Chen HUANG, Wei-Ting LIN, Chun-Cheng CHENG
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Patent number: 8979109Abstract: Shock absorbers for a bicycle has at least a pair of front suspensions and at least a pair of rear suspensions. The shock absorbers have a light weight and simple structure. The vibration, which occurs on the front and rear wheels can be absorbed by compression or expending movement of the suspensions.Type: GrantFiled: November 23, 2012Date of Patent: March 17, 2015Inventor: Wei-Ting Lin
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Publication number: 20150074627Abstract: A semiconductor device design method includes extracting voltage data associated with at least one electrical component in a layout of a semiconductor device and based on a result of a simulation of an operation of the semiconductor device. Based on location data of the at least one electrical component, the extracted voltage data is incorporated in the layout to generate a modified layout of the semiconductor device. One or more operations of the method are performed by at least one processor.Type: ApplicationFiled: November 13, 2014Publication date: March 12, 2015Inventors: Mu-Jen HUANG, Chih Chi HSIAO, Wei-Ting LIN, Tsung-Hsin YU, Chien-Wen CHEN, Yung-Chow PENG
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Publication number: 20150069089Abstract: An adhesive dispenser comprises a dispensing head. The dispensing head comprises an adhesive material applicator portion on a first level of the dispensing head. The adhesive material applicator portion corresponds to a periphery of a package. The dispensing head also comprises a thermal interface material (TIM) applicator portion on a second level of the dispensing head different from the first level. The TIM applicator portion corresponds to a die of the package. The dispensing head further comprises an adhesive material conduit configured to supply the adhesive material applicator portion with an adhesive material. The dispensing head additionally comprises a TIM conduit configured to supply the TIM applicator portion with a TIM.Type: ApplicationFiled: November 17, 2014Publication date: March 12, 2015Inventors: Chin-Liang CHEN, Wei-Ting LIN, Yu-Chih LIU, Kuan-Lin HO, Jason SHEN
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Publication number: 20150059159Abstract: An apparatus for manufacturing a semiconductor device includes a holder for holding a carrier and a supporting base for receiving the holder comprising a recess for accommodating a plurality of balls mounted on a surface of the carrier. Furthermore, a method of manufacturing a semiconductor device includes providing a carrier, providing an apparatus comprising a supporting base including a recess, holding the carrier on the supporting base and accommodating a plurality of balls mounted on a surface of the carrier in the recess.Type: ApplicationFiled: August 29, 2013Publication date: March 5, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: KUAN-LIN HO, CHIN-LIANG CHEN, WEI-TING LIN, YU-CHIH LIU, SHIH-YEN LIN
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Patent number: 8916419Abstract: A semiconductor package assembly process that includes attaching one or more dies to a substrate; applying an adhesive material on a periphery of the substrate by an adhesive dispenser having a stamp-type dispensing head; applying a thermal interface material (TIM) on a top surface of the die by a TIM dispenser having a stamp-type dispensing head; and positioning a lid over the one or more dies and placing the lid on top of the adhesive material and the TIM by a lid carrier to encapsulate the one or more dies.Type: GrantFiled: June 12, 2012Date of Patent: December 23, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Kuan-Lin Ho, Jason Shen
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Patent number: 8904326Abstract: In a semiconductor device design method performed by at least one processor, location data of at least one electrical component in a layout of a semiconductor device is extracted by the at least one processor. Voltage data associated with the at least one electrical component and based on a simulation of an operation of the semiconductor device is extracted by the at least one processor. Based on the extracted location data, the extracted voltage data is incorporated, by the at least one processor, in the layout to generate a modified layout of the semiconductor device.Type: GrantFiled: June 29, 2012Date of Patent: December 2, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Mu-Jen Huang, Chih Chi Hsiao, Wei-Ting Lin, Tsung-Hsin Yu, Chien-Wen Chen, Yung-Chow Peng
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Publication number: 20140191102Abstract: An adjustable stand holder includes a stand base including a base frame, an axle holder and a guide track arranged at the base frame at right angles, a cover member including a cover frame pivotally coupled to the axle holder and a smoothly curved stop flange raised from a front side of the cover frame for supporting a mobile electronic device on the cover frame, and a wheel receivable in the stand base and mountable between the base frame and cover frame to support the cover member in a tilted position relative to the stand base and movable along the guide track to adjust the tilting angle of the cover member relative to the stand base.Type: ApplicationFiled: January 10, 2013Publication date: July 10, 2014Applicant: CHEN-SOURCE INC.Inventor: Wei-Ting LIN
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Publication number: 20140145412Abstract: Shock absorbers for a bicycle has at least a pair of front suspensions and at least a pair of rear suspensions. The shock absorbers has a light weight and simple structure. The vibration occurs on the front and rear wheels can be absorbed by compression or expending movement of the suspensions.Type: ApplicationFiled: November 23, 2012Publication date: May 29, 2014Inventor: Wei-Ting Lin
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Publication number: 20140137952Abstract: A support rack includes a rack body providing a locating groove, two coupling structures, a hinged stop plate and transverse positioning grooves, a U-shaped support bar having two axle-shaped end portions respectively pivotally coupled to the coupling structures for supporting a tablet PC in one of a series of tilted positions to let the tablet PC be stopped against the stop plate or selectively positioned in one of the transverse positioning grooves, and a fan module mounted in the rack body for cooling the tablet PC, ultrabook or notebook being used with the support rack.Type: ApplicationFiled: November 19, 2012Publication date: May 22, 2014Applicant: CHEN-SOURCE INC.Inventor: Wei-Ting LIN
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Publication number: 20140119039Abstract: A vehicle light device includes a light source board and a light guide cover. The light source board include a plurality of light emitting diodes (LEDs) mounted thereon to emit a light. The light guide cover is disposed on the light source board and covering the LEDs to make the emitted light uniformly illuminated. The vehicle light device has a simple structure, which the LED lamp holder and the reflecting element are eliminated. Therefore, the structure of the vehicle light device is thin and reduced-volume, that is easy to mass-produce with cost down.Type: ApplicationFiled: December 20, 2012Publication date: May 1, 2014Inventor: Wei-Ting LIN
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Publication number: 20140092036Abstract: The invention provides a touch panel with a single electrode layer, which has a plurality of sensing channels. Each of the sensing channels includes a plurality of first transmission lines, a second transmission line and a plurality of first and second sensing electrodes on a substrate. The routing path of the first and second transmission lines routed on the substrate is non-straight. And, the first sensing electrodes and the second sensing electrodes include a plurality of first holes and second holes, respectively. The second sensing electrodes and the first sensing electrodes are disposed on the same side of the substrate. The geometric shapes of the first holes and the second holes correspond to the geometric shapes of the routing path of the first transmission lines and the second transmission line routed on the substrate. Thereby, the display quality can be improved by the touch panel of the present invention.Type: ApplicationFiled: March 15, 2013Publication date: April 3, 2014Applicant: GIANTPLUS TECHNOLOGY CO., LTD.Inventors: Wei-Ting LIN, Po-Hsien WANG
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Patent number: 8664039Abstract: Methods and apparatus for alignment in a flip chip bonding. A method includes attaching an integrated circuit having connector terminals to a bonding arm, the bonding arm having a chuck for attaching the integrated circuit at the backside surface, the bonding arm having a plurality of CCD imagers mounted thereon; receiving a substrate having pads corresponding to the connector terminals; using the bonding arm, positioning the integrated circuit proximal to the substrate; aligning the integrated circuit connector terminals with the pads on the substrate using the CCD imagers on the bonding arm; positioning the connector terminals in contact with the pads on the substrate; and performing a solder reflow to attach the integrated circuit to the substrate. An apparatus includes a bonding arm with a chuck for carrying a component and CCD imagers mounted on the arm for alignment.Type: GrantFiled: October 18, 2011Date of Patent: March 4, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Chung Sung, Yu-Chih Liu, Wei-Ting Lin, Chien-Hsiun Lee
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Patent number: 8652939Abstract: Methods and apparatus for die assembly. A method includes forming a trench extending from an active surface of a semiconductor substrate comprising a plurality of integrated circuit dies having connector terminals extending from the active surface, the trench extending into, but not through, the semiconductor substrate; forming a protective layer overlying the active surface of the semiconductor substrate and the trench, and covering the lower portion of the connector terminals; opening a pre-dicing opening in the protective layer and within the trench; applying a tape over the active surface of the semiconductor wafer, the protective layer and the connector terminals; and performing an operation on a backside of the semiconductor substrate to remove material until the pre-dicing opening is exposed on the backside of the semiconductor wafer. An apparatus includes a semiconductor substrate with integrated circuits and a protective layer surrounding connector terminals of integrated circuits.Type: GrantFiled: October 18, 2011Date of Patent: February 18, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Chung Sung, Yu-Chih Liu, Wei-Ting Lin, Chien-Hsiun Lee
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Patent number: 8643006Abstract: A thin film transistor is provided. The thin film transistor includes a substrate, a gate, a gate insulating layer, a source and a drain, a channel layer, and first and second patterned passivation layers. The gate is disposed on the substrate. The gate insulating layer is disposed on the gate. The source and the drain are disposed on the gate insulating layer. The channel layer is disposed above or under the source and the drain, wherein a portion of the channel layer is exposed between the source and the drain. The first patterned passivation layer is disposed on the portion of the channel layer, wherein the first patterned passivation layer includes metal oxide, and the first patterned passivation layer has a thickness ranging from 50 angstroms to 300 angstroms. The second patterned passivation layer covers the first patterned passivation layer, the gate insulating layer, and the source and the drain.Type: GrantFiled: June 20, 2011Date of Patent: February 4, 2014Assignee: Au Optronics CorporationInventors: Chia-Hsiang Chen, Ming-Chin Hung, Chun-Hao Tu, Wei-Ting Lin, Jiun-Jye Chang
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Publication number: 20140007031Abstract: In a semiconductor device design method performed by at least one processor, location data of at least one electrical component in a layout of a semiconductor device is extracted by the at least one processor. Voltage data associated with the at least one electrical component and based on a simulation of an operation of the semiconductor device is extracted by the at least one processor. Based on the extracted location data, the extracted voltage data is incorporated, by the at least one processor, in the layout to generate a modified layout of the semiconductor device.Type: ApplicationFiled: June 29, 2012Publication date: January 2, 2014Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Mu-Jen HUANG, Chih Chi HSIAO, Wei-Ting LIN, Tsung-Hsin YU, Chien-Wen CHEN, Yung-Chow PENG
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Patent number: 8609460Abstract: A semiconductor structure and a fabricating method thereof are provided. The fabricating method includes forming a gate, a source, and a drain on a substrate and forming an oxide semiconductor material between the gate and the source and drain. The oxide semiconductor material is formed by performing a deposition process, and nitrogen gas is introduced before the deposition process is completely performed, so as to form oxide semiconductor nitride on the oxide semiconductor material.Type: GrantFiled: April 18, 2011Date of Patent: December 17, 2013Assignee: Au Optronics CorporationInventors: Po-Tsun Liu, Yi-Teh Chou, Li-Feng Teng, Fu-Hai Li, Han-Ping D. Shieh, Wei-Ting Lin, Ming-Chin Hung, Chun-Ching Hsiao, Jiun-Jye Chang, Po-Lun Chen
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Publication number: 20130260511Abstract: A semiconductor package assembly process that includes attaching one or more dies to a substrate; applying an adhesive material on a periphery of the substrate by an adhesive dispenser having a stamp-type dispensing head; applying a thermal interface material (TIM) on a top surface of the die by a TIM dispenser having a stamp-type dispensing head; and positioning a lid over the one or more dies and placing the lid on top of the adhesive material and the TIM by a lid carrier to encapsulate the one or more dies.Type: ApplicationFiled: June 12, 2012Publication date: October 3, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chin-Liang CHEN, Wei-Ting LIN, Yu-Chih LIU, Kuan-Lin HO, Jason SHEN