Patents by Inventor Wei-Ting Lin

Wei-Ting Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160071744
    Abstract: Some embodiments of the present disclosure provide a method of manufacturing a device. The method includes providing a carrier, the carrier including a top surface, covering a portion of the top surface with a plurality of active dies, disposing a protrudent band over a periphery of the carrier, wherein the protrudent band includes a rim shaped along the contour of the carrier, and forming a molding compound over the carrier to cover the plurality of active dies. A method for determining a width of the protrudent band of a device described herein is also provided.
    Type: Application
    Filed: November 10, 2015
    Publication date: March 10, 2016
    Inventors: YU-CHIH LIU, CHANG-CHIA HUANG, SHIH-YEN LIN, CHIN-LIANG CHEN, KUAN-LIN HO, WEI-TING LIN
  • Patent number: 9278512
    Abstract: A substrate bonding and debonding method includes the steps of: providing a substrate; forming a first silicone glue layer on a peel-off region of the substrate and a second silicone glue layer on a peripheral region of the substrate, in which the first and second silicone glue layers contain the same silicone main agent and silicone curing agent in a different ratio; adhering an opposite substrate to the first and second silicone glue layers; curing the first and second silicone glue layers to bond the substrate to the opposite substrate; and separating a portion of the substrate from the opposite substrate.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: March 8, 2016
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Shuo-Yang Sun, Wan-Chen Huang, Wei-Ting Lin, Chun-Cheng Cheng
  • Publication number: 20150357318
    Abstract: Chip packages and methods of manufacture thereof are disclosed. In some embodiments, a method of manufacturing a chip package includes: stacking a second chip on a first chip, wherein a first interconnect including a support structure and a bonding structure is disposed between the first chip and the second chip; bonding the first chip and the second chip via a thermal process applied to the bonding structure of the first interconnect; stacking a third chip on the second chip, wherein a second interconnect including a support structure and a bonding structure is disposed between the second chip and the third chip; bonding the second chip and the third chip via the thermal process applied to the bonding structure of the second interconnect; and reflowing the bond between the first and second chips and simultaneously reflowing the bond between the second and third chips.
    Type: Application
    Filed: June 6, 2014
    Publication date: December 10, 2015
    Inventors: Chin-Liang Chen, Yu-Chih Liu, Kuan-Lin Ho, Wei-Ting Lin, Shih-Yen Lin
  • Publication number: 20150357309
    Abstract: Embodiments relate to packages and methods of forming packages. A package includes a package substrate, a first device die, first electrical connectors, an encapsulant, a redistribution structure, and a second device die. The first device die is attached to a side of the package substrate, and the first electrical connectors are mechanically and electrically coupled to the side of the package substrate. The encapsulant at least laterally encapsulates the first electrical connectors and the first device die. The redistribution structure is on the encapsulant and the first electrical connectors. The redistribution structure is directly coupled to the first electrical connectors. The first device die is disposed between the redistribution structure and the package substrate. The second device die is attached to the redistribution structure by second electrical connectors, and the second electrical connectors are directly coupled to the redistribution structure.
    Type: Application
    Filed: June 6, 2014
    Publication date: December 10, 2015
    Inventors: Yu-Chih Liu, Kuan-Lin Ho, Wei-Ting Lin, Chin-Liang Chen, Jing Ruei Lu
  • Publication number: 20150355745
    Abstract: The present invention relates to a touch module and a method of fabricating the touch module. The method comprises: providing a substrate plate, applying an adhesive layer on the substrate plate, forming a sensing line trough and a peripheral line trough on the adhesive layer, forming a first conductive layer in the sensing line trough and a second conductive layer in the peripheral line trough, wherein the first conductive layer in the sensing line trough serves as a sensing line, covering an anti acid film on the sensing line trough, electroplating an electroplated layer on the second conductive layer in the peripheral line trough, wherein the electroplated layer plus the second conductive layer serve as a peripheral line, and removing the anti acid film. Comparing to the prior art, the invention reduces the width of the peripheral line, lowers the resistance of the peripheral line, and improves yield rate.
    Type: Application
    Filed: June 5, 2014
    Publication date: December 10, 2015
    Inventors: Wei-Ting Lin, Yung-Shin Liou
  • Patent number: 9209046
    Abstract: A method of manufacturing a WLP semiconductor structure includes several operations. One of the operations is providing a carrier and the carrier includes a top surface. One of the operations is covering a portion of the top surface with a plurality of active dies. One of the operations is disposing a protrudent band on a periphery of the carrier, wherein the protrudent band includes a rim shaped along the contour of the carrier. One of the operations is forming a molding compound on the carrier to cover the plurality of active dies.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: December 8, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Chih Liu, Chang-Chia Huang, Shih-Yen Lin, Chin-Liang Chen, Kuan-Lin Ho, Wei-Ting Lin
  • Publication number: 20150286141
    Abstract: The present invention relates to a method of forming a line pattern on a substrate. The method comprises steps as follows: providing a substrate plate; forming a photoresist pattern on a predetermined surface of the substrate plate; applying a coating film to the predetermined surface of the substrate plate and the photoresist pattern; and removing the photoresist pattern to form the line pattern. The manufacturing process of the invention doesn't require etching. Comparing to the prior art, the invention reduces cost and improves yield rate.
    Type: Application
    Filed: April 3, 2014
    Publication date: October 8, 2015
    Applicant: Top Victory Investments Ltd.
    Inventors: Wei-Ting Lin, Yung-Shin Liou
  • Publication number: 20150277615
    Abstract: The present invention provides a touch module and a display device using the same. The touch module comprises a plastic substrate plate, a first line pattern, an optical substrate, and a second line patter. The first line pattern is formed on the plastic substrate plate. The optical substrate is adjacent to the plastic substrate plate and covers on the first line pattern. The second line pattern is adjacent to the optical substrate. The first and the second line patterns are not connected to each other. The invention replaces glass with the plastic substrate. Comparing to the prior art, the invention reduces weight and cost and increases the durability.
    Type: Application
    Filed: March 25, 2014
    Publication date: October 1, 2015
    Applicant: Top Victory Investments Ltd.
    Inventors: Wei-Ting LIN, William CHENG, Yung-Shin LlOU
  • Patent number: 9147584
    Abstract: A system for and a method of curing a material is provided. A material, such as an underfill material, is rotated during a curing process. The curing system may include a chamber, a holder to support one or more workpieces, and a rotating mechanism. The rotating mechanism rotates the workpieces during the curing process. The chamber may include one or more heat sources and fans, and may further include a controller. The curing process may include varying the rotation speed, continuously rotating, periodically rotating, or the like.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: September 29, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jing Ruei Lu, Yu-Chih Liu, Ming-Chung Sung, Wei-Ting Lin, Chien-Kuo Chang
  • Patent number: 9142719
    Abstract: A patterned substrate for epitaxially forming a light-emitting diode includes: a top surface; a plurality of spaced apart recesses, each of which is indented downwardly from the top surface and each of which is defined by a recess-defining wall, the recess-defining wall having a bottom wall face, and a surrounding wall face that extends from the bottom wall face to the top surface; and a plurality of protrusions, each of which protrudes upwardly from the bottom wall face of the recess-defining wall of a respective one of the recesses. A light-emitting diode having the patterned substrate is also disclosed.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: September 22, 2015
    Assignee: NATIONAL CHUNG-HSING UNIVERSITY
    Inventors: Dong-Sing Wuu, Ray-Hua Horng, Wei-Ting Lin
  • Patent number: 9142523
    Abstract: A semiconductor device includes a carrier, a die including a first surface and a second surface, a plurality of first conductive bumps disposed between the second surface of the carrier and the die, wherein the die is flip bonded on the carrier, and a molding disposed over the carrier and surrounding the die, wherein the molding includes a recessed portion disposed on the first surface of the die thereby leaving a portion of the first surface is uncovered by the molding. Further, a method of manufacturing a semiconductor device includes providing a carrier, flip bonding a die on the carrier, disposing a rubber material on a first surface of the die and within the first surface of the die, and forming a molding surrounding the rubber material and covering the carrier.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: September 22, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yu-Chih Liu, Chun-Cheng Lin, Wei-Ting Lin, Kuan-Lin Ho, Chin-Liang Chen, Shih-Yen Lin
  • Publication number: 20150250318
    Abstract: A body-shaping support structure includes a main body and a flexible body. The main body includes a shaping section. The shaping section is in a concave configuration. The main body has at least a portion including an elastic material and forming at least one adjustment gap to form a branch section and an adjustment section. The branch section is elastically deformable for adjustment. The flexible body is set to extend through and interlace the branch section and the adjustment section. The branch section is deformable and movable to achieve adjustment of the size of the shaping section. The flexible body connects the branch section and the adjustment section to each other so as to maintain effective fixation of the shaping section without changing the shape. The shaping section can receive a predetermined human body portion to be positioned thereon to enhance an effect of supporting and shaping the human body.
    Type: Application
    Filed: February 26, 2015
    Publication date: September 10, 2015
    Inventor: Wei-Ting Lin
  • Publication number: 20150214074
    Abstract: Packaging methods for semiconductor devices, and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes coupling a ring to a substrate, and coupling an integrated circuit die to the substrate within the ring. A molding material is disposed around the integrated circuit die within the ring.
    Type: Application
    Filed: July 17, 2014
    Publication date: July 30, 2015
    Inventors: Yu-Chih Liu, Chien-Kuo Chang, Wei-Ting Lin, Kuan-Lin Ho, Chin-Liang Chen, Shih-Yen Lin
  • Publication number: 20150214128
    Abstract: Disclosed herein is a device having a shaped seal ring comprising a workpiece, the workpiece comprising at least one dielectric layer disposed on a first side of a substrate, a seal ring disposed in the at least one dielectric layer, and at least one groove in the seal ring. A lid is disposed over the workpiece, the workpiece extending into a recess in the lid and a first thermal interface material (TIM) contacts the seal ring and the lid, with the first TIM extending into the at least one groove. The workpiece is mounted to the package carrier. A die is mounted over a first side of workpiece and disposed in the recess. A first underfill a disposed under the die and a second underfill is disposed between the workpiece and the package carrier. The first TIM is disposed between the first underfill and the second underfill.
    Type: Application
    Filed: January 24, 2014
    Publication date: July 30, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yen Lin, Yu-Chih Liu, Chin-Liang Chen, Wei-Ting Lin, Kuan-Lin Ho
  • Publication number: 20150205421
    Abstract: A capacitive-type touch control display includes: a rear plate including a first polarizer sheet and a TFT array layer; a front plate including a color filter layer, a second polarizer sheet, an adhesive layer, a transparent touch sensor layer adhesively bonded to the second polarizer sheet through the adhesive layer, and a transparent hard coating layer formed on the touch sensor layer; a liquid crystal cell; and a housing including a main body and an end flange. The main body has an open end. The end flange extends inwardly and transversely from the open end, and defines a front window that exposes a touch sensing region of the touch sensor layer underneath the hard coating layer. The end flange covers a peripheral region of the touch sensor layer.
    Type: Application
    Filed: January 23, 2014
    Publication date: July 23, 2015
    Applicant: Top Victory Investments Limited
    Inventors: Wei-Ting LIN, Yung-Shin LIOU
  • Patent number: 9075466
    Abstract: The invention provides a touch panel with a single electrode layer, which has a plurality of sensing channels. Each of the sensing channels includes a plurality of first transmission lines, a second transmission line and a plurality of first and second sensing electrodes on a substrate. The routing path of the first and second transmission lines routed on the substrate is non-straight. And, the first sensing electrodes and the second sensing electrodes include a plurality of first holes and second holes, respectively. The second sensing electrodes and the first sensing electrodes are disposed on the same side of the substrate. The geometric shapes of the first holes and the second holes correspond to the geometric shapes of the routing path of the first transmission lines and the second transmission line routed on the substrate. Thereby, the display quality can be improved by the touch panel of the present invention.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 7, 2015
    Assignee: Giantplus Technology Co., Ltd.
    Inventors: Wei-Ting Lin, Po-Hsien Wang
  • Publication number: 20150187734
    Abstract: A method includes bonding a first device die onto a top surface of a package substrate, and performing an expose molding on the first device die and the package substrate. At least a lower portion of the first device die is molded in a molding material. A top surface of the molding material is level with or higher than a top surface of the first device die. After the expose molding, a second device die is bonded onto a top surface of the first device die. The second device die is electrically coupled to the first device die through through-silicon vias in a semiconductor substrate of the first device die.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 2, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Chih Liu, Hai-Ming Chen, Wei-Ting Lin, Jing Ruei Lu, Tsung-Ding Wang
  • Publication number: 20150179607
    Abstract: A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.
    Type: Application
    Filed: December 20, 2013
    Publication date: June 25, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Lin Ho, Chin-Liang Chen, Wei-Ting Lin, Yu-Chih Liu, Shih-Yen Lin
  • Publication number: 20150155221
    Abstract: The present disclosure relates to an integrated chip package having a plurality of different adhesive layers that provide for a low lid induced stress good warpage control of a substrate and/or IC die, and an associated method of formation. The integrated chip package has an integrated chip (IC) die coupled to an underlying substrate by an electrically conductive interconnect structure. A first adhesive layer, having a first Young's modulus, is disposed onto the substrate at a first plurality of positions surrounding the IC die. A second adhesive layer, having a second Young's modulus different than the first Young's modulus, is disposed onto the substrate at a second plurality of positions surrounding the IC die. A lid is affixed to the substrate by the first and second adhesive layers and extends to a position overlying the IC die.
    Type: Application
    Filed: December 2, 2013
    Publication date: June 4, 2015
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-Liang Chen, Wei-Ting Lin, Kuan-Lin Ho, Yu-Chih Liu, Chun-Cheng Lin, Shih-Yen Lin
  • Publication number: 20150145115
    Abstract: A semiconductor device includes a carrier, a die including a first surface and a second surface, a plurality of first conductive bumps disposed between the second surface of the carrier and the die, wherein the die is flip bonded on the carrier, and a molding disposed over the carrier and surrounding the die, wherein the molding includes a recessed portion disposed on the first surface of the die thereby leaving a portion of the first surface is uncovered by the molding. Further, a method of manufacturing a semiconductor device includes providing a carrier, flip bonding a die on the carrier, disposing a rubber material on a first surface of the die and within the first surface of the die, and forming a molding surrounding the rubber material and covering the carrier.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Applicant: TAIWAN SEMICOMDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: YU-CHIH LIU, CHUN-CHENG LIN, WEI-TING LIN, KUAN-LIN HO, CHIN-LIANG CHEN, SHIH-YEN LIN