Patents by Inventor Wei Tsai

Wei Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984508
    Abstract: A thin film transistor includes an active layer and at least one gate stack. The active layer may be formed using multiple iterations of a unit layer stack deposition process, which includes an acceptor-type oxide deposition process and a post-transition metal oxide deposition process. A surface of each gate dielectric within the at least one gate stack contacts a surface of a respective layer of the oxide of the acceptor-type element so that leakage current of the active layer may be minimized. A source electrode and a drain electrode may contact an oxide layer providing lower contact resistance such as a layer of the post-transition metal oxide or a zinc oxide layer within the active layer.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: May 14, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Wu-Wei Tsai, Po-Ting Lin, Hai-Ching Chen, Chung-Te Lin
  • Patent number: 11984668
    Abstract: A device includes a patch antenna, which includes a feeding line, and a ground panel over the feeding line. The ground panel has an aperture therein. A low-k dielectric module is over and aligned to the aperture. A patch is over the low-k dielectric module.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Monsen Liu, Lai Wei Chih, Chung-Hao Tsai, Jeng-Shien Hsieh, En-Hsiang Yeh, Chuei-Tang Wang
  • Patent number: 11983267
    Abstract: A data processing method based on Trojan circuit detection includes controlling a processor, in a testing stage, to perform following steps: obtaining a plurality of characteristic values corresponding to a logic gate circuit; performing a distribution adjustment operation on the characteristic values to generate a plurality of adjusted characteristic values; and performing classification on the adjusted characteristic values to generate a logic identification result.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: May 14, 2024
    Assignee: INSTITUTE FOR INFORMATION INDUSTRY
    Inventors: Jian Wei Liao, Ting Yu Lin, Kai Chiang Wu, Jung Che Tsai
  • Publication number: 20240153916
    Abstract: A semiconductor device includes a bottom semiconductor die including a bottom semiconductor die sidewall, a top semiconductor die bonded to the bottom semiconductor die and including a top semiconductor die sidewall, and a molding material layer formed on an upper surface of the bottom semiconductor die, on the top semiconductor die sidewall, and on the bottom semiconductor die sidewall. A method of forming a semiconductor device includes mounting a bottom semiconductor die including a bottom semiconductor die sidewall on a carrier substrate, mounting a top semiconductor die including a top semiconductor die sidewall on the bottom semiconductor die, and forming a molding material layer on an upper surface of the bottom semiconductor die, on the top semiconductor die sidewall, and on the bottom semiconductor die sidewall.
    Type: Application
    Filed: April 21, 2023
    Publication date: May 9, 2024
    Inventors: Tsung-Fu TSAI, Chen-Hua YU, Szu-Wei LU
  • Publication number: 20240155658
    Abstract: Various solutions for capability reporting to support small data transmission (SDT) on a bandwidth part (BWP) for user equipment (UE) are described. An apparatus may transmit UE capability information to a wireless node of a wireless network. The UE capability information may indicate that the apparatus supports using a BWP with a condition of synchronization signal block (SSB) association for SDT. The apparatus may also receive a configuration associated with the BWP for SDT from the wireless node. The configuration may be configured based on the UE capability information. The apparatus may further initiate an SDT procedure on the BWP according to the configuration.
    Type: Application
    Filed: September 27, 2023
    Publication date: May 9, 2024
    Inventor: Chiou-Wei Tsai
  • Publication number: 20240153896
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Publication number: 20240148262
    Abstract: Apparatuses and methods for calculating heart rate are disclosed herein. The apparatus can include a processor configured to calculate heart rate information. The processor includes a heart rate calculator including a memory configured to store a PPG signal and a calculation element coupled to the memory and configured to calculate a heart rate value and generate at least one quality checking factor according to the PPG signal. The processor also includes a checking element configured to determine a validity indicator according to the at least one quality checking factor, a memory control element coupled to the memory and configured to access the memory to transmit the PPG signal, and a multiplexer configured to output the PPG signal accessed by the memory control element or the heart rate value calculated by the calculation element according to the validity indicator.
    Type: Application
    Filed: August 26, 2023
    Publication date: May 9, 2024
    Inventors: Jui-Wei Tsai, Kai-Wei Chiu, Chih-Wei Yeh
  • Publication number: 20240154763
    Abstract: Various solutions for supporting an advanced mobile communication system with enhanced channel designs are described. An apparatus may select a first number of resource blocks (RBs) from a second number of RBs on a physical broadcast channel (PBCH) in an event that the apparatus is operating in a frequency band with a transmission bandwidth less than a threshold. Then, the apparatus may perform a PBCH transmission to a user equipment (UE) based on the first number of RBs.
    Type: Application
    Filed: October 12, 2023
    Publication date: May 9, 2024
    Inventors: Chiou-Wei Tsai, Wei-De Wu
  • Patent number: 11978782
    Abstract: The present disclosure relates to a hybrid integrated circuit. In one implementation, an integrated circuit may have a first region with a first gate structure having a ferroelectric gate dielectric, at least one source associated with the first gate of the first region, and at least one drain associated with the first gate structure of the first region. Moreover, the integrated circuit may have a second region with a second gate structure having a high-? gate dielectric, at least one source associated with the second gate structure of the second region, and at least one drain associated with the second gate structure of the second region. The integrated circuit may further have at least one trench isolation between the first region and the second region.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Yi Chuang, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11978675
    Abstract: A semiconductor device includes a gate structure disposed over a channel region, and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, a first work function adjustment layer, over the gate dielectric layer, a first shield layer over the first work function adjustment layer, a first barrier layer, and a metal gate electrode layer. The first work function adjustment layer is made up of n-type work function adjustment layer and includes aluminum. The first shield layer is made of at least one selected from the group consisting of metal, metal nitride, metal carbide, silicide, a layer containing one or more of F, Ga, In, Zr, Mn and Sn, and an aluminum containing layer having a lower aluminum concentration than the first work function adjustment layer.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chandrashekhar Prakash Savant, Chia-Ming Tsai, Ming-Te Chen, Tien-Wei Yu
  • Publication number: 20240145570
    Abstract: A semiconductor device includes a gate structure disposed over a channel region and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, one or more work function adjustment material layers over the gate dielectric layer, and a metal gate electrode layer over the one or more work function adjustment material layers. The one or more work function adjustment layers includes an aluminum containing layer, and a diffusion barrier layer is disposed at at least one of a bottom portion and a top portion of the aluminum containing layer. The diffusion barrier layer is one or more of a Ti-rich layer, a Ti-doped layer, a Ta-rich layer, a Ta-doped layer and a Si-doped layer.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shahaji B. MORE, Chandrashekhar Prakash SAVANT, Tien-Wei YU, Chia-Ming TSAI
  • Publication number: 20240145632
    Abstract: A micro light emitting device includes an epitaxial structure, a conductive layer, and a first insulating layer. The epitaxial structure has a first surface and a second surface opposite to the first surface, and includes a first semiconductor layer, an active layer and a second semiconductor layer that are arranged in such order in a direction from the first surface to the second surface. The conductive layer is formed on a surface of the first semiconductor layer away from the active layer. The first insulating layer is formed on the surface of the first semiconductor layer away from the active layer, and exposes at least a part of the conductive layer.
    Type: Application
    Filed: October 23, 2023
    Publication date: May 2, 2024
    Inventors: Ming-Chun TSENG, Shaohua HUANG, Hongwei WANG, Kang-Wei PENG, Su-Hui LIN, Xiaomeng LI, Chi-Ming TSAI, Chung-Ying CHANG
  • Publication number: 20240145403
    Abstract: An electronic package is provided, in which electronic elements and at least one packaging module including a semiconductor chip and a shielding structure covering the semiconductor chip are disposed on a carrier structure, an encapsulation layer encapsulates the electronic elements and the packaging module, and a shielding layer is formed on the encapsulation layer and in contact with the shielding structure. Therefore, the packaging module includes the semiconductor chip and the shielding structure and has a chip function and a shielding wall function simultaneously.
    Type: Application
    Filed: February 6, 2023
    Publication date: May 2, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien CHIU, Wen-Jung TSAI, Chih-Chiang HE, Ko-Wei CHANG, Chia-Yang CHEN
  • Publication number: 20240147711
    Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: PERNG-FEI YUH, YIH WANG, MENG-SHENG CHANG, JUI-CHE TSAI, KU-FENG LIN, YU-WEI LIN, KEH-JENG CHANG, CHANSYUN DAVID YANG, SHAO-TING WU, SHAO-YU CHOU, PHILEX MING-YAN FAN, YOSHITAKA YAMAUCHI, TZU-HSIEN YANG
  • Publication number: 20240139262
    Abstract: The present disclosure relates to a complex probiotic composition and a method for improving exercise performance of a subject with low intrinsic aerobic exercise capacity. The complex probiotic composition, which includes Lactobacillus rhamnosus GKLC1, Bifidobacterium lactis GKK24 and Clostridium butyricum GKB7, administered to the subject with the low intrinsic aerobic exercise capacity in a continuation period, can effectively reduce serum lactic acid and serum urea nitrogen after aerobic exercise, reduce proportion of offal fat and/or increase liver and muscle glycogen contents, thereby being as an effective ingredient for preparation of various compositions.
    Type: Application
    Filed: October 13, 2023
    Publication date: May 2, 2024
    Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shih-Wei LIN, Yen-Po CHEN, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, You-Shan TSAI, Zi-He WU
  • Publication number: 20240141505
    Abstract: A gas permeable metal with a porosity gradient and a method of manufacturing the same are provided. A second lamination layer and a third lamination layer are respectively connected to two opposite sides of a first lamination layer. A pore diameter of the first lamination layer is larger than that of the second lamination layer. Thereby while being applied to molds, a mold cavity is mounted in the second lamination layer with smaller pore diameter so that products formed have fine and smooth surfaces. The arrangement of the first lamination layer with larger pore diameter is used for effective escape of gas generated during product production process. According to production requirements for products, a pore diameter of the third lamination layer can be adjusted to be not larger than that of the first lamination layer. Thus mechanical strength and gas exhaust capacity can be balanced.
    Type: Application
    Filed: December 7, 2022
    Publication date: May 2, 2024
    Inventors: MENG-HSIU TSAI, CHUN-WEI CHIU
  • Publication number: 20240144305
    Abstract: A method for allocating perishable products based on machine learning, includes using a sales estimation model to evaluate estimated sales of a plurality of perishable products in a predetermined period, using a rating model to calculate a predetermined rate of the plurality of perishable products in the predetermined period according to the estimated sales, using an allocation model to adjust an allocation ratio of the plurality of perishable products in a plurality of marketing channels according to the estimated sales and the predetermined rate if a current rate is lower than the predetermined rate, and determining the numbers of perishable products allocated to the plurality of marketing channels according to the allocation ratio.
    Type: Application
    Filed: December 27, 2022
    Publication date: May 2, 2024
    Applicant: DUN-QIAN Intelligent Technology Co., Ltd.
    Inventors: Yen-Chu Chen, Ling-Jung Lin, Shao-Chen Liu, Hsuan-Wei Chen, Shuh-Shian Tsai
  • Publication number: 20240147432
    Abstract: Various solutions for supporting small data transmission (SDT) on a bandwidth part (BWP) with non-cell-defining synchronization signal block (NCD-SSB) are described. An apparatus may receive a configuration from a wireless node of a wireless network. The configuration indicates one or more non-cell-defining synchronization signal blocks (NCD-SSBs) associated with a BWP for SDT. The apparatus may initiate an SDT procedure on the BWP according to the configuration.
    Type: Application
    Filed: September 27, 2023
    Publication date: May 2, 2024
    Inventor: Chiou-Wei Tsai
  • Publication number: 20240145878
    Abstract: An electrode structure of rechargeable battery includes a battery tab stack, an electrode lead, a welding protective layer and a welding seam. The battery tab stack is formed by extension of a plurality of electrode sheets. The electrode lead is joined to one side of the battery tab stack. The welding protective layer is joined to another side of the battery tab stack opposite to the electrode lead. The welding seam extends from the welding protective layer to the electrode lead through the battery tab stack.
    Type: Application
    Filed: November 29, 2022
    Publication date: May 2, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kun-Tso CHEN, Tsung-Ying TSAI, Tsai-Chun LEE, Chih-Wei CHIEN, Hui-Ta CHENG
  • Patent number: 11969448
    Abstract: A probiotic composition for improving an effect of a chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is disclosed in the present disclosure. The probiotic composition comprises an effective amount of Lactobacillus paracasei GMNL-133, an effective amount of Lactobacillus reuteri GMNL-89, and a pharmaceutically acceptable carrier, wherein the Lactobacillus paracasei GMNL-133 was deposited in the China Center for Type Culture Collection on Sep. 26, 2011 under an accession number CCTCC NO. M 2011331, and the Lactobacillus reuteri GMNL-89 was deposited in the China Center for Type Culture Collection on Nov. 19, 2007 under an accession number CCTCC NO. M 207154. A method for improving the effect of the chemotherapeutic drug of Gemcitabine on inhibiting pancreatic cancer is further disclosed in the present disclosure.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: April 30, 2024
    Assignee: GENMONT BIOTECH INC.
    Inventors: Wan-Hua Tsai, I-ling Hsu, Shan-ju Hsu, Wen-ling Yeh, Ming-shiou Jan, Wee-wei Chieng, Li-jin Hsu, Ying-chun Lai