Patents by Inventor Wei Tsai

Wei Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250142890
    Abstract: A thin film transistor includes a stack of an active layer, a gate dielectric, and a gate electrode in a forward order or in a reverse order. The active layer includes a compound semiconductor material containing oxygen, at least one acceptor-type element selected from Ga and W, and at least one heavy post-transition metal element selected from In and Sn. An atomic percentage of the at least one heavy post-transition metal element at a first surface portion of the active layer that contacts the gate dielectric is higher than an atomic percentage of the at least one heavy post-transition metal element at a second surface portion of the active layer located on an opposite side of the gate dielectric. The front channel current may be increased, and the back channel leakage current may be decreased.
    Type: Application
    Filed: January 5, 2025
    Publication date: May 1, 2025
    Inventors: Wu-Wei Tsai, Hai-Ching Chen, Po-Ting Lin
  • Publication number: 20250133808
    Abstract: Aspects of the disclosure provide a method for forming a fin field effect transistor (FinFET) incorporating a fin top hardmask on top of a channel region of a fin. Because of the presence of the fin top hardmask, a gate height of the FinFET can be reduced without affecting proper operations of vertical gate channels on sidewalls of the fin. Consequently, parasitic capacitance between a gate stack and source/drain contacts of the FinFET can be reduced by lowering the gate height of the FinFET.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 24, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Cheng CHING, Kai-Chieh YANG, Ching-Wei TSAI, Kuan-Lun CHENG, Chih-Hao WANG
  • Publication number: 20250120166
    Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary method comprises forming a first stack structure and a second stack structure in a first area over a substrate, wherein each of the stack structures includes semiconductor layers separated and stacked up; depositing a first interfacial layer around each of the semiconductor layers of the stack structures; depositing a gate dielectric layer around the first interfacial layer; forming a dipole oxide layer around the gate dielectric layer; removing the dipole oxide layer around the gate dielectric layer of the second stack structure; performing an annealing process to form a dipole gate dielectric layer for the first stack structure and a non-dipole gate dielectric layer for the second stack structure; and depositing a first gate electrode around the dipole gate dielectric layer of the first stack structure and the non-dipole gate dielectric layer of the second stack structure.
    Type: Application
    Filed: December 16, 2024
    Publication date: April 10, 2025
    Inventors: Chung-Wei Hsu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Hou-Yu Chen, Ching-Wei Tsai, Chih-Hao Wang, Lung-Kun Chu, Mao-Lin Huang, Jia-Ni Yu
  • Patent number: 12274070
    Abstract: A memory device and a manufacturing method thereof is described. The memory device includes a transistor structure over a substrate and a ferroelectric capacitor structure electrically connected with the transistor structure. The ferroelectric capacitor structure includes a top electrode layer, a bottom electrode layer and a ferroelectric stack sandwiched there-between. The ferroelectric stack includes a first ferroelectric layer, a first stabilizing layer, and one of a second ferroelectric layer or a second stabilizing layer. Materials of the first stabilizing layer and a second stabilizing layer include a metal oxide material.
    Type: Grant
    Filed: July 4, 2022
    Date of Patent: April 8, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Po-Ting Lin, Wei-Chih Wen, Kai-Wen Cheng, Wu-Wei Tsai, Yu-Ming Hsiang, Yan-Yi Chen, Hai-Ching Chen, Yu-Ming Lin, Chung-Te Lin
  • Patent number: 12272751
    Abstract: A semiconductor device includes a substrate. The semiconductor device includes a dielectric layer disposed over a portion of the substrate. The semiconductor device includes a diffusion blocking layer disposed over the dielectric layer. The diffusion blocking layer and the dielectric layer have different material compositions. The semiconductor device includes a ferroelectric layer disposed over the diffusion blocking layer.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: April 8, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hsing Hsu, Ching-Wei Tsai, Kuan-Lun Cheng, Chih-Hao Wang, Sai-Hooi Yeong
  • Publication number: 20250112004
    Abstract: A keycap support mechanism increases the stability of supporting a keycap through structure designs of supports. Two supports are pivotally connected around a pivot axis. One of the supports includes a support body and a reinforcement part embedded into the support body. The elastic modulus of the reinforcement part is greater than the elastic modulus of the support body. In an embodiment, the reinforced support includes Z-shaped bending structure extending parallel to the pivotal axis. In another embodiment, the reinforced support has a sliding shaft and a sliding hole formed beside the sliding shaft. The reinforced support is slidably and rotatably connected to the keycap through the sliding shaft. The reinforcement part surrounds the sliding hole and goes through the sliding shaft. A keyswitch structure includes a base plate, a keycap, and any of the above keycap support mechanisms. The keycap support mechanism supports the keycap above the base plate.
    Type: Application
    Filed: September 26, 2024
    Publication date: April 3, 2025
    Applicant: DARFON ELECTRONICS CORP.
    Inventors: Po-Wei Tsai, Hsun-Kun Peng, Po-Min Huang
  • Publication number: 20250112007
    Abstract: A keycap support mechanism increases the stability of supporting a keycap through structure designs of supports. Two supports are pivotally connected around a pivot axis; therein, at least one of the supports includes a support body and a reinforcement part embedded into the support body. The elastic modulus of the reinforcement part is greater than the elastic modulus of the support body. In an embodiment, the reinforcement part has a surrounding portion. The surrounding portion surrounds three sides of a pivot hole of the support. In another embodiment, the two supports both have a reinforcement part. The two reinforcement parts have overlapping portions in a vertical direction. A keyswitch structure includes a base plate, a keycap, and any of the above keycap support mechanisms. The keycap support mechanism supports the keycap above the base plate.
    Type: Application
    Filed: September 26, 2024
    Publication date: April 3, 2025
    Applicant: DARFON ELECTRONICS CORP.
    Inventors: Po-Wei Tsai, Hsun-Kun Peng, Po-Min Huang
  • Publication number: 20250112002
    Abstract: A keycap lifting mechanism increases the stability of supporting a keycap through structure designs of supports. For example, vertical projections of a sliding hole, a holder hole, and a base hole of supports overlap in a short side direction. For another example, vertical projections of a sliding hole, a holder hole, and a pivot hole of supports overlap in the short side direction. For another example, within the coverage range of a dome hole formed by supports in a long side direction, the supports do not have a structure connecting with other components. For another example, within the coverage range of two arms on opposite sides of the dome hole, there are more than 8 connection portions on the supports for connecting with a keycap and a base plate. For another example, the width of the arm is 0.8 to 2 times the length of the arm.
    Type: Application
    Filed: September 25, 2024
    Publication date: April 3, 2025
    Applicant: DARFON ELECTRONICS CORP.
    Inventors: Chih-Chung Yen, Po-Wei Tsai, Hsun-Kun Peng, Po-Min Huang
  • Publication number: 20250112001
    Abstract: A keycap lifting mechanism increases the stability of supporting a keycap through structure designs of supports. For example, a pivot of two supports overlaps base holes of the supports along the pivot axis. For another example, each of supports has support arms extending non-parallel to the pivot axis. The free end of each support arm is connected to a base plate. For another example, among a plurality of pivotally-connecting structures between supports, at least one includes a fully-open pivot hole, achieved by two opposite hooks, and at least one includes a semi-open pivot hole, achieved by two opposite hooks and a blind hole. A long rectangular keyswitch structure includes a keycap and any of the above mechanisms. The distance from a sliding hole of one support to an adjacent keycap long side is greater than the distance from a holder hole of another support to another adjacent keycap long side.
    Type: Application
    Filed: September 25, 2024
    Publication date: April 3, 2025
    Applicant: DARFON ELECTRONICS CORP.
    Inventors: Chih-Chung Yen, Po-Wei Tsai, Hsun-Kun Peng, Po-Min Huang
  • Patent number: 12266594
    Abstract: A method of making a semiconductor device includes manufacturing a first transistor over a first side of a substrate. The method further includes depositing a spacer material against a sidewall of the first transistor. The method further includes recessing the spacer material to expose a first portion of the sidewall of the first transistor. The method further includes manufacturing a first electrical connection to the transistor, a first portion of the electrical connection contacts a surface of the first transistor farthest from the substrate, and a second portion of the electrical connect contacts the first portion of the sidewall of the first transistor. The method further includes manufacturing a self-aligned interconnect structure (SIS) extending along the spacer material, wherein the spacer material separates a portion of the SIS from the first transistor, and the first electrical connection directly contacts the SIS.
    Type: Grant
    Filed: November 22, 2023
    Date of Patent: April 1, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Yu Lai, Chih-Liang Chen, Chi-Yu Lu, Shang-Syuan Ciou, Hui-Zhong Zhuang, Ching-Wei Tsai, Shang-Wen Chang
  • Publication number: 20250105218
    Abstract: A display light engine which includes a light source module, a spectrum conversion array disposed on the light source module and a lens array is provided. The light source module includes a plurality of light-emitting components which emit light toward the spectrum conversion array. The spectrum conversion array includes a plurality of spectrum conversion components and a metal bank material. The spectrum conversion components are spaced from each other and are disposed on the light-emitting components respectively. The metal bank material is distributed between two adjacent spectrum conversion components and separates the spectrum conversion components from each other. The lens array which includes a plurality of lenses arranged in an array is disposed between the spectrum conversion array and the light source module. Those lenses are disposed on and align to the spectrum conversion components respectively.
    Type: Application
    Filed: August 22, 2024
    Publication date: March 27, 2025
    Inventors: Chun-Hsiang Chan, Ching-Liang Huang, Ting-Wei Tsai, Sheng-Ming Huang
  • Publication number: 20250105220
    Abstract: The present invention provides a vertically stacked light-emitting diode (LED) structure, which comprises a substrate, a first light-emitting device, a first reflection layer, a second light-emitting device, a second reflection layer, and a third light-emitting device. The layers are stacked sequentially. The first light-emitting device, the second light-emitting device, and the third light-emitting device are connected electrically to the pads located on the edges of the substrate. In addition, the first reflection layer and the second reflection layer are used to reflect and filter the light from the first light-emitting device, the second light-emitting device, and the third light-emitting device. By using this structure, the area of the light-emitting diode structure can be further shrunk.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 27, 2025
    Inventors: Jr-Hau He, Zhi-Ting Ye, Chun-Wei Tsai, Der-Hsien Lien, Yuk-Tong Cheng
  • Publication number: 20250105138
    Abstract: Methods of forming decoupling capacitors in interconnect structures formed on backsides of semiconductor devices and semiconductor devices including the same are disclosed. In an embodiment, a device includes a device layer including a first transistor; a first interconnect structure on a front-side of the device layer; a second interconnect structure on a backside of the device layer, the second interconnect structure including a first dielectric layer on the backside of the device layer; a contact extending through the first dielectric layer to a source/drain region of the first transistor; a first conductive layer including a first conductive line electrically connected to the source/drain region of the first transistor through the contact; and a second dielectric layer adjacent the first conductive line, the second dielectric layer including a material having a k-value greater than 7.0, a first decoupling capacitor including the first conductive line and the second dielectric layer.
    Type: Application
    Filed: December 11, 2024
    Publication date: March 27, 2025
    Inventors: Yu-Xuan Huang, Hou-Yu Chen, Ching-Wei Tsai, Kuan-Lun Cheng, Chung-Hui Chen
  • Patent number: 12262550
    Abstract: A method of manufacturing a semiconductor structure is provided. A substrate including a first silicon carbide layer and a second silicon carbide layer under the first silicon carbide layer is formed. The substrate includes a unit region and a termination region surrounding the unit region. A first guard ring structure is formed in the termination region and the first silicon carbide layer, adjoining a top surface of the first silicon carbide layer. A second guard ring structure is formed in the termination region and the second silicon carbide layer. Second guard ring well regions of the second guard ring structure correspond one-on-one to first guard ring well regions of the first guard ring structure. Each of the second guard ring well regions overlaps with a corresponding one of the first guard ring well regions in a vertical direction perpendicular to the top surface of the substrate.
    Type: Grant
    Filed: December 12, 2024
    Date of Patent: March 25, 2025
    Assignee: Diodes Incorporated
    Inventors: Ching-Wen Wang, Jie Li, Ming-Wei Tsai, Chiao-Shun Chuang
  • Patent number: 12262566
    Abstract: An optoelectronic module, including a substrate, a covering member, a light emitting element, and a light receiving element, is provided. The covering member is disposed on the substrate and includes an upper cover portion, a peripheral sidewall portion connected to the upper cover portion, and an inside partition delimiting a first cavity and a second cavity. The first cavity is separated from the second cavity. The light emitting element is disposed on the substrate as corresponding to the first cavity. The light receiving element is disposed on the substrate as corresponding to the second cavity. The inside partition has a first inner wall surface located in the first cavity and a second inner wall surface located in the second cavity. A first protruded-recessed structure is formed on the first inner wall surface.
    Type: Grant
    Filed: March 10, 2022
    Date of Patent: March 25, 2025
    Assignee: Life-On Technology Corporation
    Inventors: Jui Lin Tsai, Chien Tien Wang, Shu-Hua Yang, Hsin Wei Tsai, You-Chen Yu
  • Patent number: 12261046
    Abstract: Various methods for manufacturing semiconductor structures are provided. An embodiment method includes forming a first patterned hard mask and epitaxial layer on a semiconductor substrate, and forming a first doped region in the epitaxial layer by performing a first implantation through the first patterned hard mask. A second doped region is formed in the epitaxial layer by performing a second implantation through the first patterned hard mask, with the first doped region at least partially overlapping the second doped region. A second patterned hard mask is formed, which surrounds the first patterned hard mask and covers at least a portion of the first doped region. A third doped region is formed in the epitaxial layer by performing a third implantation through the first patterned hard mask and the second patterned hard mask.
    Type: Grant
    Filed: April 4, 2024
    Date of Patent: March 25, 2025
    Assignee: Diodes Incorporated
    Inventors: Jie Li, Ming-Wei Tsai, Chiao-Shun Chuang, Ching-Wen Wang
  • Publication number: 20250087632
    Abstract: A semiconductor package includes a first semiconductor die and a second semiconductor die bonded over the first semiconductor die. The second semiconductor die includes a first backside interconnect structure having a first power rail structure. An integrated voltage regulator die is bonded over the second semiconductor die such that the integrated voltage regulator die is electrically connected to the first power rail structure. A through via is on the first semiconductor die and is electrically coupled to the first semiconductor die. The through via is disposed outside of and adjacent to the second semiconductor die. The through via also electrically couples the first semiconductor die to the second semiconductor die through the integrated voltage regulator die.
    Type: Application
    Filed: January 5, 2024
    Publication date: March 13, 2025
    Inventors: Chih-Chao Chou, Ching-Wei Tsai, Yi-Hsun Chiu
  • Publication number: 20250089140
    Abstract: An LED driving apparatus, a microcontroller, and a control method for an LED module are provided. The LED driving apparatus includes a power supply module, a switch module, and a control module. The power supply module is configured to supply power to the LED module, in which the power supply module determines whether to trigger an overcurrent protection based on whether an output current exceeds a threshold current. The control module is configured to receive an overcurrent detection signal to control a conduction state of the switch module, so as to affect the current amount of the LED module. When the overcurrent detection signal indicates the output current exceeds the threshold current, the control module outputs a first control signal based on the overcurrent detection signal to control the switch module, to prevent the overcurrent protection from being triggered.
    Type: Application
    Filed: January 8, 2024
    Publication date: March 13, 2025
    Inventors: Chun-Yi WU, Lian-Cheng TSAI, Chih-Wei TSAI
  • Publication number: 20250081594
    Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first and second gate electrode layers, and a dielectric feature disposed between the first and second gate electrode layers. The dielectric feature has a first surface. The structure further includes a first conductive layer disposed on the first gate electrode layer. The first conductive layer has a second surface. The structure further includes a second conductive layer disposed on the second gate electrode layer. The second conductive layer has a third surface, and the first, second, and third surfaces are coplanar. The structure further includes a third conductive layer disposed over the first conductive layer, a fourth conductive layer disposed over the second conductive layer, and a dielectric layer disposed on the first surface of the dielectric feature. The dielectric layer is disposed between the third conductive layer and the fourth conductive layer.
    Type: Application
    Filed: November 20, 2024
    Publication date: March 6, 2025
    Inventors: Kuan-Ting PAN, Kuo-Cheng CHIANG, Shang-Wen CHANG, Ching-Wei TSAI, Kuan-Lun CHENG, Chih-Hao WANG
  • Publication number: 20250079422
    Abstract: A micro light emitting diode (LED) is provided. The micro LED includes a first light emitting unit and a second light emitting unit disposed on a top of the first light emitting unit. A first electrode of the first light emitting unit is inserted through a groove of the second light emitting unit and electrically connected with a substrate. A third light emitting unit is either shielded by the first light emitting unit or arranged at one side of the first light emitting unit. The first light emitting unit, the second light emitting unit, and the third light emitting unit are connected with a common connection point of the substrate by respective common electrodes. Thus an area of a light emitting surface of the micro LED is further reduced.
    Type: Application
    Filed: August 29, 2023
    Publication date: March 6, 2025
    Inventors: Jr-Hau He, Zhi-Ting Ye, Chun-Wei Tsai, Der-Hsien Lien, Yuk-Tong Cheng