Abstract: An actuating and sensing module is disclosed and includes a bottom plate, a gas pressure sensor, a thin gas transportation device and a cover plate. The bottom plate includes a pressure relief orifice, a discharging orifice and a communication orifice. The gas pressure sensor is disposed on the bottom plate and seals the communication orifice. The thin gas transportation device is disposed on the bottom plate and seals the pressure relief orifice and the discharging orifice. The cover plate is disposed on the bottom plate and covers the gas pressure sensor and the thin gas-transportation device. The cover plate includes an intake orifice. The thin gas transportation device is driven to inhale gas through the intake orifice, the gas is then discharged through the discharging orifice by the thin gas transportation device, and a pressure change of the gas is sensed by the gas pressure sensor.

Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.

Abstract: The present disclosure is directed to methods for the formation of high-voltage nano-sheet transistors and low-voltage gate-all-around transistors on a common substrate. The method includes forming a fin structure with first and second nano-sheet layers on the substrate. The method also includes forming a gate structure having a first dielectric and a first gate electrode on the fin structure and removing portions of the fin structure not covered by the gate structure. The method further includes partially etching exposed surfaces of the first nano-sheet layers to form recessed portions of the first nano-sheet layers in the fin structure and forming a spacer structure on the recessed portions. In addition, the method includes replacing the first gate electrode with a second dielectric and a second gate electrode, and forming an epitaxial structure abutting the fin structure.

Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate and a first gate electrode disposed on the substrate and located in a first region of the semiconductor device. The semiconductor device also includes a first sidewall structure covering the first gate electrode. The semiconductor device further includes a protective layer disposed between the first gate electrode and the first sidewall structure. In addition, the semiconductor device includes a second gate electrode disposed on the substrate and located in a second region of the semiconductor device. The semiconductor device also includes a second sidewall structure covering a lateral surface of the second gate electrode.

Abstract: A semiconductor package includes a first semiconductor die, a second semiconductor die, a semiconductor bridge, an integrated passive device, a first redistribution layer, and connective terminals. The second semiconductor die is disposed beside the first semiconductor die. The semiconductor bridge electrically connects the first semiconductor die with the second semiconductor die. The integrated passive device is electrically connected to the first semiconductor die. The first redistribution layer is disposed over the semiconductor bridge. The connective terminals are disposed on the first redistribution layer, on an opposite side with respect to the semiconductor bridge. The first redistribution layer is interposed between the integrated passive device and the connective terminals.

Abstract: Structures and methods of forming fan-out packages are provided. The packages described herein may include a cavity substrate, one or more semiconductor devices located in a cavity of the cavity substrate, and one or more redistribution structures. Embodiments include a cavity preformed in a cavity substrate. Various devices, such as integrated circuit dies, packages, or the like, may be placed in the cavity. Redistribution structures may also be formed.

Abstract: A phototherapy device includes a base, at least one light conversion device and a light source module. The base has an installation slot. The light conversion device is detachably arranged in the installation slot. Each light conversion device includes a plurality of light conversion patterns. The light source module is arranged on a side of the base and configured to provide an excitation beam to the light conversion patterns, so that each of the light conversion patterns emits a converted beam. In this way, the light conversion device of the phototherapy device can be replaced according to the user's needs.

Abstract: Semiconductor device and the manufacturing method thereof are disclosed herein. An exemplary semiconductor device comprises a semiconductor fin disposed over a substrate, wherein the semiconductor fin includes a channel region and a source/drain region; a gate structure disposed over the channel region of the semiconductor fin, wherein the gate structure includes a gate spacer and a gate stack; a source/drain structure disposed over the source/drain region of the semiconductor fin; and a fin top hard mask vertically interposed between the gate spacer and the semiconductor fin, wherein the fin top hard mask includes a dielectric layer, and wherein a sidewall of the fin top hard mask directly contacts the gate stack, and another sidewall of the fin top hard mask directly contacts the source/drain structure.

Abstract: This disclosure relates to a liquid cooling device including a first heat exchanger that has a first inlet and a first outlet, a second heat exchanger that has a second inlet and a second outlet, a heat dissipation component that has a first heat inlet, a second heat inlet, and a heat outlet, and a fluid driving component that has a fluid inlet, a first fluid outlet, and a second fluid outlet. The first heat inlet and the second heat inlet are in fluid communication with the heat outlet. The first heat inlet is in fluid communication with the first outlet. The second heat inlet is in fluid communication with the second outlet. The fluid inlet is in fluid communication with the heat outlet. The first fluid outlet and the second fluid outlet are respectively in fluid communication with the first heat inlet and the second heat inlet.

Abstract: A multi-gate semiconductor device is formed that provides a first fin element extending from a substrate. A gate structure extends over a channel region of the first fin element. The channel region of the first fin element includes a plurality of channel semiconductor layers each surrounded by a portion of the gate structure. A source/drain region of the first fin element is adjacent the gate structure. The source/drain region includes a first semiconductor layer, a dielectric layer over the first semiconductor layer, and a second semiconductor layer over the dielectric layer.

Abstract: A multi-antenna system for harvesting energy and transmitting data includes an energy storing unit, antenna transmission units, and a load unit. Each antenna transmission unit includes an antenna module, a splitting module, an energy generation module, and a data processing module. The splitting module splits a wireless signal received by the antenna module into a first splitting signal and a second splitting signal and transmits the first splitting signal to an energy generation module to convert the first splitting signal into electrical energy stored in an energy storing unit and provided to the data processing module. The energy storing unit provides the electrical energy for the load unit. The data processing module receives one of the second splitting signals, converts it into a control signal, and transmits the control signal to the load unit. The load unit operates according to the control signal.

Abstract: A manufacturing method of an electronic element module is provided. The method includes: disposing a plurality of first micro-light-emitting diodes on a first temporary substrate; and replacing at least one defective micro-light-emitting diode of the first micro-light-emitting diodes with at least one second micro-light-emitting diode. The first micro-light-emitting diodes and at least one second micro-light-emitting diode are distributed on the first temporary substrate. The first micro-light-emitting diodes and at least one second micro-light-emitting diode have same properties, and at least one of the appearance difference, the height difference and the orientation difference exists between the first micro-light-emitting diodes and at least one second micro-light-emitting diode. A semiconductor structure and a display panel are also provided.

Abstract: A method executed by a User Equipment (UE) operating in a Frame-Based Equipment (FBE) mode is provided. The method includes the following steps: determining a starting time and a periodicity of a first Fixed Frame Period (FFP) of a cell on an operating channel of an unlicensed band; determining a starting time and a periodicity of a second FFP for initiating an uplink transmission to the cell; performing a Listen-Before-Talk (LBT) procedure on the operating channel of the unlicensed band; and performing the uplink transmission to the cell using a first uplink resource in the second FFP in response to the LBT procedure indicating that the operating channel of the unlicensed band is clear.

Abstract: In an embodiment, a method of forming a structure includes forming a first transistor and a second transistor over a first substrate; forming a front-side interconnect structure over the first transistor and the second transistor; etching at least a backside of the first substrate to expose the first transistor and the second transistor; forming a first backside via electrically connected to the first transistor; forming a second backside via electrically connected to the second transistor; depositing a dielectric layer over the first backside via and the second backside via; forming a first conductive line in the dielectric layer, the first conductive line being a power rail electrically connected to the first transistor through the first backside via; and forming a second conductive line in the dielectric layer, the second conductive line being a signal line electrically connected to the second transistor through the second backside via.

Abstract: A display may have an array of pixels. Display driver circuitry may supply data and control signals to the pixels. Each pixel may have seven transistors, a capacitor, and a light-emitting diode such as an organic light-emitting diode. The seven transistors may receive control signals using horizontal control lines. Each pixel may have first and second emission enable transistors that are coupled in series with a drive transistor and the light-emitting diode of that pixel. The first and second emission enable transistors may be coupled to a common control line or may be separately controlled so that on-bias stress can be effectively applied to the drive transistor. The display driver circuitry may have gate driver circuits that provide different gate line signals to different rows of pixels within the display. Different rows may also have different gate driver strengths and different supplemental gate line loading structures.

Abstract: A combinable nucleic acid pre-processing apparatus includes a sample transfer chamber transferring a sample from a sampling tube to a nucleic acid extraction kit, a nucleic acid extraction chamber performing a nucleic acid extraction of the sample in the nucleic acid extraction kit for obtaining a nucleic acid extract, an assay setup chamber preparing reagents and transferring reagents and the nucleic acid extract to an assay plate, and at least two bridging modules respectively disposed between the sample transfer chamber and the nucleic acid extraction chamber and between the nucleic acid extraction chamber and the assay setup chamber. The sample transfer chamber, the nucleic acid extraction chamber and the assay setup chamber are separated and operated independently. Three chambers are connected through the bridging modules, so the nucleic acid extraction kit can be sequentially moved in the sample transfer chamber, the nucleic acid extraction chamber and the assay setup chamber.

Abstract: A method of making a semiconductor device includes forming a first polysilicon structure over a first portion of a substrate. The method further includes forming a first spacer on a sidewall of the first polysilicon structure, wherein the first spacer has a concave corner region between an upper portion and a lower portion. The method further includes forming a protective layer covering an entirety of the first spacer and the first polysilicon structure, wherein the protective layer has a first thickness over the concave corner region and a second thickness over the first polysilicon structure, and a difference between the first thickness and the second thickness is at most 10% of the second thickness.

Abstract: A semiconductor structure includes a substrate, a channel region, a gate structure, and source/drain regions. The channel region is over the substrate. The gate structure is over the channel region, and includes a high-k dielectric layer, a tungsten layer over the high-k dielectric layer, and a fluorine-containing work function layer over the tungsten layer. The source/drain regions are at opposite sides of the channel region.

Abstract: This application discloses electromagnetic energy mitigation assemblies and automotive vehicle components comprising the electromagnetic energy mitigation assemblies. An electromagnetic energy mitigation assembly includes a first electrically conductive layer and a second electrically conductive layer. First and second permalloy layers are along respective first and second opposite sides of the first electrically conductive layer. Third and fourth permalloy layers are along respective third and fourth opposite sides of the second electrically conductive layer. An electromagnetic noise suppression layer is sandwiched between the second and third permalloy layers. An automotive vehicle component includes an electromagnetic energy mitigation assembly configured to be positioned relative to one or more batteries of an automotive vehicle for providing electromagnetic shielding for the one or more batteries. The electromagnetic energy mitigation assembly includes a first electrically conductive layer.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.