Patents by Inventor Wei Yin

Wei Yin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190139969
    Abstract: A method includes providing metal gate structures in a first and a second region, respectively, of a semiconductor substrate, simultaneously cutting the metal gate structures by a two-step etching process to form a first and a second trench in metal gate structures of the first and the second region, respectively, and filling each trench with an insulating material to form a first and a second gate isolation structure. Each step of the two-step etching process employs different etching chemicals and conditions. The metal gate structures in the first region and the second region differ in gate lengths and composition of gate electrode.
    Type: Application
    Filed: November 9, 2017
    Publication date: May 9, 2019
    Inventors: Li-Wei Yin, Shu-Yuan Ku, Chun-Fai Cheng
  • Publication number: 20190131298
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Application
    Filed: November 30, 2018
    Publication date: May 2, 2019
    Inventors: Ryan Chia-Jen Chen, Cheng-Chung Chang, Shao-Hua Hsu, Yu-Hsien Lin, Ming-Ching Chang, Li-Wei Yin, Tzu-Wen Pan, Yi-Chun Chen
  • Publication number: 20190131297
    Abstract: Methods of cutting gate structures and fins, and structures formed thereby, are described. In an embodiment, a substrate includes first and second fins and an isolation region. The first and second fins extend longitudinally parallel, with the isolation region disposed therebetween. A gate structure includes a conformal gate dielectric over the first fin and a gate electrode over the conformal gate dielectric. A first insulating fill structure abuts the gate structure and extends vertically from a level of an upper surface of the gate structure to at least a surface of the isolation region. No portion of the conformal gate dielectric extends vertically between the first insulating fill structure and the gate electrode. A second insulating fill structure abuts the first insulating fill structure and an end sidewall of the second fin. The first insulating fill structure is disposed laterally between the gate structure and the second insulating fill structure.
    Type: Application
    Filed: October 30, 2017
    Publication date: May 2, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: RYAN CHIA-JEN CHEN, LI-WEI YIN, TZU-WEN PAN, YI-CHUN CHEN, CHENG-CHUNG CHANG, SHAO-HUA HSU, YU-HSIEN LIN, MING-CHING CHANG
  • Publication number: 20190122781
    Abstract: The present disclosure discloses a photoneutron source and a neutron inspection system. The photoneutron source comprises: an electron accelerating tube for accelerating an electron beam; an X-ray converting target, and the electron beam accelerated by the electron accelerating tube bombards the X-ray converting target to generate X-rays; a photoneutron target, and the X-rays enters the photoneutron target to generates photoneutrons; and a neutron modulation housing provided outside the photoneutron target, and the neutron modulation housing comprises a neutron collimation port for outputting photoneutrons. The present disclosure may directly output a desired neutron beam from the neutron collimation port of the photoneutron source.
    Type: Application
    Filed: October 19, 2018
    Publication date: April 25, 2019
    Inventors: Yigang YANG, Jianmin LI, Dongyu WANG, Hao YU, Weizhen WANG, Weiqiang GUAN, Wei YIN, Wei LI, Quanwei SONG, Yulan LI, Chunguang ZONG, Yaohong LIU, Yuanjing LI, Zhiqiang CHEN, Li ZHANG
  • Publication number: 20190091331
    Abstract: A bispecific antibody that simultaneously targets humanized p185 and VEGF, consisting of the four peptide chains: two identical antibody light chains that are the light chains of the antibody that identify the epitope or antigen of p185, and two identical antibody heavy chains that have the amino acid sequence of a recombinant antibody from N- to C-terminus, a light chain sequence of the antibody that recognizes the p185 epitope or the antigen; a constant heavy chain region; a flexible short peptide sequence; and either a single-stranded variable region sequence (ScFv) of anti-VEGF antibody which recognizes the VEGF epitope or antigen, or a receptor domain sequence that binds to VEGF. The bispecific antibody has the ability to bind p185 and VEGF at the same time, inhibits the proliferation of tumor cells, and promotes the expression of IFN-? by T lymphocytes; it may be applied as anti-tumor antibody drug.
    Type: Application
    Filed: December 26, 2017
    Publication date: March 28, 2019
    Inventors: Yang YANG, Wei Yin
  • Publication number: 20190036532
    Abstract: A high voltage level shifting circuit and related semiconductor devices are presented. The circuit comprises: a level conversion circuit that converts an input signal with a first high voltage to an output signal with a second high voltage; a first switch having a first node connected to a first power source and a second node connected to a control node of a first transistor; a second switch having a first node connected to the control node of the first transistor and a second node connected to a first connection node; and a switch control circuit connected to the first switch and the second switch and controls them not to be close at the same time. By adding these two switches to the level conversion circuit, this inventive concept substantially lowers the static current generated during a high voltage level conversion process.
    Type: Application
    Filed: July 20, 2018
    Publication date: January 31, 2019
    Inventors: Yi Jin Kwon, Hao Ni, Chang Wei Yin, Hong Yu
  • Publication number: 20190033475
    Abstract: The disclosed technology relates to a ray energy calibration device and method, and a ray imaging system. In one aspect, the ray energy calibration device includes a plurality of wheels arranged to be rotatable about a common shaft and each provided with one or more protruding blocks at respective specific positions of an outer circumference thereof. The ray energy calibration device further includes a plurality of calibration members, with each of the calibration members being configured such that through rotation of a corresponding one of the wheels, the calibration member can be moved to a calibration position by the protruding block at a specific position on the outer circumference of the wheel.
    Type: Application
    Filed: September 19, 2018
    Publication date: January 31, 2019
    Inventors: Yumei Chen, Xinshui Yan, Quanwei Song, Wei Yin, Weiqiang Guan
  • Publication number: 20180314770
    Abstract: Disclosed is a method for designing supporting parameters of a transition support for a mixed mining face of filling and fully-mechanized mining.
    Type: Application
    Filed: November 18, 2016
    Publication date: November 1, 2018
    Applicant: CHINA UNIVERSITY OF MINING AND TECHNOLOGY
    Inventors: Jixiong ZHANG, Qiang SUN, Qiang ZHANG, Wei YIN, Hao YAN
  • Patent number: 10116071
    Abstract: An electrical connector includes an insulative housing defining a top surface and a bottom surface opposite to each other and a plurality of electrical contacts received in the insulative housing. Each electrical contact is formed by stamping a metal plate and includes a contacting portion exposed to the top surface, a mounting portion extending out of the bottom surface and an elastic portion disposed between the contacting portion and the mounting portion and in the insulative housing, wherein the elastic portion includes a first elastic portion and a second elastic portion disposed on two opposite sides of the contacting portion.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: October 30, 2018
    Assignee: FOXCONN INTERCONNECT TECHNOLOGY LIMITED
    Inventors: Xin-Tian Li, Wei Yin, Ji-Wang Jin, Bin Peng, Zhi-Jian Chen
  • Patent number: 10095715
    Abstract: A data backup method for a mobile terminal and a mobile terminal including the same. The method includes: receiving a data backup request; backing up information data by blocks and generating backup data of each block; scanning the backup data of each block and generating corresponding statistics information; and storing the backup data and the statistics information of each block.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: October 9, 2018
    Assignee: HUAWEI DEVICE (DONGGUAN) CO., LTD.
    Inventor: Wei Yin
  • Publication number: 20180268011
    Abstract: A method, computer program product and/or computer system assigns access to a quorum disk in a split-storage cluster environment when a communication link between storage systems fails. Access to the quorum disk is based on storage system I/O performance. Priority is given to the storage system that has a higher performance before the link failure. When the communication link fails, both storage systems attempt to access the quorum disk. If the system that first attempts to access the quorum disk is the non-priority storage system, a timer is started. If the priority system attempts to access the quorum disk within a predetermined time interval, the priority system locks the quorum disk and forms the cluster. If the priority system does not attempt to access the quorum disk within the predetermined time interval, the non-priority system locks the quorum disk and forms the cluster.
    Type: Application
    Filed: March 14, 2017
    Publication date: September 20, 2018
    Inventors: Miao Ke Cao, Wei Yin, Ning Zhao
  • Publication number: 20180268012
    Abstract: A method, computer program product and/or computer system assigns access to a quorum disk in a split-storage cluster environment when a communication link between storage systems fails. Access to the quorum disk is based on storage system I/O performance. Priority is given to the storage system that has a higher performance before the link failure. When the communication link fails, both storage systems attempt to access the quorum disk. If the system that first attempts to access the quorum disk is the non-priority storage system, a timer is started. If the priority system attempts to access the quorum disk within a predetermined time interval, the priority system locks the quorum disk and forms the cluster. If the priority system does not attempt to access the quorum disk within the predetermined time interval, the non-priority system locks the quorum disk and forms the cluster.
    Type: Application
    Filed: November 30, 2017
    Publication date: September 20, 2018
    Inventors: Miao Ke Cao, Wei Yin, Ning Zhao
  • Patent number: 10067970
    Abstract: A method, computer program product and/or computer system assigns access to a quorum disk in a split-storage cluster environment when a communication link between storage systems fails. Access to the quorum disk is based on storage system I/O performance. Priority is given to the storage system that has a higher performance before the link failure. When the communication link fails, both storage systems attempt to access the quorum disk. If the system that first attempts to access the quorum disk is the non-priority storage system, a timer is started. If the priority system attempts to access the quorum disk within a predetermined time interval, the priority system locks the quorum disk and forms the cluster. If the priority system does not attempt to access the quorum disk within the predetermined time interval, the non-priority system locks the quorum disk and forms the cluster.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: September 4, 2018
    Assignee: International Business Machines Corporation
    Inventors: Miao Ke Cao, Wei Yin, Ning Zhao
  • Publication number: 20180234384
    Abstract: Embodiments for server port virtualization for guest logical unit number (LUN) masking in a host direct attach configuration using a storage adapter in a computing environment by a processor. An F switch port is simulated by an N storage port to enable either N-port virtualization (NPV) or N-port identification (ID) virtualization (NPIV) in the host direct attach configuration by directly attaching the N server port to the N storage port. A domain name system (DNS) operation is performed to cause each virtualized N-port ID to be mapped to fiber channel (FC) IDs in domain format of domain, area, port.
    Type: Application
    Filed: February 10, 2017
    Publication date: August 16, 2018
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Min FANG, Qing WANG, Wei YIN, Jiang YU
  • Patent number: 9997401
    Abstract: A method for forming the semiconductor device structure is provided. The method includes forming a first metal layer over a substrate and forming a dielectric layer over the first metal layer. The method includes forming an antireflection layer over the dielectric layer, forming a hard mask layer over the antireflection layer and forming a patterned photoresist layer over the hard mask layer. The method includes etching a portion of the antireflection layer by performing a first etching process and etching through the antireflection layer and etching a portion of the dielectric layer by performing a second etching process. The method includes etching through the dielectric layer by performing a third etching process to form a via portion on the first metal layer. The via portion includes a first sidewall and a second sidewall, and the slope of the first sidewall is different from that of the second sidewall.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: June 12, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yin Shiao, Che-Cheng Chang, Tai-Shin Cheng, Wei-Ting Chen
  • Patent number: 9988905
    Abstract: A solid-filling coal mining feeding and conveying monitoring system, suitable for monitoring of a vertical feeding and conveying system in underground mine solid-filling mining. The monitoring system mainly consists of an industrial control computer, a PLC control box, an operating platform, a liquid crystal display, a color four-picture divider, two video optical receivers and loudspeakers, four cameras, uphole electronic belt scales, downhole electronic belt scales, a radar level meter, a coal level sensor, a vibration sensor, and various matching junction boxes and cables, the components being installed in positions such as a material field, a control room, upper and lower openings of a storage silo, and a gangue transportation lane. The system implements four main functions of a solid-filling material transportation and feeding process, the four main functions being status monitoring, a full silo alarm, centralized control, and recording and querying.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: June 5, 2018
    Assignee: CHINA UNIVERSITY OF MINING AND TECHNOLOGY
    Inventors: Jixiong Zhang, Nan Zhou, Wei Yin, Meng Li
  • Publication number: 20180074002
    Abstract: The present invention provides capacitor-based fluid sensing units. The capacitor-based fluid sensing unit comprises a substrate, a first electrode configured on the substrate, a sensing layer configured on the first electrode, a second electrode configured on the sensing layer. More particularly, the second electrode is a porous electrode, while the sensing layer is made of a porous dielectric material and has a thickness between 50 nm and 5 mm. Permittivity of the sensing layer changes as fluid permeates from the second electrode to the sensing layer. The subsequent change in capacitance of the capacitor-based fluid sensing unit is used to determine the volume of the fluid.
    Type: Application
    Filed: January 13, 2017
    Publication date: March 15, 2018
    Inventors: CHAO-SUNG LAI, CHIA-MING YANG, HSIN-YIN PENG, WEI-YIN ZENG, CHUN-HUI CHEN
  • Patent number: 9864527
    Abstract: A computer-executable method, computer program product, and system of managing I/O requests in a distributed data storage system, wherein the distributed data storage system includes a first node and one or more data storage array, the computer-executable method, computer program product, and system comprising receiving an I/O request at the first node enabled to utilize a storage engine to process the I/O request, wherein the storage engine is comprised of two or more layers, analyzing the I/O request using a first layer of the two or more layers to determine whether the I/O request relates to a portion of metadata managed by the first layer of the two or more layers, and processing the I/O request based on the determination.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: January 9, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Shashwat Srivastav, Vishrut Shah, Chen Wang, Matthew L. Troutman, Ivan Tchoub, Wei Yin, Jie Song, Maxim S. Trusov, Andrey Fomin, Karthik Navaneethakrishnan, Alexander G. Rakulenko
  • Patent number: 9858013
    Abstract: A computer-executable method, computer program product, and system for managing metadata within a distributed data storage system, including a compute node in communication with a data storage array, the computer-executable method, computer program product, and system comprising receiving a data I/O from an application executing within the distributed data storage system, and creating a first storage system within the compute node, wherein the first storage system is enabled to manage metadata related to the data I/O, and processing the data I/O using the first storage system.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: January 2, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Shashwat Srivastav, Sriram Sankaran, Vishrut Shah, Qi Zhang, Jun Luo, Chen Wang, Huapeng Yuan, Karthik Navaneethakrishnan, Jie Song, Wei Yin
  • Patent number: 9843313
    Abstract: The present invention provides a high voltage pulse modulating power source based on alternate group triggering, which comprises: a DC stabilized voltage source for supplying power to the high voltage pulse modulating power source; a plurality of solid-state switches; a plurality of triggers corresponding to said plurality of solid-state switches, wherein each trigger provides a trigger signal to its corresponding solid-state switch to turn on said corresponding solid-state switch, wherein said plurality of triggers are divided into at least two groups of triggers; a time sequence control module, which, at time t1, controls said plurality of triggers to generate trigger signals so as to turn on said plurality of solid-state switches simultaneously, and at time t2, controls one group of said at least two groups of triggers to generate trigger signals to turn on solid-state switches corresponding to this group of triggers, wherein time t1 and time t2 appear alternately.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: December 12, 2017
    Assignees: Nuctech Company Limited, Tsinghua University
    Inventors: Yaohong Liu, Chuanxiang Tang, Xinshui Yan, Wei Jia, Jianjun Gao, Jinsheng Liu, Wei Yin, Xiying Liu, Hao Shi