Patents by Inventor Wei Yu

Wei Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978675
    Abstract: A semiconductor device includes a gate structure disposed over a channel region, and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, a first work function adjustment layer, over the gate dielectric layer, a first shield layer over the first work function adjustment layer, a first barrier layer, and a metal gate electrode layer. The first work function adjustment layer is made up of n-type work function adjustment layer and includes aluminum. The first shield layer is made of at least one selected from the group consisting of metal, metal nitride, metal carbide, silicide, a layer containing one or more of F, Ga, In, Zr, Mn and Sn, and an aluminum containing layer having a lower aluminum concentration than the first work function adjustment layer.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chandrashekhar Prakash Savant, Chia-Ming Tsai, Ming-Te Chen, Tien-Wei Yu
  • Publication number: 20240145457
    Abstract: Implementations described herein relate to various semiconductor device assemblies. In some implementations, a semiconductor device assembly may include a controller, a first mold compound surrounding the controller, a plurality of semiconductor dies, a second mold compound surrounding the plurality of semiconductor dies, and one or more through-mold interconnects electrically coupling the controller to the plurality of semiconductor dies.
    Type: Application
    Filed: October 27, 2022
    Publication date: May 2, 2024
    Inventors: Faxing CHE, Yeow Chon ONG, Wei YU, Ling PAN
  • Publication number: 20240144428
    Abstract: An image processing circuit includes a receiving circuit, a transmitting circuit, a first asynchronous handshake circuit, a super resolution scale-up model and a second asynchronous handshake circuit. The receiving circuit is arranged to receive an input image with a first pixel clock frequency. The first asynchronous handshake circuit is arranged to receive the input image from the receiving circuit according to a receiving timing. The super resolution scale-up model is arranged to scale up the input image to generate an output image with a second pixel clock frequency. The second asynchronous handshake circuit is arranged to output the output image to the transmitting circuit according to a transmitting timing to transmit the output image, wherein the first asynchronous handshake circuit, the super resolution scale-up model, and the second asynchronous handshake circuit operate at a clock frequency independent of the first pixel clock frequency and the second pixel clock frequency.
    Type: Application
    Filed: June 28, 2023
    Publication date: May 2, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventors: Tien-Hung Lin, Chia-Wei Yu, Yi-Ting Bao
  • Publication number: 20240141123
    Abstract: A manufacturing method of a modified polymer layer modified by hydroxyapatite is provided in the present disclosure, including following steps: (a) providing a polymer layer; (b) plasma-activating acrylic acid using an atmospheric cold plasma device to modify a surface of the polymer layer to obtain an acrylic-modified polymer layer; (c) immersing the acrylic-modified polymer layer in a first solution containing a calcium ion to obtain a calcium-containing modified layer; and (d) immersing the calcium-containing modified layer in a second solution containing phosphate salt to obtain a modified polymer layer modified by hydroxyapatite.
    Type: Application
    Filed: June 9, 2023
    Publication date: May 2, 2024
    Inventors: Wei-Yu CHEN, Jui-Sheng LEE, Hui-Ju HSU
  • Publication number: 20240145581
    Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN, Zheng-Yang PAN, Cheng-Po CHAU, Pin-Chu LIANG, Hung-Yao CHEN, De-Wei YU, Yi-Cheng LI
  • Publication number: 20240145570
    Abstract: A semiconductor device includes a gate structure disposed over a channel region and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, one or more work function adjustment material layers over the gate dielectric layer, and a metal gate electrode layer over the one or more work function adjustment material layers. The one or more work function adjustment layers includes an aluminum containing layer, and a diffusion barrier layer is disposed at at least one of a bottom portion and a top portion of the aluminum containing layer. The diffusion barrier layer is one or more of a Ti-rich layer, a Ti-doped layer, a Ta-rich layer, a Ta-doped layer and a Si-doped layer.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shahaji B. MORE, Chandrashekhar Prakash SAVANT, Tien-Wei YU, Chia-Ming TSAI
  • Publication number: 20240144426
    Abstract: A super resolution (SR) image generation circuit includes an image scale-up circuit, a stable SR processing circuit, a generative adversarial network (GAN) processing circuit, and a configurable basic block pool circuit. The image scale-up circuit is arranged to receive and process an input image to generate a scaled-up image. The stable SR processing circuit is arranged to receive a feature map of the input image to generate a stable delta value. The GAN processing circuit is arranged to receive the feature map to generate a GAN delta value. The configurable basic block pool circuit is arranged to dynamically configure a plurality of basic blocks according to a depth requirement of the input image, to generate a configuration result. The SR image generation circuit generates an SR image according to the scaled-up image, the stable delta value, and the GAN delta value.
    Type: Application
    Filed: April 20, 2023
    Publication date: May 2, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventors: Shang-Yen Lin, Yi-Ting Bao, HAO-RAN WANG, Chia-Wei Yu
  • Publication number: 20240136203
    Abstract: A method includes placing an electronic die and a photonic die over a carrier, with a back surface of the electronic die and a front surface of the photonic die facing the carrier. The method further includes encapsulating the electronic die and the photonic die in an encapsulant, planarizing the encapsulant until an electrical connector of the electronic die and a conductive feature of the photonic die are revealed, and forming redistribution lines over the encapsulant. The redistribution lines electrically connect the electronic die to the photonic die. An optical coupler is attached to the photonic die. An optical fiber attached to the optical coupler is configured to optically couple to the photonic die.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Chen-Hua Yu, An-Jhih Su, Wei-Yu Chen
  • Publication number: 20240130714
    Abstract: Disclosed are computer-implemented or computer-aided method for diagnosing or predicting the risk of obstructive sleep apnea in a subject. The methods comprise determining whether the subject has obstructive sleep apnea based on at least one quantitative ultrasound parameter and/or at least one morphometric parameter.
    Type: Application
    Filed: May 16, 2023
    Publication date: April 25, 2024
    Applicant: AMCAD BIOMED CORPORATION
    Inventors: Argon CHEN, Yi-li LEE, Pei-Yu CHAO, Wei-Hao CHEN, Wei-Yu HSU
  • Publication number: 20240134163
    Abstract: An image capturing lens assembly includes, in order from an object side to an image side, a first lens element, a second lens element, a third lens element, a fourth lens element, a fifth lens element, and a sixth lens element. The first lens element with negative refractive power has an image-side surface being concave in a paraxial region thereof. The second and third lens elements have refractive power. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof. The sixth lens element with refractive power has an object-side surface being convex in a paraxial region thereof and an image-side surface being concave in a paraxial region thereof. The image capturing lens assembly has a total of six lens elements with refractive power.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Cheng-Chen LIN, Wei-Yu CHEN
  • Publication number: 20240136299
    Abstract: A package includes an interposer structure free of any active devices. The interposer structure includes an interconnect device; a dielectric film surrounding the interconnect device; and first metallization pattern bonded to the interconnect device. The package further includes a first device die bonded to an opposing side of the first metallization pattern as the interconnect device and a second device die bonded to a same side of the first metallization pattern as the first device die. The interconnect device electrically connects the first device die to the second device die.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Inventors: Wei-Yu Chen, Chun-Chih Chuang, Kuan-Lin Ho, Yu-Min Liang, Jiun Yi Wu
  • Publication number: 20240134160
    Abstract: The present disclosure provides an image capturing optical system comprising: a positive first lens element having a convex object-side surface; a negative second lens element having a concave object-side surface; a third lens element; a fourth lens element having a convex object-side surface and a concave image-side surface, the object-side surface and the image-side surface thereof being aspheric; a fifth lens element having a concave image-side surface concave, both of the object-side surface and the image-side surface being aspheric, at least one of the object-side surface and the image-side surface having at least one convex shape in an off-axis region thereof.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Inventors: Kuan-Ming CHEN, Wei-Yu CHEN
  • Patent number: 11966031
    Abstract: An image lens assembly includes, in order from an object side to an image side along an optical path, a first lens group, a second lens group, a third lens group and a fourth lens group. A total number of lens elements in the image lens assembly is seven. The first lens group includes a first lens element with positive refractive power and a second lens element with negative refractive power. Each of the second lens group and the third lens group includes at least one lens element. The fourth lens group includes a seventh lens element. When the image lens assembly is focusing or zooming, a relative position between the first lens group and an image surface is fixed, a relative position between the fourth lens group and the image surface is fixed, and the second lens group and the third lens group move along the optical axis.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: April 23, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Kuan-Ting Yeh, Wei-Yu Chen
  • Publication number: 20240130038
    Abstract: A transmission device for suppressing the glass-fiber effect includes a circuit board and a transmission line. The circuit board includes a plurality of glass fibers, so as to define a fiber pitch. The transmission line is disposed on the circuit board. The transmission line includes a plurality of non-parallel segments. Each of the non-parallel segments of the transmission line has an offset distance with respect to a reference line. The offset distance is longer than or equal to a half of the fiber pitch.
    Type: Application
    Filed: November 23, 2022
    Publication date: April 18, 2024
    Applicants: UNIMICRON TECHNOLOGY CORP., National Taiwan University
    Inventors: Chin-Hsun WANG, Ruey-Beei Wu, Ching-Sheng Chen, Chun-Jui Hung, Wei-Yu Liao, Chi-Min Chang
  • Publication number: 20240128626
    Abstract: A transmission device includes a daisy chain structure composed of at least three daisy chain units arranged periodically and continuously. Each of the daisy chain units includes first, second and third conductive lines, and first and second conductive pillars. The first and second conductive lines at a first layer extend along a first direction and are discontinuously arranged. The third conductive line at a second layer extends along the first direction and is substantially parallel to the first and second conductive lines. The first conductive pillar extends in a second direction. The second direction is different from the first direction. A first part of the first conductive pillar is connected to the first and third conductive lines. The second conductive pillar extends in the second direction. A first part of the second conductive pillar is connected to the second and third conductive lines.
    Type: Application
    Filed: November 25, 2022
    Publication date: April 18, 2024
    Applicants: UNIMICRON TECHNOLOGY CORP., National Taiwan University
    Inventors: Yu-Kuang WANG, Ruey-Beei Wu, Ching-Sheng Chen, Chun-Jui Huang, Wei-Yu Liao, Chi-Min Chang
  • Publication number: 20240125942
    Abstract: A method includes receiving a respective channel signal from a respective satellite encoded with a pseudorandom number (PN) sequence. The method includes, for the respective channel signal: generating and aggregating intermediate results for a plurality of epochs of a single pseudorandom number (PN) sequence period of the PN sequence, including: for each respective epoch of the plurality of epochs, analyzing samples of the respective channel signal using a discrete Fourier transform (DFT), to produce an intermediate result for the respective epoch; and aggregating the intermediate results for the plurality of epochs to produce a DFT correlation result. The method includes processing the DFT correlation result to produce a code phase correction for the respective channel and, in accordance with the code phase correction, computing position and velocity estimates for the mobile object; and performing a navigation function for the mobile object.
    Type: Application
    Filed: August 3, 2023
    Publication date: April 18, 2024
    Inventor: Wei Yu
  • Patent number: 11962357
    Abstract: The present disclosure provides a method and system for testing wireless performance of a wireless terminal configured as a DUT having multiple transmitting antennas and placed in an anechoic chamber. The method includes: obtaining antenna pattern of the multiple transmitting antennas, and importing the antenna pattern into a channel emulator; selecting a same number of testing antennas in the anechoic chamber as a number of the transmitting antennas; the selected testing antennas receiving a signal from the transmitting antennas, and sending the signal to the channel emulator, the channel emulator processing the signal to generate an analog signal and sending the analog signal to an analog base station; and the analog base station receiving the analog signal and performing a throughput test to obtain an uplink wireless performance test of the DUT.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: April 16, 2024
    Assignee: GENERAL TEST SYSTEMS INC.
    Inventors: Yihong Qi, Wei Yu, Penghui Shen
  • Patent number: 11963295
    Abstract: Provided are a circuit apparatus, a manufacturing method thereof, and a circuit system. The circuit apparatus includes a flexible circuit board, a flexible packaging material layer and an electronic device. The flexible circuit board has at least one hollow pattern, wherein the flexible circuit board has an inner region and a peripheral region surrounding the inner region, and has a first surface and a second surface opposite to each other. The flexible packaging material layer is disposed in the at least one hollow pattern. The electronic device is disposed on the first surface of the flexible circuit board and electrically connected with the flexible circuit board.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: April 16, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Hung-Hsien Ko, Yi-Cheng Lu, Heng-Yin Chen, Hao-Wei Yu, Te-Hsun Lin
  • Publication number: 20240117840
    Abstract: A slide rail assembly adapted to dispose to a first casing is provided. The slide rail assembly includes an outer slide rail, an inner slide rail, and first and second engaging components. The outer slide rail includes a first hook. The inner slide rail is slidably disposed to the outer slide rail and includes first and second ends and positioning slots. First fixing portions of the first casing is engaged with several of the positioning slots. The first engaging component is partially overlapped with a critical positioning slot of the positioning slots and includes a second hook. The second engaging component includes a third hook. When the first casing is set on the inner slide rail, the second hook leaves an engaging path with the first hook, and the first casing and the inner slide rail slide to a position where the third hook is engaged with the first hook.
    Type: Application
    Filed: August 9, 2023
    Publication date: April 11, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Yi-Ching Tseng, Chih-Wei Yu
  • Publication number: 20240118522
    Abstract: A photographing lens assembly includes, in order from an object side to an image side: a first, a second, a third, a fourth, a fifth and a sixth lens elements. The first lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, wherein the object-side surface has at least one convex critical point in an off-axis region thereof. The third lens element has an image-side surface being convex in a paraxial region thereof. The fourth lens element has positive refractive power. The fifth lens element with negative refractive power has an object-side surface being concave in a paraxial region thereof, and an image-side surface being convex in a paraxial region thereof. The sixth lens element has an image-side surface being concave in a paraxial region thereof, wherein the image-side surface has at least one convex critical point in an off-axis region thereof.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 11, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Po-Lun HSU, Wei-Yu CHEN, Kuan-Ting YEH, Ssu-Hsin LIU