Abstract: A zinc-vanadium battery includes a modified positive electrode structure (including a positive electrode and a first modified layer), a separator, a negative electrode, and an aqueous electrolyte. The first modified layer on the positive electrode includes 70-95 parts by weight of vanadium-based material, 3-45 parts by weight of a conductive agent, and 3-45 parts by weight of a binder. The negative electrode is on the separator on the first modified layer. The positive electrode, the first modified layer, the separator, and the negative electrode are in the aqueous electrolyte. In the X-ray diffraction patterns of the vanadium-based material measured by XRD using CuK?1 ray, an intensity ratio of a peak at 2?=8°±1.0° over a peak at 2?=20°±1.0° (denoted as I8 and I20, respectively) satisfies 0<I8/I20?1.4. Furthermore, the modified positive electrode structure, a method of manufacturing the modified positive electrode structure, and a method of manufacturing the zinc-vanadium battery are provided.

Abstract: A zinc-vanadium battery includes a modified positive electrode structure (including a positive electrode and a modified layer), a separator, a negative electrode, and an aqueous electrolyte. The modified layer on the positive electrode includes 70-95 parts by weight of vanadium-based material, 3-45 parts by weight of a conductive agent, and 3-45 parts by weight of a binder. The separator is on the modified layer, and the negative electrode is on the separator. The positive electrode, the modified layer, the separator, and the negative electrode are in the aqueous electrolyte. In the X-ray diffraction patterns of the vanadium-based material measured by XRD using CuK?1 ray, an intensity ratio of a peak at 2?=8°±1.0° over a peak at 2?=20°±1.0° (denoted as I8 and I20, respectively) satisfies 0<I8/I20?1.4. Furthermore, the modified positive electrode structure, a method of manufacturing the modified positive electrode structure, and a method of manufacturing the zinc-vanadium battery are provided.

Abstract: A package capable of eliminating bubble formation includes a composite substrate having an accommodating space, an upper conductive layer and a lower conductive layer; at least one conductive via formed in the composite substrate and electrically connected to the upper conductive layer and the lower conductive layer; a die mounted in the accommodating space and having a first surface and a second surface; a molding layer covering the composite substrate and filled in the at least one conductive via and the accommodating space to wrap the die; the support layer buried in the molding layer and located above the upper conductive layer; a redistribution layer mounted on the molding layer and electrically connected to the first surface of the die and the upper conductive layer; wherein the molding layer is formed by laminating a first insulating sheet and a second insulating sheet.

Abstract: A quantum memory device includes: a waveguide configured to spatially confine paths of photons therein; a memory cell that includes a micro-ring resonator (MRR), a frequency tuner, and a quantum memory material portion, wherein the MRR includes a first segment that is parallel to a segment of the waveguide, wherein the frequency tuner is configured to modulate a photon resonance frequency in the MRR by modifying an effective refractive index within, or around, a second segment of the MRR, and wherein the quantum memory material portion includes a quantum memory material having a ground state and an excitation state that stores photons therein and located within or on a third segment of the MRR; and a control circuit configured to modulate the photon resonance wavelength in the MRR during a first step of a photon capture operation to match a predefined wavelength, and to generate captured photons in the MRR.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.

Abstract: A mask includes a reflective multilayered stack, a capping layer over the reflective multilayered stack, an absorber layer over the capping layer, and at least one of: a buffer layer between the reflective multilayered stack and the capping layer, and a protection layer between the capping layer and the absorber layer. A method of manufacturing a mask includes forming a reflective multilayered stack, forming a capping layer over the reflective multilayered stack, forming an absorber layer over the capping layer, and forming at least one of the following: a buffer layer over the reflective multilayered stack before forming the capping layer, and a protection layer over the capping layer before forming the absorber layer. A method of manufacturing a semiconductor device includes directing radiation to a mask and reflecting patterned light from the mask and onto a photoresist layer disposed on a substrate.

Abstract: A probe card monitoring system is adapted for any one of a probe card including a reinforcement frame and a printed circuit board or a prober including a head plate and a clamping mechanism, and includes at least one sensor and a control unit. The at least one sensor is disposed in one of the probe card and the prober to measure a distance between the probe card and the prober in at least one axial direction. The control unit is coupled to the at least one sensor and is configured to issue an alarm. A probe card monitoring method is also provided.

Abstract: A transformer-based network and method for generic face image quality assessment (GFIQA), predicting perceptual scores for face images. The DSL is a self-supervised approach for learning degradation features globally. This network and method effectively captures global degradation representations from both synthetically and naturally degraded images, enhancing the learning process of degradation characteristics. The network's attention is enhanced to salient facial components by integrating facial landmark detection, enabling a holistic quality evaluation that adaptively aggregates local quality assessment across the face.

Abstract: A signal generator circuit is provided. The gate of a first transistor and the drain of a second transistor are coupled to a first output terminal. The sources of the first and second transistors are coupled to a first power terminal. The drains of the first and third transistors, and the gate of the second transistor are coupled to a second output terminal. The gate of the third transistor is coupled to a second power terminal. The source of the third transistor is coupled to a third power terminal. A fourth transistor is coupled to the second power terminal and the first output terminal. When the third transistor is turned off, a first bias circuit turns on the fourth transistor. A second bias circuit provides a first predetermined voltage to the second transistor. A third bias circuit provides a second predetermined voltage to the first transistor.

Abstract: A package with a side-wettable structure formed on via walls has a composite substrate covered with a molding layer; an upper redistribution layer is formed on the molding layer, and an edge of the upper redistribution layer is uncovered with a solder mask to form at least one edge bonding surface; at least one conductive contact formed by cutting at least one conductive via is located adjacent to an edge of the composite substrate, and each edge bonding surface is connected with a cutting surface of each conductive contact; an anti-oxidation conductive layer is mounted on each cutting surface and a side wall of each conductive contact. The anti-oxidation conductive layer is adopted for a solder adsorption, so that an Automated Optical Inspection instrument can determine contacting situations between the package of the present invention and another component.

Abstract: A first transformer includes a first primary winding and a first secondary winding. The first primary winding is coupled to a first phase branch to produce a first waveform. The first secondary winding is serially coupled to a compensation branch. A second transformer includes a second primary winding and a second secondary winding. The second primary winding is coupled to a second phase branch to produce a second waveform. The second secondary winding is serially coupled to the first secondary winding. An output node is coupled to the first phase branch and the second phase branch to provide an output waveform. The output waveform includes the first waveform and the second waveform, and has a transient response based on a first harmonic factor of the first phase branch and a second harmonic factor of the second phase branch.

Abstract: A first primary winding of a first transformer is coupled to a first phase branch to produce a first waveform. A second primary winding of a second transformer is coupled to a second phase branch to produce a second waveform. A first secondary winding of the first transformer and a second secondary winding of the second transformer are serially coupled to a compensation branch. The compensation branch includes a variable inductor having an inductance that corresponds to a threshold current. An output node is coupled to the first phase branch and the second phase branch to provide an output waveform. The output waveform includes the first waveform and the second waveform, and has a transient response based on a first harmonic factor of the first phase branch and a second harmonic factor of the second phase branch.

Abstract: An aluminum battery including an electrode structure is provided. The electrode structure includes a substrate and a channel layer located on the substrate. A material of the channel layer includes an aluminum chloride. A manufacturing method of an aluminum battery is also provided.

Abstract: Semiconductor package includes a pair of dies, a redistribution structure, and a conductive plate. Each die includes a contact pad. Redistribution structure is disposed on the pair of dies, and electrically connects the pair of dies. Redistribution structure includes an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. Innermost dielectric layer is closer to the pair of dies. Redistribution conductive layer extends between the innermost dielectric layer and the outermost dielectric layer. Outermost dielectric layer is furthest from the pair of dies. Conductive plate is electrically connected to the contact pads of the pair of dies. Conductive plate extends over the outermost dielectric layer of the redistribution structure and over the pair of dies. Vertical projection of the conductive plate falls on spans of the dies of the pair of dies.

Abstract: A dual bimorph assembly includes a multilaminar element structure where each elements includes a perforated metal layer, a suffusing conductive ink layer and a transductive assembly. A retainer assembly is provided with conductive tabs and a retainer through connector electrically connects metal layers.

Abstract: A method of making a bimorph assembly by stacking a perforated outer bottom metal layer, a transductive element, a perforated central metal layer, a second transductive element, and a perforated outer top metal layer to form a laminar structure, the metal layers and transductive elements being separated by thin conductive ink layers. Applying uniform and continuous pressure to the bottom and top surfaces of the laminar structure. Thermal cycling the laminar structure according to a thermal profile that causes suffusion of the thin conductive ink layers into the metal perforations and the transductive element surface. Removing the pressure from the bottom and top surfaces of the laminar structure and applying an electric field to the central metal layer, the outer top metal layer, and the outer bottom metal layer.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a fin structure over a semiconductor substrate. The semiconductor device structure also includes a gate stack covering a portion of the fin structure, and the gate stack includes a work function layer and a metal filling over the work function layer. The semiconductor device structure further includes an isolation element over the semiconductor substrate and adjacent to the gate stack. The isolation element is in direct contact with the work function layer and the metal filling.

Abstract: An omni-directional portable belongings carrying device includes a guide rail component, the guide rail component in the form of a loop for being worn on or fixed to a user; at least one connecting component, of which a first side forms a sliding pair with respect to the guide rail component, so that the connecting component is slidably movable along the guide rail component omnidirectionally around the user by 360 degrees, a second side of the connecting component being connectable with a carry-on item. The user is allowed to move the carry-on item connected to the connecting component along the guide rail component at will by means of the connecting component to allow the user to conveniently use the carry-on item.

Abstract: A trigger circuit coupled between an input-output pad and a core circuit and including an adjustment circuit and a protection circuit is provided. The adjustment circuit adjusts the voltage of the input-output pad to generate an output voltage. The protection circuit is coupled between the adjustment circuit and the core circuit and receives a system enable signal. In response to the system enable signal being disabled or an electrostatic discharge (ESD) event occurring on the input-output pad, the protection circuit disables the core circuit according to the output voltage. In response to the system enable signal being enabled, the protection circuit stops disabling the core circuit.

Abstract: A contact structure according to the present disclosure includes a device layer over a substrate, a dielectric structure over the device layer, a first etch stop layer (ESL) over the dielectric structure, a through via extending through the dielectric structure and the device layer and including a top portion of the through via rises above the first ESL, a guard ring structure over the first ESL and surrounding the top portion of the through via, a protective layer disposed over the guard ring structure, a second ESL disposed conformally over a top surface of the first ESL, sidewalls of the guard ring structure, sidewalls of the protective layer, and a top surface of the protective layer, and a dielectric layer of the second ESL.