Patents by Inventor Wei-Ting Chen

Wei-Ting Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250125292
    Abstract: A side-wettable package with edge-recessed bond pads has a composite substrate, and the composite substrate is covered with a molding layer. An upper redistribution layer is formed on the molding layer, and the upper redistribution layer is covered with a solder mask and part of the upper redistribution is exposed to form at least one surface bond pad. Surfaces of each surface bond pad are formed with an anti-oxidation conductive layer, wherein at least one side surface of each surface bond pad is recessed relative to side surfaces of the molding layer. The present invention does not form the side-wettable structure by cutting the upper redistribution layer to prolong service life of cutting Wheels and structural stability of the package. The anti-oxidation conductive layer increases a contacting area between solder and each surface bond pad, thereby facilitating AOI instruments to determine soldering condition of the package and another component.
    Type: Application
    Filed: October 14, 2024
    Publication date: April 17, 2025
    Inventors: CHUNG-HSIUNG HO, CHI-HSUEH LI, CHIEN-CHUN WANG, WEI-TING CHEN, WEI-TING CHEN
  • Publication number: 20250120008
    Abstract: A package capable of eliminating bubble formation includes a composite substrate having an accommodating space, an upper conductive layer and a lower conductive layer; at least one conductive via formed in the composite substrate and electrically connected to the upper conductive layer and the lower conductive layer; a die mounted in the accommodating space and having a first surface and a second surface; a molding layer covering the composite substrate and filled in the at least one conductive via and the accommodating space to wrap the die; the support layer buried in the molding layer and located above the upper conductive layer; a redistribution layer mounted on the molding layer and electrically connected to the first surface of the die and the upper conductive layer; wherein the molding layer is formed by laminating a first insulating sheet and a second insulating sheet.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 10, 2025
    Applicant: PANJIT INTERNATIONAL INC.
    Inventors: CHUNG-HSIUNG HO, CHI-HSUEH LI, WEI-TING CHEN
  • Publication number: 20250087533
    Abstract: A method of forming a semiconductor device includes: forming a via in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; forming an opening in the second dielectric layer, where the opening exposes an upper surface of the via; selectively forming a capping layer over the upper surface of the via, where the capping layer has a curved upper surface that extends above a first upper surface of the first dielectric layer distal from the substrate; after forming the capping layer, forming a barrier layer in the opening over the capping layer and along sidewalls of the second dielectric layer exposed by the opening; and filling the opening by forming an electrically conductive material over the barrier layer.
    Type: Application
    Filed: March 28, 2024
    Publication date: March 13, 2025
    Inventors: Ming-Hsing Tsai, Ya-Lien Lee, Chih-Han Tseng, Kuei-Wen Huang, Kuan-Hung Ho, Ming-Uei Hung, Chih-Cheng Kuo, Yi-An Lai, Wei-Ting Chen
  • Publication number: 20250085622
    Abstract: EUV masks and methods of fabrication thereof are described herein. An exemplary method includes receiving an EUV mask having a multilayer structure, a capping layer disposed over the multilayer structure, a patterned absorber layer disposed over the capping layer, and a patterned hard mask disposed over the patterned absorber layer. The method further includes removing the patterned hard mask by performing a first etching process to partially remove the patterned hard mask and performing a second etching process to remove a remainder of the patterned hard mask. The first etching process uses a first etchant, and the second etching process uses a second etchant. The second etchant is different than the first etchant. In some embodiments, the first etchant is a halogen-based plasma (e.g., a Cl2 plasma), and the second etchant is a halogen-and-oxygen-based plasma (e.g., a Cl2+O2 plasma).
    Type: Application
    Filed: January 18, 2024
    Publication date: March 13, 2025
    Inventors: Chun-Lang CHEN, Chung-Yang HUANG, Shih-Hao YANG, Chien-Yun HUANG, Wei-Ting CHEN
  • Patent number: 12242023
    Abstract: Polarization-insensitive metasurfaces using anisotropic nanostructures are disclosed. These anisotropic structures allow for an accurate implementation of phase, group delay, and group delay dispersion, while simultaneously making it possible to realize a polarizationinsensitive, diffraction-limited and achromatic metalens for wavelength, e.g., ?=from about 460 nm to about 700 nm. The approach of polarization-insensitivity can be also applied for other metasurface devices with applications in, e.g., imaging and virtual or augmented reality.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: March 4, 2025
    Assignee: PRESIDENT AND FELLOWS OF HARVARD COLLEGE
    Inventors: Wei-Ting Chen, Alexander Yutong Zhu, Federico Capasso
  • Publication number: 20250029870
    Abstract: A method for forming an interconnection structure includes depositing a dielectric layer over a first interconnect layer, wherein the first interconnect layer comprises a first metallization layer; forming a via opening in the dielectric layer, and forming a conductive via in the via opening. Forming the via opening includes: etching a recess in the dielectric layer above the first metallization layer; etching a first lateral recess in the dielectric layer at a sidewall of the recess; and after etching the first lateral recess, etching the recess downward to expose the first metallization layer.
    Type: Application
    Filed: July 19, 2023
    Publication date: January 23, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Feng LEE, Wei-Ting CHEN, Chen-Chung LAI
  • Patent number: 12169306
    Abstract: An optical system, comprising: (i) multiple input optical fibers; (ii) an optical mode multiplexer/demultiplexer coupled to said input optical fibers with, said optical mode multiplexer/demultiplexer comprising a plurality of metamaterial structures having length and forming at least one stage of metamaterials, the at least one stage of metamaterials is being situated on a surface of the optical mode multiplexer/demultiplexer facing the input optical fibers, and the at least one stage of metamaterials is oriented at angles between 60 and 120 degrees relative to the axis of the input fibers; and the metasurfaces are structured to receive a first optical signal having a first mode from at least one of said multiple input optical fibers and convert the first mode to a different mode.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: December 17, 2024
    Assignees: CORNING INCORPORATED, President and Fellows of Harvard College
    Inventors: Federico Capasso, Wei-Ting Chen, Paulo Clovis Dainese, Jr., Kangmei Li, Ming-Jun Li, Jaewon Oh, Jun Yang
  • Publication number: 20240402423
    Abstract: A quantum memory device includes: a waveguide configured to spatially confine paths of photons therein; a memory cell that includes a micro-ring resonator (MRR), a frequency tuner, and a quantum memory material portion, wherein the MRR includes a first segment that is parallel to a segment of the waveguide, wherein the frequency tuner is configured to modulate a photon resonance frequency in the MRR by modifying an effective refractive index within, or around, a second segment of the MRR, and wherein the quantum memory material portion includes a quantum memory material having a ground state and an excitation state that stores photons therein and located within or on a third segment of the MRR; and a control circuit configured to modulate the photon resonance wavelength in the MRR during a first step of a photon capture operation to match a predefined wavelength, and to generate captured photons in the MRR.
    Type: Application
    Filed: May 31, 2023
    Publication date: December 5, 2024
    Inventors: Chung-Hao Tsai, Ching-Ho Chin, Wei-Ting Chen, Chuei-Tang Wang, Chen-Hua Yu
  • Publication number: 20240379738
    Abstract: A package structure and a formation method are provided. The method includes forming a capacitor element over a first chip structure and forming a dielectric layer over the capacitor element. The method also includes forming a conductive bonding structure in the dielectric layer. A top surface of the conductive bonding structure is substantially coplanar with a top surface of the dielectric layer. The conductive bonding structure penetrates through the capacitor element and is electrically connected to the capacitor element. The method further includes bonding a second chip structure to the dielectric layer and the conductive bonding structure through dielectric-to-dielectric bonding and metal-to-metal bonding.
    Type: Application
    Filed: May 10, 2023
    Publication date: November 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Ting CHEN, Chung-Hao TSAI, Chen-Hua YU, Chuei-Tang WANG
  • Publication number: 20240367295
    Abstract: The invention relates to a power tool that can be held with one hand for reversing, comprising: a casing having a grip part and a manipulation port; a driving device having a control member; the control member is capable of controlling an actuation direction of the driving device; a power source disposed below the driving device and capable of driving the driving device; a reversing assembly disposed at a periphery of the power source and having a reversing member; the reversing member controls the control member to generate changes of displacement, a driving direction of the driving device is changed by action of turning the reversing assembly that is away from the driving device, and there is an appropriate manipulating distance between the grip part and the manipulation port, so that a user is capable of manipulating by holding and reversing the power tool with one hand at a same position, and the control member is capable of being driven to perform reversing when the driving device is driven.
    Type: Application
    Filed: July 16, 2024
    Publication date: November 7, 2024
    Inventors: Chih-Hua HSU, Wei-Ting CHEN, Ying Chih WANG, Zong Hua LI
  • Publication number: 20240356300
    Abstract: A method of making an optical device. The method comprises providing a semiconductor wafer, providing an array of emitters located on a first side of the wafer and providing one or more optical components on a second, opposite side of the wafer, wherein the or each optical component is arranged to split light from an associated emitter of the array of emitters. The method further comprises emitting light with the associated emitter, receiving light emitted by the associated emitter and transmitted through the optical component on the second side of the wafer, and determining an alignment between the one or more optical components and the array of emitters from the received light.
    Type: Application
    Filed: July 19, 2022
    Publication date: October 24, 2024
    Inventors: Baiming GUO, Qing WANG, Wei Ting CHEN, Feng ZHAO, Alexander MIGLO, Jichi MA, Guoyang XU
  • Publication number: 20240357939
    Abstract: A structurally integral multilaminar planer device is provided where the layers are bonded without use of adhesive. The device includes a perforated metal plate and a transductive ceramic layer. The perforated metal plate and transductive ceramic layer are bonded by a conductive metal ink that is subject to a thermal cycle process.
    Type: Application
    Filed: June 19, 2024
    Publication date: October 24, 2024
    Applicant: Qortek, Inc.
    Inventors: Wei-Ting Chen, Safakcan Tundemir, Ahmet E. Gurdal, Gareth J. Knowles, Clive A. Randall
  • Publication number: 20240355771
    Abstract: A method for forming a chip package structure is provided. The method includes providing a first substrate and a second substrate. The first substrate includes a first semiconductor base and a first bonding line over a front surface of the first semiconductor base, and the second substrate includes a second semiconductor base and a second bonding line over the second semiconductor base. The method includes bonding the second substrate to the first substrate. The first bonding line is in contact with the second bonding line. The method includes forming a conductive line over a back surface of the first semiconductor base. The conductive line is thicker than the first bonding line. The method includes forming a conductive bump over the back surface of the first semiconductor base. The conductive line is between the conductive bump and the first semiconductor base.
    Type: Application
    Filed: April 24, 2023
    Publication date: October 24, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chuei-Tang Wang, Chung-Hao Tsai, Chen-Hua Yu, Wei-Ting Chen, Chia-Chia Lin
  • Publication number: 20240345134
    Abstract: A probe card monitoring system is adapted for any one of a probe card including a reinforcement frame and a printed circuit board or a prober including a head plate and a clamping mechanism, and includes at least one sensor and a control unit. The at least one sensor is disposed in one of the probe card and the prober to measure a distance between the probe card and the prober in at least one axial direction. The control unit is coupled to the at least one sensor and is configured to issue an alarm. A probe card monitoring method is also provided.
    Type: Application
    Filed: May 9, 2023
    Publication date: October 17, 2024
    Applicant: HERMES TESTING SOLUTIONS INC.
    Inventors: Wei-Ting Chen, Shih-Ying Chou
  • Patent number: 12076840
    Abstract: The invention relates to a power tool that can be held with one hand for reversing, comprising: a casing having a grip part and a manipulation port; a driving device having a control member; the control member is capable of controlling an actuation direction of the driving device; a power source disposed below the driving device and capable of driving the driving device; a reversing assembly disposed at a periphery of the power source and having a reversing member; the reversing member controls the control member to generate changes of displacement, a driving direction of the driving device is changed by action of turning the reversing assembly that is away from the driving device, and there is an appropriate manipulating distance between the grip part and the manipulation port, so that a user is capable of manipulating by holding and reversing the power tool with one hand at a same position.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: September 3, 2024
    Assignee: TECHWAY INDUSTRIAL CO., LTD.
    Inventors: Fu-Hsiang Chung, Wei-Ting Chen, Zong Hua Li, Kai Chien Yang
  • Publication number: 20240272546
    Abstract: A dot pattern projector and its associated method of manufacture. The dot pattern projector utilizes VCSEL diodes that shine infrared light through a transparent layer. The VCSEL diodes can be formed directly onto the transparent layer or onto a substrate that is in contact with the transparent layer. The VCSEL diodes are lithographically formed into a matrix, wherein each of the VCSEL diodes shines a cone of infrared light into and through the transparent layer. Each cone of infrared light intersects at least one other cone of infrared light within the transparent layer. A dielectric layer covers the transparent layer. The dielectric layer reduces reflections at the second surface of the transparent layer. A metasurface is formed on the dielectric layer. The metasurface converts the light passing through the dielectric layer into a specific dot pattern or other such pattern.
    Type: Application
    Filed: February 14, 2024
    Publication date: August 15, 2024
    Inventors: Wei Ting Chen, Qing Wang
  • Patent number: 12048247
    Abstract: A wire-free multilayer biomorph device is provided where the layers are bonded without use of adhesive. The device includes a plurality of stacked perforated metal plates with interposed transductive assembly layers. The perforated metal plates and transductive assembly layers are bonded by a conductive metal ink that is subject to a thermal cycle process. Electrical connection of the perforated metal plates and transductive assembly are realized through structural connectors thru-connectors thereby obviating the need for wiring.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: July 23, 2024
    Assignee: QorTek, Inc.
    Inventors: Wei-Ting Chen, Safakcan Tuncdemir, Ahmet E. Gurdal, Gareth J. Knowles, Clive A. Randall
  • Patent number: 12007063
    Abstract: A stand adjustment device has a tripod-connecting member, a connecting seat, a distal clamping plate, a boom-connecting tube, a locking shaft, and a manual operating member. The connecting seat is rotatably located around the tripod-connecting member. The distal clamping plate is detachably attached to a side of the connecting seat. One end of the locking shaft is movably disposed in the boom-connecting tube. The boom is slidably mounted through the boom-connecting tube and the locking shaft. The locking shaft is slidably mounted through the boom-connecting tube, the distal clamping plate, and the connecting seat such that the boom-connecting tube is rotatable relative to the connecting seat. The manual operating member and the locking shaft are configured to clamp the boom-connecting tube, the distal clamping plate, and the connecting seat therebetween into a locked condition.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: June 11, 2024
    Assignee: RELIANCE INTERNATIONAL CORP.
    Inventors: Pei-Chi Chu, Cheng-Lin Ho, Chi-Chia Huang, Wei-Ting Chen
  • Patent number: 11997327
    Abstract: A system for playing specific streaming selected from combined streamings and a method thereof are disclosed. In the system, an array server combines video streamings outputted from signal sources, to form a multi-source streaming including all video streamings, and transmits the combined multi-source streaming to a streaming server, the streaming server provides the multi-source streaming to a client end, the client end obtains the video streaming to be played from the received multi-source streaming. Therefore, a user can immediately switch the video streamings with different view angles while watching live broadcast, so as to achieve the technical effect of reducing the streaming load of the server during live broadcast.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: May 28, 2024
    Assignee: Light Matrix Inc.
    Inventor: Wei-Ting Chen
  • Publication number: 20240162159
    Abstract: Semiconductor package includes a pair of dies, a redistribution structure, and a conductive plate. Dies of the pair of dies are disposed side by side. Each die includes a contact pad. Redistribution structure is disposed on the pair of dies, and electrically connects the pair of dies. Redistribution structure includes an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. Innermost dielectric layer is closer to the pair of dies. Redistribution conductive layer extends between the innermost dielectric layer and the outermost dielectric layer. Outermost dielectric layer is furthest from the pair of dies. Conductive plate is electrically connected to the contact pads of the pair of dies. Conductive plate extends over the outermost dielectric layer of the redistribution structure and over the pair of dies. Vertical projection of the conductive plate falls on spans of the dies of the pair of dies.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 16, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang WANG, Wei-Ting Chen, Chien-Hsun Chen, Shih-Ya Huang