Abstract: An apparatus for producing silicon carbide crystal is provided and includes a composite structure formed by a plurality of graphite layers and silicon carbide seed crystals, wherein a density or thickness of each layer of graphite is gradually adjusted to reduce a difference of a thermal expansion coefficient and Young's modulus between the graphite layers and silicon carbide. The composite structure can be stabilized on a top portion or an upper cover of a crucible made of graphite, thereby preventing the silicon carbide crystal from falling off.

Abstract: A method, system, and article provide image processing with power reduction while using universal serial bus cameras.

Abstract: A manufacturing method of a semiconductor structure is provided. A first semiconductor die includes a first semiconductor substrate, a first interconnect structure formed thereon, a first bonding conductor formed thereon, and a conductive via extending from the first interconnect structure toward a back surface of the first semiconductor substrate. The first semiconductor substrate is thinned to accessibly expose the conductive via to form a through semiconductor via (TSV). A second semiconductor die is bonded to the first semiconductor die. The second semiconductor die includes a second semiconductor substrate including an active surface facing the back surface of the first semiconductor substrate, a second interconnect structure between the second and the first semiconductor substrates, and a second bonding conductor between the second interconnect structure and the first semiconductor substrate and bonded to the TSV.

Abstract: A directional patterning method includes following steps. A substrate is provided with a mask layer thereon, and the mask layer has at least one opening pattern therein. A cyclic deposition and etching process is performed to increase a length of the at least one opening pattern.

Abstract: The present invention is directed to a method of treating acute ischemic stroke in a human comprising administering one of more low doses of DC009, wherein the dose is about 0.01-0.075 mg/kg/dose. The low dose administration is safe and effective in treating acute ischemic stroke in a human subject.

Abstract: In a method of forming a pattern, a photo resist layer is formed over an underlying layer, the photo resist layer is exposed to an actinic radiation carrying pattern information, the exposed photo resist layer is developed to form a developed resist pattern, a directional etching operation is applied to the developed resist pattern to form a trimmed resist pattern, and the underlying layer is patterned using the trimmed resist pattern as an etching mask.

Abstract: A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.

Abstract: The present disclosure provides a method for semiconductor manufacturing in accordance with some embodiments. The method includes forming a hard mask layer over a substrate, the substrate having one or more regions to receive a treatment process, forming a resist layer over the hard mask layer, patterning the resist layer to form a plurality of openings in the resist layer, each of the openings free of concave corners, performing an opening expanding process to enlarge at least one of the openings in the resist layer, transferring the openings in the resist layer to the hard mask layer, and performing the treatment process to the one or more regions in the substrate through the openings in the hard mask layer.

Abstract: In a method of forming a pattern, a photo resist layer is formed over an underlying layer, the photo resist layer is exposed to an actinic radiation carrying pattern information, the exposed photo resist layer is developed to form a developed resist pattern, a directional etching operation is applied to the developed resist pattern to form a trimmed resist pattern, and the underlying layer is patterned using the trimmed resist pattern as an etching mask.

Abstract: The present disclosure provides a method for semiconductor manufacturing in accordance with some embodiments. The method includes providing a substrate and a patterning layer over the substrate and forming a plurality of openings in the patterning layer. The substrate includes a plurality of features to receive a treatment process. The openings partially overlap with the features from a top view while a portion of the features remains covered by the patterning layer. Each of the openings is free of concave corners. The method further includes performing an opening expanding process to enlarge each of the openings and performing a treatment process to the features through the openings. After the opening expanding process, the openings fully overlap with the features from the top view.

Abstract: A card connector includes a transmission conductor assembly that includes a backup transmission conductor, a first signal transmission conductor, an inspection signal transmission conductor, a first grounding transmission conductor, a command reset transmission conductor, a first differential transmission conductor, a second differential transmission conductor, a second grounding transmission conductor, a third grounding transmission conductor, a fourth grounding transmission conductor, a first power transmission conductor, a second power transmission conductor, a third differential transmission conductor, a fourth differential transmission conductor, a second signal transmission conductor, a fifth grounding transmission conductor, a sixth grounding transmission conductor, a seventh grounding transmission conductor, a fifth differential transmission conductor, a sixth differential transmission conductor, and a write-protection transmission conductor, each of which has two ends respectively forming a spring se

Abstract: A power-saving method for an HDMI device is provided. The method includes detecting color depth information of video data from an HDMI source which is connected to the HDMI port, deriving a horizontal length for each line by fragment of a picture frame according to the color depth information, generating a plurality of synchronization signals according to the horizontal length for each line by fragment, and powering on the HDMI port, according to the synchronization signals, for a predetermined time period to obtain encrypted information from the HDMI source, and powering off the HDMI port after the predetermined time period.

Abstract: A memory structure and a manufacturing method for the same are provided. The memory structure includes a memory element, a spacer structure, and an upper element structure. The memory element includes a lower memory layer and an upper memory layer on the lower memory layer. The spacer structure is on a sidewall surface of the lower memory layer. The upper element structure is electrically connected on the upper memory layer. A recess is defined by a lower surface of the upper element structure, an upper surface of the lower memory layer and a sidewall surface of the upper memory layer.

Abstract: Various integrated circuit (IC) design methods are disclosed herein. An exemplary method includes receiving an IC design layout having an IC feature to be formed on a wafer using a lithography process and inserting a spacing in the IC feature, thereby generating a modified IC design layout that divides the IC feature into a first main feature and a second main feature separated by the spacing. The spacing has a sub-resolution dimension, such that the IC feature does not include the spacing when formed on the wafer by the lithography process using the modified IC design layout. A mask can be fabricated based on the modified IC design layout, wherein the mask includes the first main feature and the second main feature separated by the spacing. A lithography process can be performed using the mask to form the IC feature (without the spacing) on a wafer.

Abstract: In a method of manufacturing a semiconductor device, an underlying structure is formed over a substrate. A film is formed over the underlying structure. Surface topography of the film is measured and the surface topography is stored as topography data. A local etching is performed by using directional etching and scanning the substrate so that an entire surface of the film is subjected to the directional etching. A plasma beam intensity of the directional etching is adjusted according to the topography data.

Abstract: A vacuum suction wall-climbing robot including a body, a vacuum pump and at least four leg mechanisms is disclosed. Each leg mechanism includes a foot unit and a limb unit connecting the foot unit and the body. The foot unit includes a plurality of suction sets connected to the vacuum pump through a pipe. Each suction set includes a sucker able to create a vacuum state within a contact area through the operation of the vacuum pump, and a sheet valve arranged between the pipe and the sucker, which automatically closes the connection between the pipe and the sucker when the vacuum state between the sucker and the contact area becomes a non-vacuum state.

Abstract: A transmitter is provided. the transmitter includes a hybrid feedback circuit and a hybrid driving circuit. The hybrid feedback circuit compares a reference voltage with a feedback voltage in closed-loop, determines whether to perform polarity reversal according to a mode control signal, controls power output according to a comparison result and the mode control signal, and generates a first output signal. The hybrid driving circuit, coupled to the hybrid feedback circuit, receives the first output signal of the hybrid feedback circuit, generates a transmitter output signal according to an input data, and generates a second output signal according to the transmitter output signal. The first output signal and the second output signal are transmitted back to the hybrid feedback circuit.

Abstract: A method includes providing a substrate having a surface such that a first hard mask layer is formed over the surface and a second hard mask layer is formed over the first hard mask layer, forming a first pattern in the second hard mask layer, where the first pattern includes a first mandrel oriented lengthwise in a first direction and a second mandrel oriented lengthwise in a second direction different from the first direction, and where the first mandrel has a top surface, a first sidewall, and a second sidewall opposite to the first sidewall, and depositing a material towards the first mandrel and the second mandrel such that a layer of the material is formed on the top surface and the first sidewall but not the second sidewall of the first mandrel.

Abstract: In a method of manufacturing a semiconductor device, an underlying structure is formed over a substrate. A film is formed over the underlying structure. Surface topography of the film is measured and the surface topography is stored as topography data. A local etching is performed by using directional etching and scanning the substrate so that an entire surface of the film is subjected to the directional etching. A plasma beam intensity of the directional etching is adjusted according to the topography data.

Abstract: A method of depositing a material on one of two, but not both, sidewalls of a raised structure formed on a substrate includes tilting a normal of the substrate away from a source of the deposition material or tilting the source of the deposition material away from the normal of the substrate. The method may be implemented by a plasma-enhanced chemical vapor deposition (PECVD) technique.