Abstract: Antibody molecules that specifically bind to LAG-3 and bispecific antibody molecules with a first binding specificity for LAG-3 and a second binding specificity for one of PD-1, TIM-3, CEACAM-1, CEACAM-5, PD-L1, or PD-L2, are disclosed. The anti-LAG-3 antibody molecules can be used to treat, prevent and/or diagnose cancerous or infectious disorders.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip having an interconnect structure overlying a substrate. The interconnect structure includes a conductive wire disposed in a dielectric structure. The conductive wire comprises a body structure. A passivation structure overlies the interconnect structure. A bond pad overlies the passivation structure. The bond pad comprises an upper pad structure on the passivation structure and a plurality of lower bond structures extending through the passivation structure to the conductive wire. The lower bond structures respectively comprise a vertical bond structure and a diffusion barrier layer disposed along a lower surface and opposing sidewalls of the vertical bond structure.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes an interconnect structure disposed over a substrate. The interconnect structure includes a plurality of interconnect layers disposed within a dielectric structure. A bond pad structure is disposed over the interconnect structure. The bond pad structure includes a contact layer. A first masking layer including a metal-oxide is disposed over the bond pad structure. The first masking layer has interior sidewalls arranged directly over the bond pad structure to define an opening. A conductive bump is arranged within the opening and on the contact layer.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first and second gate electrode layers, and a dielectric feature disposed between the first and second gate electrode layers. The dielectric feature has a first surface. The structure further includes a first conductive layer disposed on the first gate electrode layer. The first conductive layer has a second surface. The structure further includes a second conductive layer disposed on the second gate electrode layer. The second conductive layer has a third surface, and the first, second, and third surfaces are coplanar. The structure further includes a third conductive layer disposed over the first conductive layer, a fourth conductive layer disposed over the second conductive layer, and a dielectric layer disposed on the first surface of the dielectric feature. The dielectric layer is disposed between the third conductive layer and the fourth conductive layer.

Abstract: The present application provides a method, a device, an apparatus, and storage medium for deviation correction of an electrode sheet. The deviation correction method of the electrode sheet includes: determining the first deviation amount of the electrode sheet on the stacking machine in the first direction; correcting a deviation of the electrode sheet in the first direction according to the first deviation amount; determining the second deviation amount of the electrode sheet in the second direction, wherein the second deviation amount is different from the first deviation amount; and correcting a deviation of the electrode sheet in the second direction according to the second deviation amount.

Abstract: Antibody molecules that specifically bind to PD-1 are disclosed. The anti-PD-1 antibody molecules can be used to treat, prevent, and/or diagnose cancerous or infectious conditions and disorders.

Abstract: An electrode assembly includes: a positive electrode plate, a first separator, a negative electrode plate and a second separator, the positive electrode plate, the first separator, the negative electrode plate and the second separator being wound to form the electrode assembly, wherein the first separator and the second separator are configured to isolate the positive electrode plate from the negative electrode plate, and a winding start end of the negative electrode plate, a winding start end of the first separator and a winding start end of the second separator are substantially aligned with one another.

Abstract: A method includes forming first integrated circuit devices and second integrated circuit devices on a semiconductor substrate of a wafer, forming a metal layer as a part of the wafer, and forming a transistor comprising a first source/drain region connected to the first integrated circuit devices. The transistor is farther away from the semiconductor substrate than the metal layer. An electrical connector is formed on a surface of the wafer, and is electrically connected to a second source/drain region of the transistor.

Abstract: A diffusion barrier layer is included in a piezoelectric device that includes a plurality of piezoelectric layers. The diffusion barrier layer may be included to trap and/or block lead (Pb) and/or lead oxide (PbOx) from diffusing toward a first piezoelectric layer that occurs during a sol-gel process that used to form a second piezoelectric layer after the first piezoelectric layer formed. Blocking and/or trapping the diffusion of lead (Pb) and/or lead oxide (PbOx) using the diffusion barrier layer may reduce the likelihood of and/or prevent delamination in the piezoelectric device.

Abstract: The embodiments of this application provide an electrode plate, an electrode assembly, a battery cell, a battery, and an electric device. The electrode plate includes a current collector, where the current collector includes a first region, a second region, and a tab that are arranged sequentially in a first direction, the first region is coated with an active substance layer, and the second region is not coated with the active substance layer; and a protective layer, where the protective layer at least partially covers an edge of the second region close to the tab and exceeds the edge of the second region close to the tab in the first direction. The technical solution provided by the embodiments of this application can prevent burrs on the current collector from piercing a separator and thus causing a short circuit in the battery, thereby improving the safety performance of the battery.

Abstract: Semiconductor devices and methods are provided which facilitate performing physical failure analysis (PFA) testing from a backside of the devices. In at least one example, a device is provided that includes a semiconductor device layer including a plurality of diffusion regions. A first interconnection structure is disposed on a first side of the semiconductor device layer, and the first interconnection structure includes at least one electrical contact. A second interconnection structure is disposed on a second side of the semiconductor device layer, and the second interconnection structure includes a plurality of backside power rails. Each of the backside power rails at least partially overlaps a respective diffusion region of the plurality of diffusion regions and defines openings which expose portions of the respective diffusion region at the second side of the semiconductor device layer.

Abstract: A device includes a plurality of tracks, wherein at least one of the plurality of tracks comprises a first power rail for a first voltage. The device further includes a first via in electrical contact with the power rail. The device further includes a first contact in electrical contact with the first via. The device further includes a first transistor in electrical contact with the first contact. The device further includes a second transistor in electrical isolation with the first transistor. The device further includes a second contact in electrical contact with the second transistor. The device further includes a second via in electrical contact with the second contact. The device further includes a second power rail in electrical contact with the second via, wherein the second power rail is configured to carry a second voltage.

Abstract: The present invention provides a polyimide-based copolymer and electronic component and field effect transistor comprising the same. The polyimide-based copolymer comprises a copolymer of dianhydride and heterocyclic diamine, wherein the heterocyclic diamine has two benzene rings, and there are two ether bonds, two thioether bonds, or one ether bond and one thioether bond between the two benzene rings. The novel polyimide-based copolymer of the invention has excellent thermal-mechanical stability, has potential application prospects, and can be used as a substrate for flexible electronics.

Abstract: A method for calibrating a laser machining system includes a scanner device for deflecting a laser beam to a plurality of positions on a surface and includes an observation device, an observation beam path of which runs coaxially to the laser beam path over the scanner device. The method includes calibrating the scanner device and calibrating the observation device. A laser machining system for machining a workpiece by means of a laser beam with a control configured to carry out said method is also provided.

Abstract: A method performed by a User Equipment (UE) for handling timing alignment is provided. The method receives, from a Base Station (BS), a first Radio Resource Control (RRC) message for configuring a Time Alignment Timer (TAT). The method receives, from the BS, a second RRC message for configuring at least one of a cell Discontinuous Transmission (DTX) operation or a cell Discontinuous Reception (DRX) operation. In a case that at least one of the cell DTX operation or the cell DRX operation is configured and the TAT expires, the method considers the UE to be uplink synchronized with the BS and forgoes performing a procedure for handling an out-of-sync condition related to the expiration of the TAT.

Abstract: The invention provides a display device and an operation method thereof. The display device includes a calculation unit and a local dimming driving unit. The calculation unit generates image data for displaying on a display panel. The calculation unit determines a location of a mouse pointer (cursor) in the image data based on an operation of a user interface device. The calculation unit defines an attention area corresponding to the mouse pointer based on the location of the mouse pointer. Based on information of the calculation unit, the local dimming driving unit enables a local dimming function for the attention area corresponding to the location of the mouse pointer, or disables the local dimming function for a non-attention area outside the attention area.

Abstract: A method for a User Equipment (UE) for enhancement in Network Energy Saving (NES) is provided. The method receives, from a Base Station (BS), a Radio Resource Control (RRC) message including a trigger state list and a Channel State Information (CSI) report configuration that includes one or more CSI report sub-configurations. The method receives, from the BS, a Downlink Control Information (DCI) format indicating a trigger state in the trigger state list. The trigger state is associated with the CSI report configuration and indicates a subset of CSI report sub-configurations in the one or more CSI report sub-configurations. The method then applies the subset of CSI report sub-configurations to perform a CSI reporting procedure on a Physical Uplink Shared Channel (PUSCH).

Abstract: A memory device includes a plurality of first peripheral circuits, a stack memory cell array and a first address circuit. The first peripheral circuits are disposed on a first chip, wherein the first chip has a plurality of first pads. The stack memory cell array is disposed on a second chip, wherein the second chip has a plurality of second pads. The second pads are coupled to the stack memory cell array, and respectively coupled to corresponding first pads. The first address circuit is disposed on the second chip, coupled to the stack memory cell array, and disposed under the stack memory cell array.

Abstract: Described herein is a UV/HEVL-filtering SiHy contact lens that not only has a relatively high UV/HEVL filtering capability but also has an aesthetic appealing color. The bulk silicone hydrogel of the UV/HEVL-filtering SiHy contact lens comprises repeating units of (1) at least one hydrophilic vinylic monomer, (2) at least one siloxane-containing vinylic monomer and/or at least one polysiloxane vinylic crosslinker, (3) at least one UV-absorbing vinylic monomer, and (4) a least one polymerizable HEVL-absorbing compound capable of absorbing HEVL between 380 nm and 450 nm and also comprises at least one blue-tinting agent and at least one optical brightener distributed therein.