Patents by Inventor Wen-Cheng Chen
Wen-Cheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240363577Abstract: An electronic package and a substrate structure thereof are provided, in which an electronic element and a flow stopper surrounding the electronic element are disposed on a substrate body of the substrate structure, and a heat dissipation structure is bonded on the electronic element via a heat dissipation material, so that the flow stopper limits an overflow range of the heat dissipation material to prevent the heat dissipation material from contaminating a circuit layer on the substrate body.Type: ApplicationFiled: July 24, 2023Publication date: October 31, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Pin-Jing SU, Wen-Yu TENG, Liang-Yi HUNG, Chia-Cheng CHEN, Yu-Po WANG
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Publication number: 20240355860Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a plurality of gate structures arranged along a first side of a substrate within a plurality of pixel regions. An etch block structure is arranged on the first side of the substrate between neighboring ones of the plurality of gate structures. A contact etch stop layer (CESL) is arranged on the etch block structure between the neighboring ones of the plurality of gate structures. An isolation structure is disposed between one or more sidewalls of the substrate and extends from a second side of the substrate to the first side of the substrate. The etch block structure is vertically between the isolation structure and the CESL.Type: ApplicationFiled: July 3, 2023Publication date: October 24, 2024Inventors: Hsin-Hung Chen, Wen-I Hsu, Wei Long Chen, Ming-En Chen, Feng-Chi Hung, Jen-Cheng Liu, Dun-Nian Yaung
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Patent number: 12117043Abstract: An air-floating guide rail device includes a guide rail unit, a slider unit, and a linear motor unit. The guide rail unit includes a guide rail body and two air-floating block sets made of a material different from that of the guide rail body and each including top and side air-floating blocks. The slider unit includes a main sliding seat and two lateral sliding seats connected integrally to the main sliding seat and each having first and second guiding surfaces transverse to each other and disposed respectively adjacent to corresponding top and side air-floating blocks, and first and second air guiding passages connecting the first and second guiding surfaces to the external environment. The linear motor unit includes a stator and a mover mounted fixedly to the main sliding seat and movable relative to the stator for driving linear movement of the slider unit relative to the guide rail unit.Type: GrantFiled: December 20, 2022Date of Patent: October 15, 2024Assignee: Toyo Nano System CorporationInventors: Kun-Cheng Tseng, Kuei-Tun Teng, Wei-Chih Chen, Wen-Chung Lin
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Publication number: 20240329361Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.Type: ApplicationFiled: June 7, 2024Publication date: October 3, 2024Inventors: Sin-Hong LIN, Yung-Ping YANG, Wen-Yen HUANG, Yu-Cheng LIN, Kun-Shih LIN, Chao-Chang HU, Yung-Hsien YEH, Mao-Kuo HSU, Chih-Wei WENG, Ching-Chieh HUANG, Chih-Shiang WU, Chun-Chia LIAO, Chia-Yu CHANG, Hung-Ping CHEN, Wei-Zhong LUO, Wen-Chang LIN, Shou-Jen LIU, Shao-Chung CHANG, Chen-Hsin HUANG, Meng-Ting LIN, Yen-Cheng CHEN, I-Mei HUANG, Yun-Fei WANG, Wei-Jhe SHEN
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Patent number: 12100641Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.Type: GrantFiled: July 18, 2023Date of Patent: September 24, 2024Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsien Chiu, Siang-Yu Lin, Wen-Jung Tsai, Chia-Yang Chen, Chien-Cheng Lin
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Publication number: 20240304394Abstract: This invention describes a packaging structure for roll-type (wound-type) aluminum conductive polymer capacitor element. Two protective substrates are applied to sandwich a roll-type capacitor element in between with an insulating material surrounding the capacitor element also in between the protective substrates. The protective substrates comprise electrically separated anodic conductive pad and cathodic conductive pad on their surfaces. The capacitor element is oriented with its axis perpendicular to the two substrates. The anodic and cathodic leads of the capacitor element pass through the through holes. An anodic external terminal is plated over the anodic conductive pad and a cathodic external terminal is plated over the cathodic conductive pad so that the anodic external terminal is electrically connected to the anodic lead and the cathodic external terminal is electrically connected to the cathodic lead.Type: ApplicationFiled: January 12, 2024Publication date: September 12, 2024Inventors: Yu-Peng Chung, Chia-Wei Li, Wen Cheng Hsu, En-Ming Chen, Che-Chih Tsao
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Publication number: 20240303119Abstract: Automatic process generation and recommendation can include extracting, in real time, features from user input to a computer. The features extracted can be compared with recorded features corresponding to a prior behavior. A user-intended action can be predicted in response to a match between the features extracted and the features corresponding to the prior behavior. A sequence of processor-executable actions corresponding to the prior behavior can be generated.Type: ApplicationFiled: March 8, 2023Publication date: September 12, 2024Inventors: Xiao Xuan Fu, Jiang Yi Liu, Wen Qi WQ Ye, Si Yu Chen, Min Cheng
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Publication number: 20240297126Abstract: An electronic package is provided in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure is embedded in the packaging layer. Therefore, thermal stress is dispersed through the frame body to avoid warpage of the electronic package, so as to facilitate the arrangement of other electronic components around the electronic component.Type: ApplicationFiled: May 10, 2024Publication date: September 5, 2024Inventors: Chih-Hsien CHIU, Wen-Jung TSAI, Chien-Cheng LIN, Ko-Wei CHANG, Yu-Wei YEH, Shun-Yu CHIEN, Chia-Yang CHEN
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Patent number: 12057275Abstract: This invention describes a packaging structure for roll-type (wound-type) aluminum conductive polymer capacitor element. Two protective substrates are applied to sandwich a roll-type capacitor element in between with an insulating material surrounding the capacitor element also in between the protective substrates. The protective substrates comprise electrically separated anodic conductive pad and cathodic conductive pad on their surfaces and through holes that pass through the conductive pads. The capacitor element is oriented with its axis perpendicular to the two substrates. The anodic and cathodic leads of the capacitor element pass through the through holes. An anodic external terminal is plated over the anodic conductive pad and a cathodic external terminal is plated over the cathodic conductive pad so that the anodic external terminal is electrically connected to the anodic lead and the cathodic external terminal is electrically connected to the cathodic lead.Type: GrantFiled: November 22, 2022Date of Patent: August 6, 2024Inventors: Yu-Peng Chung, Chia-Wei Li, Wen Cheng Hsu, En-Ming Chen, Che-Chih Tsao
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Patent number: 12057409Abstract: An electronic package and a manufacturing method of the electronic package are provided, in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure nor cover the electronic component is embedded in the packaging layer.Type: GrantFiled: January 10, 2022Date of Patent: August 6, 2024Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsien Chiu, Wen-Jung Tsai, Chien-Cheng Lin, Ko-Wei Chang, Yu-Wei Yeh, Shun-Yu Chien, Chia-Yang Chen
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Patent number: 12057477Abstract: Semiconductor structures and method for manufacturing the same are provided. The semiconductor structure includes a substrate and a first fin structure formed over the substrate. The semiconductor structure also includes an isolation structure formed around the first fin structure and a protection layer formed on the isolation structure. The semiconductor structure also includes first nanostructures formed over the first fin structure and a gate structure surrounding the first nanostructures. In addition, a bottom surface of the gate structure and the top surface of the isolation structure are separated by the protection layer.Type: GrantFiled: February 22, 2022Date of Patent: August 6, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wen-Ting Lan, Guan-Lin Chen, Shi-Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang, Ching-Wei Tsai, Kuan-Lun Cheng
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Patent number: 11874166Abstract: The present application discloses a light sensor circuit, which comprises a photodiode and a capacitor unit. The cathode of the photodiode is controlled by a capacitive unit to maintain the same or close voltage level as the anode of the photodiode, which significantly reduces the effect of the dark current of the photodiode. Thus, the light sensor circuit can effectively maintain the performance and accuracy of an analog-to-digital converter applying the light sensor circuit. The circuit design difficulty and manufacturing cost are also significantly reduced.Type: GrantFiled: October 6, 2022Date of Patent: January 16, 2024Assignee: Sensortek Technology Corp.Inventors: Wen-Cheng Chen, Kai-Hsiang Chan, Sheng-Wen Huang
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Publication number: 20230243697Abstract: The present application discloses a light sensor circuit, which comprises a photodiode and a capacitor unit. The cathode of the photodiode is controlled by a capacitive unit to maintain the same or close voltage level as the anode of the photodiode, which significantly reduces the effect of the dark current of the photodiode. Thus, the light sensor circuit can effectively maintain the performance and accuracy of an analog-to-digital converter applying the light sensor circuit. The circuit design difficulty and manufacturing cost are also significantly reduced.Type: ApplicationFiled: October 6, 2022Publication date: August 3, 2023Inventors: WEN-CHENG CHEN, KAI-HSIANG CHAN, SHENG-WEN HUANG
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Patent number: 11150404Abstract: A method includes bonding an electronic die to a photonic die. The photonic die includes an opening. The method further includes attaching an adapter onto the photonic die, with a portion of the adapter being at a same level as a portion of the electronic die, forming a through-hole penetrating through the adapter, with the through-hole being aligned to the opening, and attaching an optical device to the adapter. The optical device is configured to emit a light into the photonic die or receive a light from the photonic die.Type: GrantFiled: August 16, 2019Date of Patent: October 19, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sung-Hui Huang, Jui Hsieh Lai, Tien-Yu Huang, Wen-Cheng Chen, Yushun Lin
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Patent number: 10592426Abstract: A method for accessing a physical region page (PRP) list includes obtaining a PRP address of a PRP list, in which the PRP address has M bits; performing operation to the first N bits of the PRP address and the N+1 th to Mth bits of the PRP address respectively to obtain a page base address if the PRP address is within a page boundary; and performing operation to the first N bits of the PRP address and the N+1 th to Mth bits of the PRP address respectively to obtain next PRP address pointer if the PRP address reaches the page boundary. N is an integer, and M is an integer larger than N.Type: GrantFiled: July 18, 2018Date of Patent: March 17, 2020Assignee: ASMEDIA TECHNOLOGY INC.Inventor: Wen-Cheng Chen
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Publication number: 20190369329Abstract: A method includes bonding an electronic die to a photonic die. The photonic die includes an opening. The method further includes attaching an adapter onto the photonic die, with a portion of the adapter being at a same level as a portion of the electronic die, forming a through-hole penetrating through the adapter, with the through-hole being aligned to the opening, and attaching an optical device to the adapter. The optical device is configured to emit a light into the photonic die or receive a light from the photonic die.Type: ApplicationFiled: August 16, 2019Publication date: December 5, 2019Inventors: Sung-Hui Huang, Jui Hsieh Lai, Tien-Yu Huang, Wen-Cheng Chen, Yushun Lin
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Patent number: 10459159Abstract: A method includes bonding an electronic die to a photonic die. The photonic die includes an opening. The method further includes attaching an adapter onto the photonic die, with a portion of the adapter being at a same level as a portion of the electronic die, forming a through-hole penetrating through the adapter, with the through-hole being aligned to the opening, and attaching an optical device to the adapter. The optical device is configured to emit a light into the photonic die or receive a light from the photonic die.Type: GrantFiled: April 22, 2019Date of Patent: October 29, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sung-Hui Huang, Jui Hsieh Lai, Tien-Yu Huang, Wen-Cheng Chen, Yushun Lin
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Publication number: 20190250327Abstract: A method includes bonding an electronic die to a photonic die. The photonic die includes an opening. The method further includes attaching an adapter onto the photonic die, with a portion of the adapter being at a same level as a portion of the electronic die, forming a through-hole penetrating through the adapter, with the through-hole being aligned to the opening, and attaching an optical device to the adapter. The optical device is configured to emit a light into the photonic die or receive a light from the photonic die.Type: ApplicationFiled: April 22, 2019Publication date: August 15, 2019Inventors: Sung-Hui Huang, Jui Hsieh Lai, Tien-Yu Huang, Wen-Cheng Chen, Yushun Lin
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Publication number: 20190227943Abstract: A method for accessing a physical region page (PRP) list includes obtaining a PRP address of a PRP list, in which the PRP address has M bits; performing operation to the first N bits of the PRP address and the N+1 th to Mth bits of the PRP address respectively to obtain a page base address if the PRP address is within a page boundary; and performing operation to the first N bits of the PRP address and the N+1 th to Mth bits of the PRP address respectively to obtain next PRP address pointer if the PRP address reaches the page boundary. N is an integer, and M is an integer larger than N.Type: ApplicationFiled: July 18, 2018Publication date: July 25, 2019Inventor: Wen-Cheng CHEN
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Patent number: 10267988Abstract: A method includes bonding an electronic die to a photonic die. The photonic die includes an opening. The method further includes attaching an adapter onto the photonic die, with a portion of the adapter being at a same level as a portion of the electronic die, forming a through-hole penetrating through the adapter, with the through-hole being aligned to the opening, and attaching an optical device to the adapter. The optical device is configured to emit a light into the photonic die or receive a light from the photonic die.Type: GrantFiled: October 5, 2017Date of Patent: April 23, 2019Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Sung-Hui Huang, Jui Hsieh Lai, Tien-Yu Huang, Wen-Cheng Chen, Yushun Lin