Patents by Inventor Wen-Cheng Chen
Wen-Cheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250006762Abstract: An optical device and a method of fabricating the same are disclosed. The optical device includes a first die layer and a second die layer. The first die layer includes a first substrate having a first surface and a second surface opposite to the first surface, first and second pixel structures, an inter-pixel isolation structure disposed in the first substrate and surrounding the first and second pixel structures, and a floating diffusion region disposed in the first substrate and between the first and second pixel structures. The second die layer includes a second substrate having a third surface and a fourth surface opposite to the third surface and a pixel transistor group disposed on the third surface of the second substrate and electrically connected to the first and second pixel structures.Type: ApplicationFiled: January 12, 2024Publication date: January 2, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Chieh CHUANG, Hsin-Hung CHEN, Wen-I HSU, Peng-Chieh CHIN, Feng-Chi HUNG, Ming-En CHEN, Jen-Cheng LIU, Dun-Nian YAUNG
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Patent number: 12185494Abstract: A heat dissipation assembly is disclosed and includes a fan, a vapor chamber and a heat dissipation fin set. The fan includes a fan frame, an impeller and a fan cover. The impeller is disposed on the fan frame and accommodated in an accommodation space. The impeller includes plural metal blades and a hub, and the plural metal blades are radially arranged on the periphery of the hub to form a dense-metal-blade impeller. The fan cover is assembled with the fan frame to form an outlet, and the fan cover includes an inlet. The vapor chamber includes an upper plate and a lower plate assembled with each other. The upper plate or the lower plate is connected to the fan cover, and the vapor chamber and the fan cover are coplanar. The heat dissipation fin set is connected to the lower plate and spatially corresponding to the outlet.Type: GrantFiled: November 7, 2022Date of Patent: December 31, 2024Assignee: Delta Electronics, Inc.Inventors: Chin-Ting Chen, Chih-Wei Yang, Shu-Cheng Yang, Che-Wei Chang, Wen-Cheng Huang, Chin-Hung Lee, Chih-Wei Chan
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Publication number: 20240424691Abstract: Disclosed is a gripping mechanism including a first bracket, a second bracket, a first guide rod, a third bracket, an actuating module, a gripping block and a gripper. The second bracket is pivotally connected to the first bracket. The first guide rod is fixed on the second bracket. The third bracket is slidably connected to the first guide rod. The actuating module is disposed on the third bracket. The gripping block is slidably disposed on the third bracket, wherein the gripping block is connected to the actuating module. The gripper is fixed on the third bracket, wherein the actuating module is located between the first guide rod and the gripping block, and the gripping block is located between the actuating module and the gripper. A mobile robot is also disclosed.Type: ApplicationFiled: June 20, 2024Publication date: December 26, 2024Applicant: Unicom Global, Inc.Inventors: Sheng-Kai Lai, Wen-Yi Kuo, Wen-Hsiang Chen, Chen-Wei Yang, Ting-Cheng Sun
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Publication number: 20240424690Abstract: Disclosed is a gripping mechanism including a first bracket, a second bracket, a first guide rod, a third bracket, an actuating module, a gripping block and two grippers. The second bracket is connected to the first bracket. The third bracket is connected to the second bracket. The actuating module is disposed on the third bracket. The gripping block is slidably disposed on the third bracket and is connected to the actuating module. The two grippers are fixed on the terminal end of the third bracket distal from the first bracket and the second bracket, wherein the gripping block is located between the actuating module and the two grippers and the actuating module is adapted to drive the gripping block to slide close to or slide away from the two grippers. A mobile robot is also disclosed.Type: ApplicationFiled: June 20, 2024Publication date: December 26, 2024Applicant: Unicom Global, Inc.Inventors: Sheng-Kai Lai, Wen-Yi Kuo, Wen-Hsiang Chen, Chen-Wei Yang, Ting-Cheng Sun
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Patent number: 12176370Abstract: Some embodiments relate to an image sensor. The image sensor includes a semiconductor substrate including a pixel region and a peripheral region. A backside isolation structure extends into a backside of the semiconductor substrate and laterally surrounds the pixel region. The backside isolation structure includes a metal core, and a dielectric liner separates the metal core from the semiconductor substrate. A conductive feature is disposed over a front side of the semiconductor substrate. A through substrate via extends from the backside of the semiconductor substrate through the peripheral region to contact the conductive feature. The through substrate via is laterally offset from the backside isolation structure. A conductive bridge is disposed beneath the backside of the semiconductor substrate and electrically couples the metal core of the backside isolation structure to the through substrate via.Type: GrantFiled: June 2, 2021Date of Patent: December 24, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Wen-Chang Kuo, Sheng-Chau Chen, Feng-Chi Hung, Sheng-Chan Li
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Publication number: 20240421096Abstract: A manufacturing method of an electronic package includes the following steps. Multiple chips are temporarily fixed to a temporary carrier. At least one bridge element is installed on the adjacent chips. A base dielectric layer covering a temporary bonding layer, the chips, and the bridge element is formed. A material of the base dielectric layer includes a silicate composite material. Multiple base conductive vias and a redistribution structure are respectively formed on the chips and the base dielectric layer. Multiple conductive bumps are formed on the redistribution structure. In addition, an electronic package is also provided, which may be produced by the manufacturing method.Type: ApplicationFiled: September 27, 2023Publication date: December 19, 2024Applicant: VIA Technologies, Inc.Inventors: Wen-Yuan Chang, Wei-Cheng Chen, Chen-Yueh Kung
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Publication number: 20240421115Abstract: An embodiment semiconductor package includes a package substrate, a first semiconductor die electrically and mechanically coupled to the package substrate, a second semiconductor die electrically and mechanically coupled to the package substrate, a non-conductive film formed between the first semiconductor die and the package substrate, and a capillary underfill material formed between the second semiconductor die and the package substrate. The non-conductive film may be formed in a first region over a surface of the package substrate and the capillary underfill material may be formed over a second region of the surface of the package substrate, such that the second region surrounds the first region in a plan view. The semiconductor package may further include a multi-die frame partially surrounding the first semiconductor die and the second semiconductor die such that a multi-die chip is formed that includes the first semiconductor die, the second semiconductor die, and the multi-die frame.Type: ApplicationFiled: June 15, 2023Publication date: December 19, 2024Inventors: Wen-Yi Lin, Kai-Cheng Chen, Chien-Li Kuo, Chien-Chen Li
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Publication number: 20240421124Abstract: A manufacturing method of an electronic package includes the following steps. Multiple chips and a base dielectric layer are provided. A back surface of each chip is fixed to a back surface temporary carrier via a back surface temporary bonding layer. A base dielectric layer surrounds each chip and covers the back surface temporary bonding layer. A material of the base dielectric layer includes a silicate composite material. At least one bridge element is installed on the adjacent chips. An intermediate dielectric layer covering the base dielectric layer, the chips, and the bridge element is formed. Multiple intermediate conductive vias and a redistribution structure are respectively formed on the chips and the intermediate dielectric layer. Multiple conductive bumps are formed on the redistribution structure. The back surface temporary bonding layer and the back surface temporary carrier are removed. An electronic package produced by the manufacturing method is also provided.Type: ApplicationFiled: September 27, 2023Publication date: December 19, 2024Applicant: VIA Technologies, Inc.Inventors: Wen-Yuan Chang, Wei-Cheng Chen, Chen-Yueh Kung
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Publication number: 20240413193Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first electrode layer over a substrate. The method includes forming a capacitor dielectric layer over the first electrode layer and the substrate. The method includes depositing a second electrode layer over the capacitor dielectric layer. The method includes bombarding the second electrode layer with ions of an inert gas to sputter first atoms from the second electrode layer. The treated second electrode layer has a treated first top portion, a treated first sidewall portion, and a treated first bottom portion. The treated first sidewall portion is over the sidewall of the first electrode layer and connected between the treated first top portion and the treated first bottom portion, and the treated first sidewall portion is thicker than the first sidewall portion.Type: ApplicationFiled: June 6, 2023Publication date: December 12, 2024Inventors: Wen-Tzu CHEN, Shih-Cheng CHOU, Hsiang-Ku SHEN, Dian-Hau CHEN, Chen-Chiu HUANG
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Publication number: 20240411051Abstract: A light-emitting device array includes a first light-emitting device, a second light-emitting device, and a third light-emitting device. A first beam shaping structure of the first light-emitting device is configured to convert light emitted by a first light-emitting structure of first light-emitting device into first structured light. A second beam shaping structure of the second light-emitting device is configured to convert light emitted by a second light-emitting structure of second light-emitting device into second structured light. Speckle patterns and spatial distributions of the first structured light and the second structured light on a projection plane are the same. A third beam shaping structure of the third light-emitting device is configured to convert light emitted by a third light-emitting structure of third light-emitting device into third structured light.Type: ApplicationFiled: September 7, 2023Publication date: December 12, 2024Inventors: Jun-Da CHEN, Yu-Heng HONG, Wen-Cheng HSU, Tzu-Hsiang LAN, Hao-Chung KUO
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Publication number: 20240395843Abstract: An image sensor includes a pixel and an isolation structure. The pixel includes a photosensitive region and a circuitry region next to the photosensitive region. The isolation structure is located over the pixel, where the isolation structure includes a conductive grid and a dielectric structure covering a sidewall of the conductive grid, and the isolation structure includes an opening or recess overlapping the photosensitive region. The isolation structure surrounds a peripheral region of the photosensitive region.Type: ApplicationFiled: July 24, 2024Publication date: November 28, 2024Inventors: Min-Feng Kao, Dun-Nian Yaung, Jen-Cheng Liu, Wen-Chang Kuo, Sheng-Chau Chen, Feng-Chi Hung, Sheng-Chan Li
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Publication number: 20240396103Abstract: An energy storage device capable of suppressing battery spread of battery fire includes a control module and a plurality of battery modules, and the battery modules respectively include an accommodation space, a plurality of battery packs, a plurality of temperature sensors and a controller. The controller provides a first control signal to notify the control module based on an ambient temperature detected by one of the temperature sensors being greater than or equal to a first specific temperature range. The control module is used to transfer a battery capacity of an abnormal battery module of the battery modules providing the first control signal to a backup energy storage module, and the backup energy storage module includes the battery modules except the abnormal battery module or a next-stage device.Type: ApplicationFiled: May 26, 2023Publication date: November 28, 2024Inventors: Chung-Hsing CHANG, Wen-Yi CHEN, Way-Lung WU, Teng-Chi HUANG, Shi-Cheng TONG, Yong-Han CHEN, Yu-Chun WANG
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Publication number: 20240394605Abstract: The invention provides a system and a method thereof for establishing an extubation prediction using a machine learning model capable of obtaining an extubation prediction model and key features used by the extubation prediction model through training and/or verification of a machine learning model, and analyzing key feature data of a patient in real time through the extubation prediction model in order to obtain a possibility of extubation of the patient and its related explanation. Accordingly, the system and the method thereof for establishing the extubation prediction using the machine learning model disclosed in the invention are used as a tool for clinical caregivers to evaluate extubation in order to reduce a possibility of reintubation due to inability to breathe spontaneously after extubation.Type: ApplicationFiled: June 21, 2023Publication date: November 28, 2024Inventors: WEN-CHENG CHAO, KAI-CHIH PAI, MING-CHENG CHAN, CHIEH-LIANG WU, MIN-SHIAN WANG, CHIEN-LUN LIAO, TA-CHUN HUNG, YAN-NAN LIN, HUI-CHIAO YANG, RUEY-KAI SHEU, LUN-CHI CHEN
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Patent number: 12154939Abstract: The present disclosure, in some embodiments, relates to a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A first dielectric layer is over the lower dielectric structure and includes sidewalls defining a plurality of openings extending through the first dielectric layer. A lower electrode is arranged along the sidewalls and over an upper surface of the first dielectric layer, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is along opposing outermost sidewalls of the upper electrode. The spacer has an outermost surface extending from a lowermost surface of the spacer to a top of the spacer. The outermost surface is substantially aligned with an outermost sidewall of the lower electrode.Type: GrantFiled: July 28, 2023Date of Patent: November 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
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Publication number: 20240387613Abstract: The present disclosure, in some embodiments, relates to a capacitor structure. The capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A lower electrode is arranged along sidewalls and an upper surface of the lower dielectric structure, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is arranged along outermost sidewalls of the upper electrode. The spacer includes a first upper surface arranged along a first side of the upper electrode and a second upper surface arranged along an opposing second side of the upper electrode. The first upper surface has a different width than the second upper surface.Type: ApplicationFiled: July 25, 2024Publication date: November 21, 2024Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
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Patent number: 12147119Abstract: An electronic device is provided. The electronic device includes a frame, a backlight module, a working panel, and a spacer. The backlight module is disposed in the frame. The working panel is disposed on the frame. The spacer is disposed between the frame and the working panel. At least a portion of the working panel and at least a portion of the spacer are in direct contact with an adhesive.Type: GrantFiled: August 10, 2022Date of Patent: November 19, 2024Assignee: INNOLUX CORPORATIONInventors: Wen-Cheng Huang, Ting-Sheng Chen, Chia-Chun Yang, Chin-Cheng Kuo
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Publication number: 20240374944Abstract: A battery module capable of suppressing spread of battery fire including a case, a plurality of battery packs, a plurality of temperature sensors, an energy consumption module and a controller. The case forms an accommodation space, and the battery packs is accommodated in the accommodation space. The temperature sensors are dispersedly configured to the accommodation space, and the temperature sensors respectively detect an ambient temperature around configure locations. The controller is coupled to the temperature sensors, and when the ambient temperature detected by one of the temperature sensors is greater than or equal to a first specific temperature range, the controller controls the energy consumption module to consume a battery capacity of at least one battery pack around the one of the temperature sensors.Type: ApplicationFiled: May 12, 2023Publication date: November 14, 2024Inventors: Chung-Hsing CHANG, Wen-Yi CHEN, Way-Lung WU, Teng-Chi HUANG, Shi-Cheng TONG, Yong-Han CHEN, Yu-Chun WANG
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Publication number: 20240371934Abstract: Semiconductor structures and method for manufacturing the same are provided. The semiconductor structure includes a substrate and a first fin structure formed over the substrate. The semiconductor structure also includes an isolation structure formed around the first fin structure and a protection layer formed on the isolation structure. The semiconductor structure also includes first nanostructures formed over the first fin structure and a gate structure surrounding the first nanostructures. In addition, a bottom surface of the gate structure and the top surface of the isolation structure are separated by the protection layer.Type: ApplicationFiled: July 15, 2024Publication date: November 7, 2024Inventors: Wen-Ting LAN, Guan-Lin CHEN, Shi-Ning JU, Kuo-Cheng CHIANG, Chih-Hao WANG, Ching-Wei TSAI, Kuan-Lun CHENG
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Publication number: 20240363577Abstract: An electronic package and a substrate structure thereof are provided, in which an electronic element and a flow stopper surrounding the electronic element are disposed on a substrate body of the substrate structure, and a heat dissipation structure is bonded on the electronic element via a heat dissipation material, so that the flow stopper limits an overflow range of the heat dissipation material to prevent the heat dissipation material from contaminating a circuit layer on the substrate body.Type: ApplicationFiled: July 24, 2023Publication date: October 31, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Pin-Jing SU, Wen-Yu TENG, Liang-Yi HUNG, Chia-Cheng CHEN, Yu-Po WANG
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Publication number: 20240355860Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a plurality of gate structures arranged along a first side of a substrate within a plurality of pixel regions. An etch block structure is arranged on the first side of the substrate between neighboring ones of the plurality of gate structures. A contact etch stop layer (CESL) is arranged on the etch block structure between the neighboring ones of the plurality of gate structures. An isolation structure is disposed between one or more sidewalls of the substrate and extends from a second side of the substrate to the first side of the substrate. The etch block structure is vertically between the isolation structure and the CESL.Type: ApplicationFiled: July 3, 2023Publication date: October 24, 2024Inventors: Hsin-Hung Chen, Wen-I Hsu, Wei Long Chen, Ming-En Chen, Feng-Chi Hung, Jen-Cheng Liu, Dun-Nian Yaung