Patents by Inventor Wen-Cheng Chen

Wen-Cheng Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12154939
    Abstract: The present disclosure, in some embodiments, relates to a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A first dielectric layer is over the lower dielectric structure and includes sidewalls defining a plurality of openings extending through the first dielectric layer. A lower electrode is arranged along the sidewalls and over an upper surface of the first dielectric layer, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is along opposing outermost sidewalls of the upper electrode. The spacer has an outermost surface extending from a lowermost surface of the spacer to a top of the spacer. The outermost surface is substantially aligned with an outermost sidewall of the lower electrode.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: November 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
  • Publication number: 20240387613
    Abstract: The present disclosure, in some embodiments, relates to a capacitor structure. The capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A lower electrode is arranged along sidewalls and an upper surface of the lower dielectric structure, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is arranged along outermost sidewalls of the upper electrode. The spacer includes a first upper surface arranged along a first side of the upper electrode and a second upper surface arranged along an opposing second side of the upper electrode. The first upper surface has a different width than the second upper surface.
    Type: Application
    Filed: July 25, 2024
    Publication date: November 21, 2024
    Inventors: Ching-Sheng Chu, Dun-Nian Yaung, Yu-Cheng Tsai, Meng-Hsien Lin, Ching-Chung Su, Jen-Cheng Liu, Wen-De Wang, Guan-Hua Chen
  • Patent number: 12147119
    Abstract: An electronic device is provided. The electronic device includes a frame, a backlight module, a working panel, and a spacer. The backlight module is disposed in the frame. The working panel is disposed on the frame. The spacer is disposed between the frame and the working panel. At least a portion of the working panel and at least a portion of the spacer are in direct contact with an adhesive.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: November 19, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Wen-Cheng Huang, Ting-Sheng Chen, Chia-Chun Yang, Chin-Cheng Kuo
  • Publication number: 20240374944
    Abstract: A battery module capable of suppressing spread of battery fire including a case, a plurality of battery packs, a plurality of temperature sensors, an energy consumption module and a controller. The case forms an accommodation space, and the battery packs is accommodated in the accommodation space. The temperature sensors are dispersedly configured to the accommodation space, and the temperature sensors respectively detect an ambient temperature around configure locations. The controller is coupled to the temperature sensors, and when the ambient temperature detected by one of the temperature sensors is greater than or equal to a first specific temperature range, the controller controls the energy consumption module to consume a battery capacity of at least one battery pack around the one of the temperature sensors.
    Type: Application
    Filed: May 12, 2023
    Publication date: November 14, 2024
    Inventors: Chung-Hsing CHANG, Wen-Yi CHEN, Way-Lung WU, Teng-Chi HUANG, Shi-Cheng TONG, Yong-Han CHEN, Yu-Chun WANG
  • Publication number: 20240371934
    Abstract: Semiconductor structures and method for manufacturing the same are provided. The semiconductor structure includes a substrate and a first fin structure formed over the substrate. The semiconductor structure also includes an isolation structure formed around the first fin structure and a protection layer formed on the isolation structure. The semiconductor structure also includes first nanostructures formed over the first fin structure and a gate structure surrounding the first nanostructures. In addition, a bottom surface of the gate structure and the top surface of the isolation structure are separated by the protection layer.
    Type: Application
    Filed: July 15, 2024
    Publication date: November 7, 2024
    Inventors: Wen-Ting LAN, Guan-Lin CHEN, Shi-Ning JU, Kuo-Cheng CHIANG, Chih-Hao WANG, Ching-Wei TSAI, Kuan-Lun CHENG
  • Publication number: 20240363577
    Abstract: An electronic package and a substrate structure thereof are provided, in which an electronic element and a flow stopper surrounding the electronic element are disposed on a substrate body of the substrate structure, and a heat dissipation structure is bonded on the electronic element via a heat dissipation material, so that the flow stopper limits an overflow range of the heat dissipation material to prevent the heat dissipation material from contaminating a circuit layer on the substrate body.
    Type: Application
    Filed: July 24, 2023
    Publication date: October 31, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Pin-Jing SU, Wen-Yu TENG, Liang-Yi HUNG, Chia-Cheng CHEN, Yu-Po WANG
  • Publication number: 20240355860
    Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a plurality of gate structures arranged along a first side of a substrate within a plurality of pixel regions. An etch block structure is arranged on the first side of the substrate between neighboring ones of the plurality of gate structures. A contact etch stop layer (CESL) is arranged on the etch block structure between the neighboring ones of the plurality of gate structures. An isolation structure is disposed between one or more sidewalls of the substrate and extends from a second side of the substrate to the first side of the substrate. The etch block structure is vertically between the isolation structure and the CESL.
    Type: Application
    Filed: July 3, 2023
    Publication date: October 24, 2024
    Inventors: Hsin-Hung Chen, Wen-I Hsu, Wei Long Chen, Ming-En Chen, Feng-Chi Hung, Jen-Cheng Liu, Dun-Nian Yaung
  • Patent number: 12117043
    Abstract: An air-floating guide rail device includes a guide rail unit, a slider unit, and a linear motor unit. The guide rail unit includes a guide rail body and two air-floating block sets made of a material different from that of the guide rail body and each including top and side air-floating blocks. The slider unit includes a main sliding seat and two lateral sliding seats connected integrally to the main sliding seat and each having first and second guiding surfaces transverse to each other and disposed respectively adjacent to corresponding top and side air-floating blocks, and first and second air guiding passages connecting the first and second guiding surfaces to the external environment. The linear motor unit includes a stator and a mover mounted fixedly to the main sliding seat and movable relative to the stator for driving linear movement of the slider unit relative to the guide rail unit.
    Type: Grant
    Filed: December 20, 2022
    Date of Patent: October 15, 2024
    Assignee: Toyo Nano System Corporation
    Inventors: Kun-Cheng Tseng, Kuei-Tun Teng, Wei-Chih Chen, Wen-Chung Lin
  • Publication number: 20240329361
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a circuit assembly. The movable assembly is configured to connect an optical element, the movable assembly is movable relative to the fixed assembly, and the optical element has an optical axis. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The circuit assembly includes a plurality of circuits and is affixed to the fixed assembly.
    Type: Application
    Filed: June 7, 2024
    Publication date: October 3, 2024
    Inventors: Sin-Hong LIN, Yung-Ping YANG, Wen-Yen HUANG, Yu-Cheng LIN, Kun-Shih LIN, Chao-Chang HU, Yung-Hsien YEH, Mao-Kuo HSU, Chih-Wei WENG, Ching-Chieh HUANG, Chih-Shiang WU, Chun-Chia LIAO, Chia-Yu CHANG, Hung-Ping CHEN, Wei-Zhong LUO, Wen-Chang LIN, Shou-Jen LIU, Shao-Chung CHANG, Chen-Hsin HUANG, Meng-Ting LIN, Yen-Cheng CHEN, I-Mei HUANG, Yun-Fei WANG, Wei-Jhe SHEN
  • Patent number: 12100641
    Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.
    Type: Grant
    Filed: July 18, 2023
    Date of Patent: September 24, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Siang-Yu Lin, Wen-Jung Tsai, Chia-Yang Chen, Chien-Cheng Lin
  • Publication number: 20240303119
    Abstract: Automatic process generation and recommendation can include extracting, in real time, features from user input to a computer. The features extracted can be compared with recorded features corresponding to a prior behavior. A user-intended action can be predicted in response to a match between the features extracted and the features corresponding to the prior behavior. A sequence of processor-executable actions corresponding to the prior behavior can be generated.
    Type: Application
    Filed: March 8, 2023
    Publication date: September 12, 2024
    Inventors: Xiao Xuan Fu, Jiang Yi Liu, Wen Qi WQ Ye, Si Yu Chen, Min Cheng
  • Publication number: 20240304394
    Abstract: This invention describes a packaging structure for roll-type (wound-type) aluminum conductive polymer capacitor element. Two protective substrates are applied to sandwich a roll-type capacitor element in between with an insulating material surrounding the capacitor element also in between the protective substrates. The protective substrates comprise electrically separated anodic conductive pad and cathodic conductive pad on their surfaces. The capacitor element is oriented with its axis perpendicular to the two substrates. The anodic and cathodic leads of the capacitor element pass through the through holes. An anodic external terminal is plated over the anodic conductive pad and a cathodic external terminal is plated over the cathodic conductive pad so that the anodic external terminal is electrically connected to the anodic lead and the cathodic external terminal is electrically connected to the cathodic lead.
    Type: Application
    Filed: January 12, 2024
    Publication date: September 12, 2024
    Inventors: Yu-Peng Chung, Chia-Wei Li, Wen Cheng Hsu, En-Ming Chen, Che-Chih Tsao
  • Publication number: 20240297126
    Abstract: An electronic package is provided in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure is embedded in the packaging layer. Therefore, thermal stress is dispersed through the frame body to avoid warpage of the electronic package, so as to facilitate the arrangement of other electronic components around the electronic component.
    Type: Application
    Filed: May 10, 2024
    Publication date: September 5, 2024
    Inventors: Chih-Hsien CHIU, Wen-Jung TSAI, Chien-Cheng LIN, Ko-Wei CHANG, Yu-Wei YEH, Shun-Yu CHIEN, Chia-Yang CHEN
  • Patent number: 12057275
    Abstract: This invention describes a packaging structure for roll-type (wound-type) aluminum conductive polymer capacitor element. Two protective substrates are applied to sandwich a roll-type capacitor element in between with an insulating material surrounding the capacitor element also in between the protective substrates. The protective substrates comprise electrically separated anodic conductive pad and cathodic conductive pad on their surfaces and through holes that pass through the conductive pads. The capacitor element is oriented with its axis perpendicular to the two substrates. The anodic and cathodic leads of the capacitor element pass through the through holes. An anodic external terminal is plated over the anodic conductive pad and a cathodic external terminal is plated over the cathodic conductive pad so that the anodic external terminal is electrically connected to the anodic lead and the cathodic external terminal is electrically connected to the cathodic lead.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: August 6, 2024
    Inventors: Yu-Peng Chung, Chia-Wei Li, Wen Cheng Hsu, En-Ming Chen, Che-Chih Tsao
  • Patent number: 12057477
    Abstract: Semiconductor structures and method for manufacturing the same are provided. The semiconductor structure includes a substrate and a first fin structure formed over the substrate. The semiconductor structure also includes an isolation structure formed around the first fin structure and a protection layer formed on the isolation structure. The semiconductor structure also includes first nanostructures formed over the first fin structure and a gate structure surrounding the first nanostructures. In addition, a bottom surface of the gate structure and the top surface of the isolation structure are separated by the protection layer.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: August 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Ting Lan, Guan-Lin Chen, Shi-Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang, Ching-Wei Tsai, Kuan-Lun Cheng
  • Patent number: 12057409
    Abstract: An electronic package and a manufacturing method of the electronic package are provided, in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure nor cover the electronic component is embedded in the packaging layer.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: August 6, 2024
    Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Wen-Jung Tsai, Chien-Cheng Lin, Ko-Wei Chang, Yu-Wei Yeh, Shun-Yu Chien, Chia-Yang Chen
  • Patent number: 11874166
    Abstract: The present application discloses a light sensor circuit, which comprises a photodiode and a capacitor unit. The cathode of the photodiode is controlled by a capacitive unit to maintain the same or close voltage level as the anode of the photodiode, which significantly reduces the effect of the dark current of the photodiode. Thus, the light sensor circuit can effectively maintain the performance and accuracy of an analog-to-digital converter applying the light sensor circuit. The circuit design difficulty and manufacturing cost are also significantly reduced.
    Type: Grant
    Filed: October 6, 2022
    Date of Patent: January 16, 2024
    Assignee: Sensortek Technology Corp.
    Inventors: Wen-Cheng Chen, Kai-Hsiang Chan, Sheng-Wen Huang
  • Publication number: 20230243697
    Abstract: The present application discloses a light sensor circuit, which comprises a photodiode and a capacitor unit. The cathode of the photodiode is controlled by a capacitive unit to maintain the same or close voltage level as the anode of the photodiode, which significantly reduces the effect of the dark current of the photodiode. Thus, the light sensor circuit can effectively maintain the performance and accuracy of an analog-to-digital converter applying the light sensor circuit. The circuit design difficulty and manufacturing cost are also significantly reduced.
    Type: Application
    Filed: October 6, 2022
    Publication date: August 3, 2023
    Inventors: WEN-CHENG CHEN, KAI-HSIANG CHAN, SHENG-WEN HUANG
  • Patent number: 11150404
    Abstract: A method includes bonding an electronic die to a photonic die. The photonic die includes an opening. The method further includes attaching an adapter onto the photonic die, with a portion of the adapter being at a same level as a portion of the electronic die, forming a through-hole penetrating through the adapter, with the through-hole being aligned to the opening, and attaching an optical device to the adapter. The optical device is configured to emit a light into the photonic die or receive a light from the photonic die.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: October 19, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Hui Huang, Jui Hsieh Lai, Tien-Yu Huang, Wen-Cheng Chen, Yushun Lin
  • Patent number: 10592426
    Abstract: A method for accessing a physical region page (PRP) list includes obtaining a PRP address of a PRP list, in which the PRP address has M bits; performing operation to the first N bits of the PRP address and the N+1 th to Mth bits of the PRP address respectively to obtain a page base address if the PRP address is within a page boundary; and performing operation to the first N bits of the PRP address and the N+1 th to Mth bits of the PRP address respectively to obtain next PRP address pointer if the PRP address reaches the page boundary. N is an integer, and M is an integer larger than N.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: March 17, 2020
    Assignee: ASMEDIA TECHNOLOGY INC.
    Inventor: Wen-Cheng Chen