Patents by Inventor Wen Cheng

Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210313468
    Abstract: A semiconductor device includes a Fin FET device. The Fin FET device includes a first fin structure extending in a first direction and protruding from an isolation insulating layer, a first gate stack including a first gate electrode layer and a first gate dielectric layer, covering a portion of the first fin structure and extending in a second direction perpendicular to the first direction, and a first source and a first drain, each including a first stressor layer disposed over the first fin structure. The first fin structure and the isolation insulating layer are disposed over a substrate. A height Ha of an interface between the first fin structure and the first stressor layer measured from the substrate is greater than a height Hb of a lowest height of the isolation insulating layer measured from the substrate.
    Type: Application
    Filed: June 21, 2021
    Publication date: October 7, 2021
    Inventors: Cheng-Yen YU, Che-Cheng CHANG, Tung-Wen CHENG, Zhe-Hao ZHANG, Bo-Feng YOUNG
  • Patent number: 11135206
    Abstract: The present invention provides novel pyrazolo[4,3-c]quinoline derivatives exhibiting specifically inhibition activity to microbiota ?-glucuronidase, whereby providing potent activities to prevent chemotherapy-induced diarrhea (CID) of cancers. Therefore, the compounds of the present invention can be used as (1) chemotherapy-adjuvant to prevent chemotherapy-induced diarrhea (CID) and enhance chemotherapeutic efficiency of cancers; (2) health-food supplement to prevent the carcinogens induced colon carcinoma.
    Type: Grant
    Filed: May 26, 2016
    Date of Patent: October 5, 2021
    Assignee: KAOHSIUNG MEDICAL UNIVERSITY
    Inventors: Yeh-Long Chen, Tian-Lu Cheng, Cherng-Chyi Tzeng, Chih-Hua Tseng, Ta-Chun Cheng, Kai-Wen Cheng, Wei-Fen Luo
  • Publication number: 20210303307
    Abstract: Herein described is a method of operating an accumulation process in a data processing apparatus. The accumulation process comprises a plurality of accumulations which output a respective plurality of accumulated values, each based on a stored value and a computed value generated by a data processing operation. The method comprises storing a first accumulated value, the first accumulated value being one of said plurality of accumulated values, into a first storage device comprising a plurality of single-bit storage elements; determining that a predetermined trigger has been satisfied with respect to the accumulation process; and in response to the determining, storing at least a portion of a second accumulated value, the second accumulated value being one of said plurality of accumulated values, into a second storage device.
    Type: Application
    Filed: March 30, 2020
    Publication date: September 30, 2021
    Inventors: Jens OLSON, John Wakefield BROTHERS, III, Jared Corey SMOLENS, Chi-wen CHENG, Daren CROXFORD, Sharjeel SAEED, Dominic Hugo SYMES
  • Publication number: 20210302367
    Abstract: A biochip including a fluidic substrate having an opening extending completely through the fluidic substrate. The biochip further includes a silicon oxide coating on the fluidic substrate. The biochip further includes a plurality of sidewalls on the fluidic substrate, wherein the plurality of sidewalls defines a channel in fluid communication with the opening, the silicon oxide coating is between adjacent sidewalls of the plurality of sidewalls, and each of the plurality of sidewalls comprises polydimethylsiloxane (PDMS). The biochip further includes a detection substrate spaced from the fluidic substrate.
    Type: Application
    Filed: April 2, 2021
    Publication date: September 30, 2021
    Inventors: Yi-Shao LIU, Chun-Ren CHENG, Chun-wen CHENG
  • Patent number: 11133916
    Abstract: A wireless communication system includes a base station, a customer premise equipment (CPE) and a repeater. The repeater includes a down-link circuit and an up-link circuit. The down-link circuit includes a first receiving antenna array and a first transmitting antenna array, and the up-link circuit includes a second receiving antenna array and a second transmitting antenna array. The down-link circuit is separated from the up-link circuit with a first predetermined distance.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: September 28, 2021
    Assignee: WISTRON NEWEB CORPORATION
    Inventors: Tsun-Che Huang, Horen Chen, Chieh-Wen Cheng, Shoou-Hann Huang
  • Publication number: 20210296168
    Abstract: Generally, examples are provided relating to conductive features that include a barrier layer, and to methods thereof. In an embodiment, a metal layer is deposited in an opening through a dielectric layer(s) to a source/drain region. The metal layer is along the source/drain region and along a sidewall of the dielectric layer(s) that at least partially defines the opening. The metal layer is nitrided, which includes performing a multiple plasma process that includes at least one directional-dependent plasma process. A portion of the metal layer remains un-nitrided by the multiple plasma process. A silicide region is formed, which includes reacting the un-nitrided portion of the metal layer with a portion of the source/drain region. A conductive material is disposed in the opening on the nitrided portions of the metal layer.
    Type: Application
    Filed: June 4, 2021
    Publication date: September 23, 2021
    Inventors: Wei-Yip Loh, Chih-Wei Chang, Hong-Mao Lee, Chun-Hsien Huang, Yu-Ming Huang, Yan-Ming Tsai, Yu-Shiuan Wang, Hung-Hsu Chen, Yu-Kai Chen, Yu-Wen Cheng
  • Publication number: 20210296258
    Abstract: Various embodiments of the present application are directed towards a semiconductor packaging device including a shield structure configured to block magnetic and/or electric fields from a first electronic component and a second electronic component. The first and second electronic components may, for example, be inductors or some other suitable electronic components. In some embodiments, a first IC chip overlies a second IC chip. The first IC chip includes a first substrate and a first interconnect structure overlying the first substrate. The second IC chip includes a second substrate and a second interconnect structure overlying the second substrate. The first and second electronic components are respectively in the first and second interconnect structures. The shield structure is directly between the first and second electronic components.
    Type: Application
    Filed: June 7, 2021
    Publication date: September 23, 2021
    Inventors: Wei-Yu Chien, Chien-Hsien Tseng, Dun-Nian Yaung, Nai-Wen Cheng, Pao-Tung Chen, Yi-Shin Chu, Yu-Yang Shen
  • Patent number: 11126229
    Abstract: A display panel has a display area, a first wiring area, and a second wiring area, in which the display area is adjacent to the first and second wiring areas. The display panel includes a plurality of pixels, a first loop pattern, and a second loop pattern. The pixels are arranged within the display area. The first loop pattern is arranged within the display area and is located above the pixels. The first loop pattern includes a first wiring. The second loop pattern is arranged within the first wiring area and is located outside the second wiring area. The second loop pattern is electrically connected to the first loop pattern and includes a second wiring, in which the wiring width of the first wiring is smaller than the wiring width of the second wiring.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: September 21, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Ya-Ting Chen, Sheng-Wen Cheng
  • Patent number: 11117796
    Abstract: An embodiment is a MEMS device including a first MEMS die having a first cavity at a first pressure, a second MEMS die having a second cavity at a second pressure, the second pressure being different from the first pressure, and a molding material surrounding the first MEMS die and the second MEMS die, the molding material having a first surface over the first and the second MEMS dies. The device further includes a first set of electrical connectors in the molding material, each of the first set of electrical connectors coupling at least one of the first and the second MEMS dies to the first surface of the molding material, and a second set of electrical connectors over the first surface of the molding material, each of the second set of electrical connectors being coupled to at least one of the first set of electrical connectors.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Jung-Huei Peng, Shang-Ying Tsai, Hung-Chia Tsai, Yi-Chuan Teng
  • Patent number: 11120974
    Abstract: A dry etching apparatus includes a process chamber, a stage, a gas supply device and a plasma generating device. The stage is in the process chamber and is configured to support a wafer, wherein the wafer has a center region and a periphery region surrounding the center region. The gas supply device is configured to supply a first flow of an etching gas to the center region and supply a second flow of the etching gas to the periphery region. The plasma generating device is configured to generate plasma from the etching gas.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: September 14, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chang-Yin Chen, Tung-Wen Cheng, Che-Cheng Chang, Jr-Jung Lin, Chih-Han Lin
  • Patent number: 11122644
    Abstract: A communication device for redirecting the communication device comprises a storage device for storing instructions and a processing circuit coupled to the storage device. The processing circuit is configured to execute the instructions stored in the storage device. The instructions comprise performing a first random access (RA) procedure with a first node; transmitting information of a service to the first node, when performing the first RA procedure; receiving a RRC redirection command message for redirecting the communication device to at least one second node from the first node, after transmitting the information of the service; selecting a first one of the at least one second node according to the RRC redirection command message; and performing a second RA procedure with the first one of the at least one second node.
    Type: Grant
    Filed: August 10, 2017
    Date of Patent: September 14, 2021
    Assignee: ACER INCORPORATED
    Inventors: Hung-Chen Chen, Ching-Wen Cheng
  • Patent number: 11119620
    Abstract: An electronic device is provided. The electronic device includes a first metal mesh layer, a second metal mesh layer and an insulator. The first metal mesh layer is made up of a plurality of first electrode pattern units. The second metal mesh layer is disposed on one side of the first metal mesh layer, and is made up of a plurality of second electrode pattern units and a plurality of third electrode pattern units. The pattern of the second electrode pattern units and the pattern of the first electrode pattern units are at least partially identical in shape. The insulator is at least partially disposed between the first metal mesh layer and the second metal mesh layer. On a virtual projection surface parallel to the first metal mesh layer, a first vertical projection range projected from the shape of a first electrode pattern units distribution area and a second vertical projection range projected from the shape of a second electrode pattern units distribution area are staggered.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: September 14, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Ya-Ting Chen, Sheng-Wen Cheng
  • Publication number: 20210280581
    Abstract: A semiconductor device includes a semiconductor substrate, a plurality of semiconductor fins, a gate stack and an epitaxy structure. The semiconductor fins are present on the semiconductor substrate. The semiconductor fins respectively include recesses therein. The gate stack is present on portions of the semiconductor fins that are adjacent to the recesses. The epitaxy structure is present across the recesses of the semiconductor fins. The epitaxy structure includes a plurality of corners and at least one groove present between the corners, and the groove has a curvature radius greater than that of at least one of the corners.
    Type: Application
    Filed: May 6, 2021
    Publication date: September 9, 2021
    Inventors: Tung-Wen Cheng, Chih-Shan Chen, Mu-Tsang Lin
  • Publication number: 20210281063
    Abstract: An over current isolation circuit may, in an example, include a control chip, an input/output embedded controller communicatively coupled to the control chip, and an isolation circuit to isolate the control chip from an over current event based on a user selected preference to selectively enable and disable the signal of the over current event to the control chip.
    Type: Application
    Filed: October 19, 2017
    Publication date: September 9, 2021
    Inventors: Poying Chih, Chao-Wen Cheng, Shu Ming Kuo
  • Patent number: 11111910
    Abstract: Cryogenic pump apparatuses include nanostructure material to achieve an ultra-high vacuum level. The nanostructure material can be mixed with either an adsorbent material or a fixed glue layer which is utilized to fix the adsorbent material. The nanostructure material's good thermal conductivity and adsorption properties help to lower working temperature and extend regeneration cycle of the cryogenic pumps.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: September 7, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Surendra Babu Anantharaman, Wen-Cheng Yang, Chung-En Kao, Victor Y. Lu, Wei Chin
  • Publication number: 20210259409
    Abstract: A structure of reduced profile to render crushproof a cabinet with the structure can be installed in an opening of the cabinet. The structure includes a first frame and a reinforcing portion. Two ends of the reinforcing portion are both connected to the first frame, so that the reinforcing portion is received in the first frame. The crush-proofing structure is movably connected to the opening of the cabinet.
    Type: Application
    Filed: March 11, 2020
    Publication date: August 26, 2021
    Inventors: HSUEH-CHIN LU, KUO-CHIH HUNG, CHIH-FENG CHANG, HAO-WEN CHENG
  • Publication number: 20210263202
    Abstract: An infrared shielding film and a method for manufacturing the same are provided. The infrared shielding film includes an infrared absorbing layer and a first infrared reflecting layer disposed on a surface of the infrared absorbing layer. The infrared absorbing layer contains a uniform distribution of composite tungsten oxide particles that are present in an amount of 0.1% to 10% by weight based on the total weight of the infrared absorbing layer. The first infrared reflecting layer contains a uniform distribution of titanium oxide particles that are present in an amount of 0.1% to 10% by weight based on the total weight of the first infrared reflecting layer.
    Type: Application
    Filed: January 27, 2021
    Publication date: August 26, 2021
    Inventors: TE-CHAO LIAO, Wen-Cheng Yang, Chia-Yen Hsiao, CHUN-CHE TSAO
  • Patent number: 11099152
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: August 24, 2021
    Inventors: Yi-Shao Liu, Chun-Ren Cheng, Ching-Ray Chen, Yi-Hsien Chang, Fei-Lung Lai, Chun-Wen Cheng
  • Patent number: 11100190
    Abstract: A Chromebook computer and a web virtual reality (WebVR) execution method thereof are provided. The WebVR execution method of Chromebook computer includes the following steps. A Chrome Extension informs a WebVR website that the Chromebook computer has a WebVR execution capability. A Chrome APP obtains an inertial measurement unit (IMU) data of a head-mounted display (HMD). The Chrome APP transmits the IMU data to the Chrome Extension. The Chrome Extension transmits the IMU data to the WebVR website through a WebVR application programming interface (API). The Chrome Extension captures a left eye frame and a right eye frame from the WebVR website through the WebVR API. The Chrome Extension projects the left eye frame and the right eye frame to the HMD.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: August 24, 2021
    Assignee: ACER INCORPORATED
    Inventors: Shih-Hao Lin, Chao-Kuang Yang, Wen-Cheng Hsu
  • Publication number: 20210252768
    Abstract: A matte film for hot pressing and a manufacturing method thereof are provided. The manufacturing method includes steps of forming at least one polyester composition into an unstretched polyester thick film and stretching the unstretched polyester thick film in a machine direction (MD) and a transverse direction (TD). The polyester composition includes 81% to 97.9497% by weight of a polyester resin, 0.02% to 2% by weight of an antioxidative ingredient, 0.0003% to 1% by weight of a nucleating agent, 0.01% to 2% by weight of a flow aid, 0.01% to 2% by weight of a polyol ester based polyester modifier, 0.01% to 2% by weight of an inorganic polyester modifier, and 2% to 10% by weight of silica particles. The polyester resin has an intrinsic viscosity between 0.60 dl/g and 0.80 dl/g.
    Type: Application
    Filed: September 4, 2020
    Publication date: August 19, 2021
    Inventors: TE-CHAO LIAO, Wen-Cheng Yang, WEN-JUI CHENG, Chia-Yen Hsiao, Chien-Chih Lin