Patents by Inventor Wen Cheng

Wen Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12014912
    Abstract: An apparatus and method for physical vapor deposition includes a magnetron having a plurality of electromagnets disposed between a base and a magnetic conductive plate. The magnetron includes a plurality of individually controlled electromagnets between a base and an electromagnetic plate. The magnetron controls the polarity and strength of current supplied to the respective electromagnets to generate magnetic fields that confine electrons to areas near a target material within the deposition chamber.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: June 18, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yu-Young Wang, Wen-Cheng Yang, Chyi-Tsong Ni
  • Patent number: 12012518
    Abstract: A polyester film for laser embossing and a method for manufacturing the same are provided. The polyester film for laser embossing is made from a recycled polyester material, and includes a base layer and a skin layer. The skin layer is disposed on at least one surface of the base layer. The skin layer is formed from a first polyester composition. The first polyester composition includes regenerated polyethylene terephthalate as a main component and at least one component selected from 1,4-butanediol, isophthalic acid, neopentyl glycol, 2-methyl-1,3-propanediol, pentanediol, isopentyldiol, adipic acid, and 1,4-cyclohexanedimethanol, so that a melting point of the skin layer ranges from 190° C. to 240° C.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: June 18, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Wen-Cheng Yang, Te-Chao Liao, Chia-Yen Hsiao, Wen-Jui Cheng
  • Publication number: 20240194646
    Abstract: A semiconductor package includes a substrate, first bumps, a first chip, metal pillars, second bumps and a second chip. The substrate includes first and second conductive pads which are located on a top surface of the substrate. Both ends of the first bumps are connected to the first conductive pads and the first chip, respectively. Both ends of the metal pillars are connected to the second conductive pads and one end of the second bumps, respectively. A cross-sectional area of each of the metal pillars is larger than that of each of the second bumps. The second chip is connected to the other end of the second bumps and located above the first chip.
    Type: Application
    Filed: September 29, 2023
    Publication date: June 13, 2024
    Inventors: Chin-Tang Hsieh, Lung-Hua Ho, Chih-Ming Kuo, Chen-Yu Wang, Chih-Hao Chiang, Pai-Sheng Cheng, Kung-An Lin, Chun-Ting Kuo, Yu-Hui Hu, Wen-Cheng Hsu
  • Patent number: 11995471
    Abstract: A resource integration method includes the following steps: a receiving module receives access information from a guest operating system on the host device; the access information is used to determine whether the frame rate is lower than a frame rate threshold; when the receiving module determines that the frame rate is lower than the frame rate threshold, the receiving module transmits an external resource request signal to the receiving module; after the receiving module receives the external resource request signal, a resource management module (which is located in the bridge module) selects an optimal external device from a specific category (among a plurality of categories in a candidate list), and a calculation operation or a storage operation corresponding to the specific category is transmitted to the optimal external device for calculation or storage by the bridge module.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: May 28, 2024
    Assignee: ACER INCORPORATED
    Inventors: Kuan-Ju Chen, Wen-Cheng Hsu, Hung-Ming Chang, Chih-Wen Huang, Chao-Kuang Yang
  • Publication number: 20240170225
    Abstract: This invention describes a packaging structure for roll-type (wound-type) aluminum conductive polymer capacitor element. Two protective substrates are applied to sandwich a roll-type capacitor element in between with an insulating material surrounding the capacitor element also in between the protective substrates. The protective substrates comprise electrically separated anodic conductive pad and cathodic conductive pad on their surfaces and through holes that pass through the conductive pads. The capacitor element is oriented with its axis perpendicular to the two substrates. The anodic and cathodic leads of the capacitor element pass through the through holes. An anodic external terminal is plated over the anodic conductive pad and a cathodic external terminal is plated over the cathodic conductive pad so that the anodic external terminal is electrically connected to the anodic lead and the cathodic external terminal is electrically connected to the cathodic lead.
    Type: Application
    Filed: November 22, 2022
    Publication date: May 23, 2024
    Inventors: Yu-Peng Chung, Chia-Wei Li, Wen Cheng Hsu, En-Ming Chen, Che-Chih Tsao
  • Patent number: 11987891
    Abstract: The present disclosure provides a gas sensor. The gas sensor includes a substrate, a conductor layer over the substrate, wherein the conductor layer includes a conductive pattern including a plurality of openings, the openings being arranged in a repeating pattern, an insulating layer in the plurality of openings and over a top surface of the conductive pattern, wherein the conductive pattern is embedded in the insulating layer, and a gas sensing film over a portion of the insulating layer.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: May 21, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Ta Lei, Chia-Hua Chu, Hsin-Chih Chiang, Tung-Tsun Chen, Chun-Wen Cheng
  • Patent number: 11987676
    Abstract: A black polyester film and a method for manufacturing the same are provided. The black polyester film includes a physically recycled polyester resin and a chemically recycled polyester resin. The physically recycled polyester resin is formed by a plurality of physically recycled polyester chips. The chemically recycled polyester resin is formed by a plurality of chemically recycled polyester chips and mixed with the physically recycled polyester resin. The plurality of chemically recycled polyester chips further include chemically recycled electrostatic pinning polyester chips. The chemically recycled electrostatic pinning polyester chips contain electrostatic pinning additives, and the electrostatic pinning additives are metal salts. Expressed in percent by weight based on a total weight of the polyester film, a content of the electrostatic pinning additives in the polyester film is between 0.005% and 0.1% by weight. The black polyester film further includes a black additive.
    Type: Grant
    Filed: March 10, 2021
    Date of Patent: May 21, 2024
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Te-Chao Liao, Wen-Cheng Yang, Chun-Cheng Yang, Chia-Yen Hsiao, Ching-Yao Yuan
  • Patent number: 11987494
    Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) package comprising a wire-bond damper. A housing structure overlies a support substrate, and a MEMS structure is between the support substrate and the housing structure. The MEMS structure comprises an anchor, a spring, and a movable mass. The spring extends from the anchor to the movable mass to suspend and allow movement of the movable mass in a cavity between the support substrate and the housing structure. The wire-bond damper is on the movable mass or structure surrounding the movable mass. For example, the wire-bond damper may be on a top surface of the movable mass. As another example, the wire-bond damper may be on the support substrate, laterally between the anchor and the movable mass. Further, the wire-bond damper comprises a wire formed by wire bonding and configured to dampen shock to the movable mass.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: May 21, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Lin Hsieh, Wei-Jhih Mao, Shang-Ying Tsai, Kuei-Sung Chang, Chun-Wen Cheng
  • Patent number: 11991080
    Abstract: A method for packet filtering in a network switch includes: utilizing an access control list circuit to filter received packets, wherein the access control list circuit compares header information of the received packets with an access control list to filter the received packets, where the access control list has at least one entry, and rule information in the entry includes only a portion of an IP address; and utilizing a routing circuit to further filter packets that pass the access control list circuit, wherein the routing circuit compares header information of the packets that pass the access control list circuit with a routing table to filter the packets, wherein the routing table has at least one entry, and rule information in the entry includes an entire IP address.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: May 21, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Kai-Wen Cheng, Sz-Han Wang, Wen-Huang Yeh, Wei-Hong You
  • Publication number: 20240162315
    Abstract: A non-volatile memory device includes at least one memory cell, and the memory cell includes a substrate, an assist gate structure, a tunneling dielectric layer, a floating gate, and an upper gate structure. The assist gate structure is disposed on the substrate. The floating gate includes two opposite first top edges arranged along a first direction, two opposite first sidewalls arranged along the first direction, and two opposite second sidewalls arranged along a second direction different from the first direction. The upper gate structure covers the assist gate structure and the floating gate, where at least one of the first top edges of the floating gate is embedded in the upper gate structure. Portions of the upper gate structure extend beyond the second sidewalls of the floating gate in the second direction, and the portions of the upper gate structure are disposed above the substrate.
    Type: Application
    Filed: December 28, 2022
    Publication date: May 16, 2024
    Applicant: IOTMEMORY TECHNOLOGY INC.
    Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng
  • Publication number: 20240162317
    Abstract: A non-volatile memory device includes a memory cell including a substrate, a select gate, a control gate, a planar floating gate, a coupling dielectric layer, an erase gate dielectric layer, and an erase gate. The select gate and the control gate are disposed on the substrate and laterally spaced apart from each other, and the control gate includes a non-vertical surface. The planar floating gate includes a lateral tip laterally spaced apart from the control gate. The coupling dielectric layer includes a first thickness (T1). The erase gate dielectric layer covers the non-vertical surface of the control gate and the lateral tip of the planar floating gate, and includes a second thickness (T2). The erase gate covers the erase gate dielectric layer and the lateral tip of the planar floating gate. The first thickness and the second thickness satisfy the following relation: (T2)<(T1)<2(T2).
    Type: Application
    Filed: October 20, 2023
    Publication date: May 16, 2024
    Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng, Chen-Ming Tsai
  • Publication number: 20240161381
    Abstract: A computer-executable method for generating a side-by-side three-dimensional (3D) image includes the steps of creating a 3D mesh and estimating depth information of the raw image. The method further includes the steps of updating the left mesh area and the right mesh area of the 3D mesh based on the estimated depth information of the raw image and projecting each of the mesh vertices of the left mesh area onto a coordinate system of the side-by-side 3D image based on a left eye position, and projecting each of the mesh vertices of the right mesh area onto the coordinate system of the side-by-side 3D image based on a right eye position. The method further obtains the side-by-side 3D image by coloring the left mesh area and the right mesh area projected onto the coordinate system of the side-by-side 3D image based on the raw image.
    Type: Application
    Filed: November 16, 2022
    Publication date: May 16, 2024
    Inventors: Sergio CANTERO CLARES, Wen-Cheng HSU, Shih-Hao LIN, Chih-Haw TAN
  • Publication number: 20240162316
    Abstract: A non-volatile memory device includes at least one memory cell and the memory cell includes a substrate, a select gate, a control gate, a floating gate, and an erase gate. The select gate is disposed on the substrate, and the control gate is disposed on the substrate and laterally spaced apart from the select gate. The control gate comprises a non-vertical surface. The floating gate includes a vertical portion and a horizontal portion. The vertical portion disposed between the select gate and the control gate and includes a first top tip laterally spaced apart from the control gate. The horizontal portion is disposed between the substrate and the control gate, where the horizontal portion includes a lateral tip laterally and vertically spaced apart from the control gate. The erase gate covers the non-vertical surface of the control gate and the lateral tip of the horizontal portion of the floating gate.
    Type: Application
    Filed: October 6, 2023
    Publication date: May 16, 2024
    Inventors: Der-Tsyr Fan, I-Hsin Huang, Tzung-Wen Cheng, Yu-Ming Cheng
  • Publication number: 20240162288
    Abstract: A semiconductor device includes an active region, a LOCOS region formed within the active region and that extends vertically above a top surface of the active region, a gate region formed above the top surface of the active region, and a polysilicon resistor having a bottom surface that is offset vertically and physically isolated from a top surface of the LOCOS region. The active region includes a source region laterally disposed from the gate region, a drain region laterally disposed from the gate region, and a drift region laterally disposed between the gate region and the drain region. The polysilicon resistor is formed above the drift region. The active region further includes a first charge balance region formed in the active region below the drift region.
    Type: Application
    Filed: November 29, 2023
    Publication date: May 16, 2024
    Applicant: Silanna Asia Pte Ltd
    Inventors: Wen Cheng Lin, Ren Huei Tzeng, Shanghui Larry Tu
  • Publication number: 20240160185
    Abstract: The invention provides a portable CNC machine, including a body and four anchorage bases. The body is put on a surface of a work frame. The body is provided with a machining tool, a processing module and four take-up and pay-off modules, each take-up and pay-off module takes up and pays off a cable, a tail end of each cable is provided with an anchor, and the processing module is connected to and controls the four take-up and pay-off modules. The four anchorage bases are disposed at four corners of the work frame respectively, and stretch and hang the four anchors thereon respectively. The processing module controls the four take-up and pay-off modules to take up and pay off the cables to control the body to freely move on the work frame, and at the same time, the processing module controls the machining tool to carry out a machining operation.
    Type: Application
    Filed: September 27, 2023
    Publication date: May 16, 2024
    Inventors: Ren-Yu Yeh, Po-Hsiang Yu, Chih-Wen Cheng
  • Publication number: 20240156092
    Abstract: The invention relates to a composition for promoting the growth of legumes. The composition includes auxin, choline chloride and ?-aminobutyric acid (GABA). The invention also relates to a method for promoting the growth of legumes.
    Type: Application
    Filed: October 26, 2022
    Publication date: May 16, 2024
    Inventors: Ting-Wen CHENG, Cho-Chun HUANG, Gui-Jun Li, Kai XIA, Chen-Pang WU
  • Patent number: 11983041
    Abstract: A flexible display, including a stand, a supporting mechanism, a flexible screen, a driving component, a driven component, and a link, is provided. The supporting mechanism is connected to the stand. The flexible screen is attached to the supporting mechanism. The driving component is disposed on the stand. The driven component is disposed on a side of the supporting mechanism distant from the stand. The link has a first end and a second end opposite to the first end. The first end is connected to the driving component, and the second end is connected to the driven component. The driving component drives the driven component through the link to move on a first horizontal plane to drive the supporting mechanism and the flexible screen to transform when the driving component moves between the first horizontal plane and a second horizontal plane that is parallel to the first horizontal plane.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: May 14, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Yu-Wen Cheng, Yan-Yu Chen, Chun-Wen Wang, Chung-Lin Hsieh
  • Publication number: 20240155185
    Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.
    Type: Application
    Filed: November 9, 2022
    Publication date: May 9, 2024
    Inventors: Chia-Hao CHANG, You-Tsai JENG, Kai-Wen YEH, Yi-Cheng CHEN, Te-Chuan WANG, Kai-Wen CHENG, Chin-Lung LIN, Tai-Lai TUNG, Ko-Yin LAI
  • Publication number: 20240155522
    Abstract: A method of non-terrestrial network (NTN) communication and a user equipment (UE) using the same method are provided. The method includes: receiving a cell change command comprising re-synchronization information; and performing a re-synchronization procedure according to the re-synchronization information, wherein the re-synchronization information comprising at least one of the following: a re-synchronization time; ephemeris information associated with a target cell; timing advance adjustment information associated with the target cell; a timing advance command value associated with the target cell; and a re-synchronization indication for indicating the UE to perform the re-synchronization procedure, wherein the re-synchronization procedure comprises a downlink re-synchronization procedure.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Ching-Wen Cheng, Fang-Ching Ren
  • Publication number: 20240143791
    Abstract: The invention introduces an apparatus for detecting errors during data encryption. The apparatus includes a search circuitry and a substitution check circuitry. The key generation circuitry is arranged operably to convert a first value of one byte corresponding to a plaintext, an intermediate encryption result, or a round key into a second value of a K-bit according to an 8-to-K lookup table, where K is an integer ranging from 10 to 15 and the second value comprises (K minus 8) bits of a Hamming parity. The substitution check circuitry is arranged operably to employ check formulae corresponding to the 8-to-K lookup table to determine whether an error is occurred during a conversion of the first value of the one byte into the second value of the K-bit, and output an error signal when finding the error, where a total amount of the formulae is K minus 8.
    Type: Application
    Filed: May 30, 2023
    Publication date: May 2, 2024
    Applicant: Silicon Motion, Inc.
    Inventors: Wun-Jhe WU, Po-Hung CHEN, Chiao-Wen CHENG, Jiun-Hung YU, Chih-Wei LIU