Abstract: A deposition system provides a feature that may reduce costs of the sputtering process by increasing a target change interval. The deposition system provides an array of magnet members which generate a magnetic field and redirect the magnetic field based on target thickness measurement data. To adjust or redirect the magnetic field, at least one of the magnet members in the array tilts to focus on an area of the target where more target material remains than other areas. As a result, more ion, e.g., argon ion bombardment occurs on the area, creating more uniform erosion on the target surface.

Abstract: A package includes an encapsulant having a first side and a second side opposite to the first side, a first integrated circuit die and a second integrated circuit die embedded in the encapsulant, and a first interposer on the first side of the encapsulant. The first interposer is mechanically and electrically coupled to the first integrated circuit die and the second integrated circuit die. The package further includes a second interposer on the second side of the encapsulant. The second interposer is mechanically and electrically coupled to the first integrated circuit die and the second integrated circuit die. The second interposer optically or electrically couples the first integrated circuit die to the second integrated circuit die.

Abstract: A semiconductor process system includes a wafer support and a control system. The wafer support includes a plurality of heating elements and a plurality of temperature sensors. The heating elements heat a semiconductor wafer supported by the support system. The temperature sensors generate sensor signals indicative of a temperature. The control system selectively controls the heating elements responsive to the sensor signals.

Abstract: An EUV reflective structure includes a substrate and multiple pairs of a Si layer and a Mo layer. The Si layer includes a plurality of cavities.

Abstract: A method is provided. The method includes forming an interconnect structure electrically connected to a semiconductor device; forming a tantalum-based barrier layer over the interconnect structure; oxidizing the tantalum-based barrier layer to form a tantalum oxide over the tantalum-based barrier layer; and forming a metal layer over the tantalum oxide.

Abstract: The present disclosure provides a flexible workpiece pedestal capable of tilting a workpiece support surface. The workpiece pedestal further includes a heater mounted on the workpiece support surface. The heater includes a plurality of heating sources such as heating coils. The plurality of heating sources in the heater allows heating the workpiece at different temperatures for different zones of the workpiece. For example, the workpiece can have a central zone heated by a first heating coil, a first outer ring zone that is outside of the central zone heated by a second heating coil, a second outer ring zone that is outside of the first outer ring zone heated by a third heating coil. By using the tunable heating feature and the tilting feature of the workpiece pedestal, the present disclosure can reduce or eliminate the shadowing effect problem of the related workpiece pedestal in the art.

Abstract: A deposition system provides a feature that may reduce costs of the sputtering process by increasing a target change interval. The deposition system provides an array of magnet members which generate a magnetic field and redirect the magnetic field based on target thickness measurement data. To adjust or redirect the magnetic field, at least one of the magnet members in the array tilts to focus on an area of the target where more target material remains than other areas. As a result, more ion, e.g., argon ion bombardment occurs on the area, creating more uniform erosion on the target surface.

Abstract: A lithography system includes a radiation source configured to generate a radiation, a reticle configured to redirect the radiation, a first type injection nozzle proximal to the reticle and configured to generate a first particle shield in a propagation path of the radiation, and a second type injection nozzle proximal to the radiation source and configured to generate a second particle shield in the propagation path of the radiation. The second type injection nozzle and the first type injection nozzle are of different types.

Abstract: A semiconductor process system includes a wafer support and a control system. The wafer support includes a plurality of heating elements and a plurality of temperature sensors. The heating elements heat a semiconductor wafer supported by the support system. The temperature sensors generate sensor signals indicative of a temperature. The control system selectively controls the heating elements responsive to the sensor signals.

Abstract: The current disclosure describes techniques for managing planarization of features formed on a semiconductor wafer. The disclosed techniques achieve relative planarization of micro bump structures formed on a wafer surface by adjusting the pattern density of the micro bumps formed within various regions on the wafer surface. The surface area size of a micro bump formed within a given wafer surface region may be enlarged or reduced to change the pattern density. A dummy micro bump may be inserted into a given wafer surface region to increase the pattern density.

Abstract: A device includes an interconnect structure, a barrier multi-layer structure, an oxide layer, a pad metal layer, and a passivation layer. The barrier multi-layer structure is over the interconnect structure, the barrier multi-layer structure includes a first metal nitride layer and a second metal nitride layer over the first metal nitride layer. The oxide layer is over the barrier multi-layer structure, in which the oxide layer is an oxide of the second metal nitride layer of the barrier multi-layer structure. The pad metal layer is over the oxide layer. The passivation layer is in contact with the barrier multi-layer structure, the oxide layer, and the pad metal layer.

Abstract: A robot for transferring a wafer is disclosed. A blade of the robot includes a first sensor on an upper surface of the blade and the second sensor on a back surface of the blade. The first sensor is operable to align the blade with a wafer. The second sensor is operable to align the blade with a holder that holds the wafer.

Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.

Abstract: A method of analyzing a semiconductor wafer includes obtaining a graphic data system (GDS) file corresponding to the semiconductor wafer, using GDS information from the GDS file to provide coordinates of a layout feature of the semiconductor wafer to an electron microscope, using the electron microscope to capture a raw image from the semiconductor wafer based on the coordinates of the layout feature, and performing a measurement operation on the raw image.

Abstract: The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.

Abstract: Systematic fault localization systems and methods are provided which utilize computational GDS-assisted navigation to accelerate physical fault analysis to identify systematic fault locations and patterns. In some embodiments, a method includes detecting a plurality of electrical fault regions of a plurality of dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated which are associated with the plurality of electrical fault regions. A plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials may be determined for each of the cross-layer common patterns, and locations of hotspots in each of the dies may be identified based on the determined normalized differentials.

Abstract: A robot for transferring a wafer is disclosed. A blade of the robot includes a first sensor on an upper surface of the blade and the second sensor on a back surface of the blade. The first sensor is operable to align the blade with a wafer. The second sensor is operable to align the blade with a holder that holds the wafer.

Abstract: A deposition system is provided capable of cleaning itself by removing a target material deposited on a surface of a collimator. The deposition system in accordance with the present disclosure includes a substrate process chamber. The deposition includes a substrate pedestal in the substrate process chamber, the substrate pedestal configured to support a substrate, a target enclosing the substrate process chamber, and a collimator having a plurality of hollow structures disposed between the target and the substrate, a vibration generating unit, and cleaning gas outlet.

Abstract: A sputtering target structure includes a back plate characterized by a first size, and a plurality of sub-targets bonded to the back plate. Each of the sub-targets is characterized by a size that is a fraction of the first size and is equal to or less than a threshold target size. Each sub-target includes a ferromagnetic material containing iron (Fe) and boron (B). Each of the plurality of sub-targets is in direct contact with one or more adjacent sub-targets.

Abstract: A semiconductor device includes a device feature. The semiconductor device includes a first silicide layer having a first metal, wherein the first silicide layer is embedded in the device feature. The semiconductor device includes a second silicide layer having a second metal, wherein the second silicide layer, disposed above the device feature, comprises a first portion directly contacting the first silicide layer. The first metal is different from the second metal.