Patents by Inventor Wen-hao Cheng

Wen-hao Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10162276
    Abstract: The present disclosure provides an apparatus. The apparatus comprises a field generator, configured to produce a field shield protecting a reticle from foreign particles.
    Type: Grant
    Filed: April 7, 2016
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Hao Cheng, Chue-San Yoo, Tsiao-Chen Wu
  • Patent number: 10126666
    Abstract: An apparatus for generating at least one particle shield in photolithography includes a first component and a second component. The first component and the second component are operable to form a first particle shield of the at least one particle shield for blocking particles from contacting a proximate surface of an object. The first component includes a first gas injector, and the second component includes a first gas extractor corresponding to the first gas injector. The first gas injector is configured to blow out a gas, thereby forming the first particle shield. The first gas extractor is configured to work with the first gas injector for providing gas pressure gradient for the first particle shield.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: November 13, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chue San Yoo, Ching-Yueh Chen, Wen-Hao Cheng
  • Patent number: 10102615
    Abstract: Methods and system for detecting hotspots in semiconductor wafer are provided. At least one semiconductor wafer is inspected to detect a plurality of hotspots of each die in the semiconductor wafer, wherein each of the hotspots has defect coordinates in a layout of the die. The hotspots of the dies are stacked in the layout according to the defect coordinates of the hotspots. A common pattern is obtained according to the stacked hotspots corresponding to a location with specific coordinates in the layout. It is determined whether the common pattern is a known pattern having an individual identification (ID) code. A new ID code is assigned to the common pattern when the common pattern is an unknown pattern.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: October 16, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Hao Cheng, Peng-Ren Chen, Chih-Chiang Tu
  • Patent number: 10025175
    Abstract: A system and method that includes receiving a layout of an integrated circuit (IC) device. A template library is provided having a plurality of parameterized shape elements. A curvilinear feature of layout is classified by selecting at least one of the parameterized shape elements that defines the curvilinear feature. A template index is associated with the layout is formed that includes the selected parameterized shape element. The template index and the layout can be delivered to a mask writer, which uses the template index and the layout to fabricate a pattern on a photomask.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: July 17, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chi-Ming Tsai, Chih-Chiang Tu, Wen-Hao Cheng, Ru-Gun Liu, Shuo-Yen Chou
  • Publication number: 20180165803
    Abstract: Methods and system for detecting hotspots in semiconductor wafer are provided. At least one semiconductor wafer is inspected to detect a plurality of hotspots of each die in the semiconductor wafer, wherein each of the hotspots has defect coordinates in a layout of the die. The hotspots of the dies are stacked in the layout according to the defect coordinates of the hotspots. A common pattern is obtained according to the stacked hotspots corresponding to a location with specific coordinates in the layout. It is determined whether the common pattern is a known pattern having an individual identification (ID) code. A new ID code is assigned to the common pattern when the common pattern is an unknown pattern.
    Type: Application
    Filed: December 14, 2016
    Publication date: June 14, 2018
    Inventors: Wen-Hao CHENG, Peng-Ren CHEN, Chih-Chiang TU
  • Patent number: 9907117
    Abstract: The present disclosure relates to a heating device and a biochemical reactor having the heating device. The heating device includes an upper plate, a lower plate, a middle plate, and an electric heating element. The upper plate has an upper heating hole, an upper receiving hole, and an upper conductive layer. The lower plate has a lower heating hole, a lower receiving hole, and a first lower conductive layer. The middle plate is disposed between the upper and lower plates and has a middle heating hole and a middle receiving hole. The upper, middle and lower receiving holes are connected together to form a receiving through hole. The electric heating element is disposed in the receiving through hole and has two terminals connected to the upper conductive layer and the lower conductive layer, respectively.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: February 27, 2018
    Assignee: Genereach Biotechnology Corp.
    Inventors: Chen Su, Hsiao-Fen Chang, Pei-Yu Li, Yun-Lung Tsai, Ching-Ko Lin, Wen-Hao Cheng, Pin-Hsing Chou
  • Publication number: 20180017880
    Abstract: An apparatus for generating at least one particle shield in photolithography includes a first component and a second component. The first component and the second component are operable to form a first particle shield of the at least one particle shield for blocking particles from contacting a proximate surface of an object. The first component includes a first gas injector, and the second component includes a first gas extractor corresponding to the first gas injector. The first gas injector is configured to blow out a gas, thereby forming the first particle shield. The first gas extractor is configured to work with the first gas injector for providing gas pressure gradient for the first particle shield.
    Type: Application
    Filed: September 28, 2017
    Publication date: January 18, 2018
    Inventors: Chue San Yoo, Ching-Yueh Chen, Wen-Hao Cheng
  • Publication number: 20170363974
    Abstract: An apparatus for generating at least one particle shield. The at least one particle shield includes a first component and a second component. The first component and the second component are usable to form a first particle shield of the at least one particle shield for blocking particles from contacting a proximate surface of an object, the first particle shield is substantially parallel to and physically separated from the proximate surface of the object, and the first particle shield includes an energy gradient force or a velocity gradient force.
    Type: Application
    Filed: January 5, 2017
    Publication date: December 21, 2017
    Inventors: Chue San YOO, Ching-Yueh CHEN, Wen-Hao CHENG
  • Patent number: 9817788
    Abstract: A hub device and corresponding method include a first chip having at least a first upstream port and a plurality of first downstream ports, a second chip, having at least a second upstream port and at least one second downstream port; and an external memory device, storing firmware data corresponding to the first chip and the second chip. One one of the first downstream ports of the first chip is coupled to the second upstream port of the second chip to form a tiered hub, and the first chip and the second chip are sequentially enabled and the first chip and the second chip sequentially load the corresponding firmware data.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: November 14, 2017
    Assignee: VIA TECHNOLOGIES, INC.
    Inventors: Chih-Long Ho, Yi-Te Chen, Wen-Hao Cheng, Kuo-Yu Wu, Chun-Heng Lin, Po-Ming Huang
  • Patent number: 9731296
    Abstract: A biochemical reactor includes a temperature control device containing a substrate, a first conductive layer, a second conductive layer, a receiving hole, and a heating element. The substrate has a through hole for accommodating the vessel; the receiving hole is adjacent to the through hole for receiving the heating element; the first conductive layer has a connecting region formed on the wall of the through hole; and two terminals of the heating element are respectively connected electrically to the first and the second conductive layers. As such, the heat generated from the heating element can be transferred to the through hole via the first conductive layer to heat the vessel.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: August 15, 2017
    Assignee: GENEREACH BIOTECHNOLOGY CORP.
    Inventors: Chen Su, Hsiao-Fen Chang, Pei-Yu Li, Yun-Lung Tsai, Ching-Ko Lin, Wen-Hao Cheng
  • Publication number: 20170199471
    Abstract: The present disclosure provides an apparatus. The apparatus comprises a field generator, configured to produce a field shield protecting a reticle from foreign particles.
    Type: Application
    Filed: April 7, 2016
    Publication date: July 13, 2017
    Inventors: WEN-HAO CHENG, CHUE-SAN YOO, TSIAO-CHEN WU
  • Publication number: 20170084016
    Abstract: Methods and systems for diagnosing semiconductor wafer are provided. A target image is obtained according to graphic data system (GDS) information of a specific layout in the semiconductor wafer, wherein the target image includes a first contour having a first pattern corresponding to the specific layout. Image-based alignment is performed to capture a raw image from the semiconductor wafer according to the first contour. The semiconductor wafer is analyzed by measuring the raw image, so as to provide a diagnostic result.
    Type: Application
    Filed: September 18, 2015
    Publication date: March 23, 2017
    Inventors: Peng-Ren CHEN, Shiang-Bau WANG, Wen-Hao CHENG, Yung-Jung CHANG, Wei-Chung HU, Yi-An HUANG, Jyun-Hong CHEN
  • Patent number: 9582633
    Abstract: Among other things, techniques and systems for 3D modeling of a FinFET device and for detecting a variation for a design layout based upon a 3D FinFET model are provided. For example, a fin height of a FinFET device is determined based upon imagery of the FinFET device. The fin height and a 2D FinFET model for the FinFET device are used to create a 3D FinFET model. The 3D FinFET model takes into account the fin height, which is evaluated to identify fin height variations amongst FinFET devices within the design layout. For example, a fin height variation is determined based upon a proximity pattern density, a fin pitch, a gate length, or other parameters/measurements. A voltage threshold variation is determined based upon the fin height variation. This allows the design layout to be modified to decrease the variation.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: February 28, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chung-min Fu, Meng-Fu You, Po-Hsiang Huang, Wen-Hao Cheng
  • Publication number: 20160275040
    Abstract: A hub device and corresponding method include a first chip having at least a first upstream port and a plurality of first downstream ports, a second chip, having at least a second upstream port and at least one second downstream port; and an external memory device, storing firmware data corresponding to the first chip and the second chip. One one of the first downstream ports of the first chip is coupled to the second upstream port of the second chip to form a tiered hub, and the first chip and the second chip are sequentially enabled and the first chip and the second chip sequentially load the corresponding firmware data.
    Type: Application
    Filed: May 27, 2016
    Publication date: September 22, 2016
    Inventors: Chih-Long HO, Yi-Te CHEN, Wen-Hao CHENG, Kuo-Yu WU, Chun-Heng LIN, Po-Ming HUANG
  • Publication number: 20160242237
    Abstract: The present disclosure relates to a heating device and a biochemical reactor having the heating device. The heating device includes an upper plate, a lower plate, a middle plate, and an electric heating element. The upper plate has an upper heating hole, an upper receiving hole, and an upper conductive layer. The lower plate has a lower heating hole, a lower receiving hole, and a first lower conductive layer. The middle plate is disposed between the upper and lower plates and has a middle heating hole and a middle receiving hole. The upper, middle and lower receiving holes are connected together to form a receiving through hole. The electric heating element is disposed in the receiving through hole and has two terminals connected to the upper conductive layer and the lower conductive layer, respectively.
    Type: Application
    Filed: June 5, 2015
    Publication date: August 18, 2016
    Inventors: CHEN SU, HSIAO-FEN CHANG, PEI-YU LI, YUN-LUNG TSAI, CHING-KO LIN, WEN-HAO CHENG, Pin-Hsing CHOU
  • Publication number: 20160175843
    Abstract: A biochemical reactor includes a temperature control device containing a substrate, a first conductive layer, a second conductive layer, a receiving hole, and a heating element. The substrate has a through hole for accommodating the vessel; the receiving hole is adjacent to the through hole for receiving the heating element; the first conductive layer has a connecting region formed on the wall of the through hole; and two terminals of the heating element are respectively connected electrically to the first and the second conductive layers. As such, the heat generated from the heating element can be transferred to the through hole via the first conductive layer to heat the vessel.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 23, 2016
    Inventors: CHEN SU, HSIAO-FEN CHANG, PEI-YU LI, YUN-LUNG TSAI, CHING-KO LIN, WEN-HAO CHENG
  • Publication number: 20160132627
    Abstract: A system and method that includes receiving a layout of an integrated circuit (IC) device. A template library is provided having a plurality of parameterized shape elements. A curvilinear feature of layout is classified by selecting at least one of the parameterized shape elements that defines the curvilinear feature. A template index is associated with the layout is formed that includes the selected parameterized shape element. The template index and the layout can be delivered to a mask writer, which uses the template index and the layout to fabricate a pattern on a photomask.
    Type: Application
    Filed: November 7, 2014
    Publication date: May 12, 2016
    Inventors: Chi-Ming Tsai, Chih-Chiang Tu, Wen-Hao Cheng, Ru-Gun Liu, Shuo-Yen Chou
  • Patent number: 9324178
    Abstract: A system comprises an electron beam directed toward a three-dimensional object with one tilting angle and at least two azimuth angles, a detector configured to receive a plurality of scanning electron microscope (SEM) images from the three-dimensional object and a processor configured to calculate a height and a sidewall edge of the three-dimensional object.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: April 26, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Hao Cheng, Chih-Chiang Tu, Chung-Min Fu, Ajay Nandoriya
  • Publication number: 20150060669
    Abstract: A system comprises an electron beam directed toward a three-dimensional object with one tilting angle and at least two azimuth angles, a detector configured to receive a plurality of scanning electron microscope (SEM) images from the three-dimensional object and a processor configured to calculate a height and a sidewall edge of the three-dimensional object.
    Type: Application
    Filed: November 7, 2014
    Publication date: March 5, 2015
    Inventors: Wen-Hao Cheng, Chih-Chiang Tu, Chung-Min Fu, Ajay Nandoriya
  • Publication number: 20150026657
    Abstract: Among other things, techniques and systems for 3D modeling of a FinFET device and for detecting a variation for a design layout based upon a 3D FinFET model are provided. For example, a fin height of a FinFET device is determined based upon imagery of the FinFET device. The fin height and a 2D FinFET model for the FinFET device are used to create a 3D FinFET model. The 3D FinFET model takes into account the fin height, which is evaluated to identify fin height variations amongst FinFET devices within the design layout. For example, a fin height variation is determined based upon a proximity pattern density, a fin pitch, a gate length, or other parameters/measurements. A voltage threshold variation is determined based upon the fin height variation. This allows the design layout to be modified to decrease the variation.
    Type: Application
    Filed: July 19, 2013
    Publication date: January 22, 2015
    Inventors: Chung-min Fu, Meng-Fu You, Po-Hsiang Huang, Wen-Hao Cheng