Patents by Inventor Wen Hsu

Wen Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12368222
    Abstract: An electronic device including a substrate, a first metal pattern, a first insulating pattern, and a second metal pattern is provided. The first metal pattern is disposed on the substrate. The first insulating pattern is disposed on the first metal pattern. The second metal pattern is disposed on the first metal pattern and the first insulating pattern. The second metal pattern includes a first contact portion and a second contact portion. In a cross-sectional view, the first contact portion and the second contact portion are in contact with the first metal pattern, and the first insulating pattern is in contact with the first metal pattern and the second metal pattern between the first contact portion and the second contact portion.
    Type: Grant
    Filed: October 27, 2022
    Date of Patent: July 22, 2025
    Assignee: Innolux Corporation
    Inventors: Chung-Chun Cheng, Chia-Chi Ho, Chia-Ping Tseng, Yan-Zheng Wu, Yao-Wen Hsu
  • Patent number: 12357895
    Abstract: A bicycle trainer includes a base having a base portion and a standing portion, a supporting frame rotationally pivoted on the standing portion of the base around an axle, a cassette module mounted on the supporting frame and having multiple sprockets, and a flywheel module mounted on the supporting frame. A height adjusting member includes the standing portion, the supporting frame and a fixing element. The fixing element is placed in or between the standing portion and the supporting frame for keeping the supporting frame at a predetermined angle with respect to the standing portion.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: July 15, 2025
    Assignee: Giant Manufacturing Co. Ltd.
    Inventors: Hsiao-Wen Hsu, Jen-Chieh Huang, Chao-Wen Chen, Chin-Lai Huang, Wen-Hai Lo
  • Patent number: 12347002
    Abstract: An electronic device and a non-transitory computer-readable storage medium are provided. The electronic device includes a storage module and a processing module. The storage module is configured to store at least one program instruction. The processing module is coupled to the storage module, and is configured to load the at least one program instruction to perform the following steps: parsing a plurality of cells in an analysis area in a data sheet to identify each of the cells as a formula cell or a non-formula cell; classifying the formula cells so that the formula cells having similar formula expressions fall into the same formula group; analyzing a formula structure of the formula expressions of each formula group to output at least one recommended chart option.
    Type: Grant
    Filed: April 3, 2023
    Date of Patent: July 1, 2025
    Assignee: POTIX CORPORATION
    Inventors: Chih-Heng Chen, Jen-Feng Chao, Wenning Hsu, Ming-Shia Yeh
  • Publication number: 20250203886
    Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a thin film resistor (TFR) with a taper profile. The semiconductor structure further includes a first contact physically contacting a first portion of the TFR. The semiconductor structure includes a second contact physically contacting a second portion of the TFR. The semiconductor structure further includes an oxide layer, over the second dielectric layer and surrounding the first contact and the second contact, and an inter-metal dielectric (IMD) layer over the oxide layer. The IMD layer is substantially free of voids and surrounds a first metal plug physically contacting the first contact and a second metal plug physically contacting the second contact.
    Type: Application
    Filed: January 5, 2024
    Publication date: June 19, 2025
    Inventors: Chun-Tsung KUO, Hung-Wen HSU, Jiech-Fun LU
  • Patent number: 12335591
    Abstract: Camera modules and associated electronic devices and systems are described. A camera module may include a set of housing elements that at least partially defines an interior cavity, a set of lens elements, an image sensor positioned within the interior cavity to receive light through the set of lens elements, and a substrate assembly. The substrate assembly may include a set of rigid substrates, a first set of electrical contacts positioned on a first surface of the set of rigid substrates, and a second set of electrical contacts positioned on a second surface of the set of rigid substrates. The substrate assembly may be positioned such that a first portion of the substrate assembly is positioned inside the interior cavity and a second portion of the substrate assembly extends outside of the interior cavity.
    Type: Grant
    Filed: January 26, 2023
    Date of Patent: June 17, 2025
    Assignee: Apple Inc.
    Inventors: Angelo M. Alaimo, Wassim Ferose Habeeb Rakuman, Bohan Hao, Ya-Wen Hsu
  • Publication number: 20250194225
    Abstract: Semiconductor devices and methods which utilize a treatment process of a bottom anti-reflective layer are provided. The treatment process may be a physical treatment process in which material is added in order to fill holes and pores within the material of the bottom anti-reflective layer or else the treatment process may be a chemical treatment process in which a chemical reaction is used to form a protective layer. By treating the bottom anti-reflective layer the diffusion of subsequently applied chemicals is reduced or eliminated, thereby helping to prevent defects that arise from such diffusion.
    Type: Application
    Filed: February 19, 2025
    Publication date: June 12, 2025
    Inventors: Yao-Wen Hsu, Ming-Chi Huang, Ying-Liang Chuang
  • Publication number: 20250158580
    Abstract: An amplification circuit includes a radio-frequency input terminal, a radio-frequency output terminal, a first amplification stage circuit, a second amplification stage circuit, and a variable impedance path. The radio-frequency input terminal is used to receive a radio-frequency signal. The radio-frequency output terminal is used to output the amplified radio-frequency signal. The first amplification stage circuit is coupled to the radio-frequency input terminal and the radio-frequency output terminal. The second amplification stage circuit is coupled to the radio-frequency input terminal and the radio-frequency output terminal. The variable impedance path is coupled to the first amplification stage circuit and the second amplification stage circuit. When the second amplification stage circuit is enabled, the variable impedance path has a low impedance. When the second amplification stage circuit is disabled, the variable impedance path has a high impedance.
    Type: Application
    Filed: December 21, 2023
    Publication date: May 15, 2025
    Applicant: RichWave Technology Corp.
    Inventors: Tien-Yun Peng, Ching-Wen Hsu, Chih-Sheng Chen
  • Patent number: 12289040
    Abstract: A driving circuit for driving a light source and a projection device are provided. The driving circuit includes a power converter, a detection circuit, and a control circuit. The power converter provides a driving power to the light source. The detection circuit provides a feedback signal according to a current value of the light source. The control circuit receives an operation command and the feedback signal. The control circuit determines whether the driving circuit enters a light-load state according to at least one of the operation command and the feedback signal. When the driving circuit is determined to enter the light-load state, the control circuit controls the power converter to decrease a current value of the driving power and controls the power converter to increase a switching frequency of the driving power. The driving circuit and the projection device may prevent the light source from flickering under the light-load state.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: April 29, 2025
    Assignee: Coretronic Corporation
    Inventors: Chia-Wen Hsu, Chen-Wang Chen, Tung-Min Lee
  • Patent number: 12278547
    Abstract: A self-powered apparatus is used for various kinds of cycling and indoor exercise devices. The self-powered apparatus includes a pedal unit, a spindle, a generator and an energy storage element. The pedal unit includes an inner surface to form an accommodating space therein. The spindle is accommodated in the accommodating space. The generator includes a stator and a rotor. The stator is disposed on the spindle, the rotor is disposed on the inner surface of the pedal unit, and the rotor surrounds the stator correspondingly and is non-contact with the stator. The energy storage element is electrically coupled to the generator. When the pedal unit is being pedaled to rotate by a rider, the stator is fixed on the spindle, the rotor rotates relatively to the stator and along with the pedal unit, and a power is generated by the generator to charge the energy storage element.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: April 15, 2025
    Assignee: GIANT MANUFACTURING CO., LTD.
    Inventors: Ching-Yao Lin, Hsiao-Wen Hsu, Chin-Lai Huang
  • Publication number: 20250119631
    Abstract: An imaging lens module has an image surface and includes an optical lens assembly, a plurality of monomer structures and a cover member. The optical lens assembly is disposed on an object side of the image surface and defines an optical axis. The optical lens assembly includes a light-blocking element, which includes a light-blocking portion. The light-blocking portion is disposed closer to the optical axis than a portion of the light-blocking element other than the light-blocking portion thereto. The monomer structures are disposed on the object side of the image surface, and each of the monomer structures is extended along a direction parallel to the optical axis. The cover member is disposed on an object side of the optical lens assembly, and the optical axis passes through the cover member. The monomer structures are disposed on the light-blocking portion of the light-blocking element.
    Type: Application
    Filed: September 26, 2024
    Publication date: April 10, 2025
    Inventors: Chih-Wen HSU, Heng-Yi SU
  • Publication number: 20250116386
    Abstract: A light source module is provided, including: a light board, including a substrate, and a plurality of light-emitting elements arranged at intervals on the substrate; and a separator, located above the substrate, and including a plurality of first ribs, where the plurality of first ribs is cross-connected to form a plurality of interval spaces, to accommodate the light-emitting elements, the first rib forming the interval space has an inner wall, a part of the inner wall in a direction closer to the substrate tapers in a direction far away from the interval space, the inner wall has a first distance farther away from the substrate in a Z-axis direction and has a second distance closer to the substrate, and a projection relationship between the second distance and the first distance onto an XY plane is that the second distance is greater than the first distance.
    Type: Application
    Filed: December 3, 2024
    Publication date: April 10, 2025
    Inventors: Tsung-Tse WU, Yao-Wen HSU, Che-Chia HSU, Chun-Hsien LI
  • Publication number: 20250112169
    Abstract: A semiconductor device is provided, which includes a substrate, a first dielectric layer, a conductive layer, and an insulating capping layer. The first dielectric layer is disposed on the substrate. The conductive layer is disposed on the first dielectric layer. The conductive layer comprises a plurality of conductive wires. The insulating capping layer is disposed on the conductive layer, and configured to enclose a plurality of first gaps between the conductive wires to form a plurality of air spacers.
    Type: Application
    Filed: October 2, 2023
    Publication date: April 3, 2025
    Inventor: FENG-WEN HSU
  • Publication number: 20250112171
    Abstract: A semiconductor device is provided, which includes a substrate, a first dielectric layer, a conductive layer, and an insulating capping layer. The first dielectric layer is disposed on the substrate. The conductive layer is disposed on the first dielectric layer. The conductive layer includes a plurality of conductive wires. The insulating capping layer is disposed on the conductive layer, and configured to enclose a plurality of first gaps between the conductive wires to form a plurality of air spacers.
    Type: Application
    Filed: November 21, 2023
    Publication date: April 3, 2025
    Inventor: FENG-WEN HSU
  • Patent number: 12264972
    Abstract: A vertically integrated micro-bolometer includes an integrated circuit chip, an infrared sensing film, and a metal bonding layer. The integrated circuit chip includes a silicon substrate, a circuit element, and a dielectric layer disposed on the silicon substrate. The infrared sensing film includes a top absorbing layer, a sensing layer, and a bottom absorbing layer. The sensing layer is disposed between the top absorbing layer and the bottom absorbing layer. Materials of the top absorbing layer, the sensing layer, and the bottom absorbing layer are materials compatible with a semiconductor manufacturing process. The metal bonding layer connects the dielectric layer on the silicon substrate in the integrated circuit chip and the bottom absorbing layer of the infrared sensing film to form a vertically integrated micro-bolometer. In one embodiment, the infrared sensing film is divided into a central sensing film, a surrounding sensing film, and a plurality of connecting portions by a plurality of slots.
    Type: Grant
    Filed: May 25, 2023
    Date of Patent: April 1, 2025
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yu-Wen Hsu, Lu-Pu Liao, Chao-Ta Huang, Bo-Kai Chao
  • Publication number: 20250098214
    Abstract: A semiconductor device is provided, including a substrate, a transistor structure, a metal silicide layer, and a metal silicon nitride layer. The transistor structure is formed on the substrate. The transistor structure includes a source region, a drain region and a gate structure. The gate structure is located between the source region and the drain region. The metal silicide layer is formed on the top surface of the source region and the top surface of the drain region, and the metal silicon nitride layer is formed on the surface of the metal silicide layer.
    Type: Application
    Filed: September 14, 2023
    Publication date: March 20, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yao-Wen HSU, Chun-Cheng CHOU
  • Patent number: 12255107
    Abstract: Semiconductor devices and methods which utilize a treatment process of a bottom anti-reflective layer are provided. The treatment process may be a physical treatment process in which material is added in order to fill holes and pores within the material of the bottom anti-reflective layer or else the treatment process may be a chemical treatment process in which a chemical reaction is used to form a protective layer. By treating the bottom anti-reflective layer the diffusion of subsequently applied chemicals is reduced or eliminated, thereby helping to prevent defects that arise from such diffusion.
    Type: Grant
    Filed: January 11, 2024
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yao-Wen Hsu, Ming-Chi Huang, Ying-Liang Chuang
  • Publication number: 20250089325
    Abstract: A method includes forming a multi-layer stack over a semiconductor substrate, the multi-layer stack comprising a plurality of sacrificial layers that alternate with a plurality of channel layers, forming a dummy gate stack over a top surface and sidewalls of the multi-layer stack, forming first spacers on sidewalls of the dummy gate stack, growing an epitaxial source/drain region that extends through the plurality of sacrificial layers and the plurality of channel layers, forming a metal-semiconductor alloy region on first portions of the epitaxial source/drain region, forming a coating layer on the metal-semiconductor alloy region, wherein during the forming of the metal-semiconductor alloy region and the coating layer, a residual layer is formed on sidewalls of the first spacers, and performing a wet clean process to selectively etch the residual layer from the sidewalls of the first spacers.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 13, 2025
    Inventors: Yao-Wen Hsu, Yun-Ting Chiang, Chun-Cheng Chou
  • Publication number: 20250086377
    Abstract: An electronic device and a non-transitory computer-readable storage medium are provided. The electronic device includes a storage module and a processing module. The processing module loads at least one program instruction to perform the following steps: parsing a plurality of cells in an analysis region of a data sheet to identify each cell as one of at least one formula cell and at least one non-formula cell; classifying, according to a formula expression of at least one formula cell, the at least one formula cell to at least one formula group; selectively establishing a side label category tree, a top label category tree, and a master category tree according to the at least one formula group; establishing a database data model according to the side label category tree, the top label category tree, and the master category tree; and converting each formula expression into a structure reference form.
    Type: Application
    Filed: December 20, 2023
    Publication date: March 13, 2025
    Applicant: POTIX CORPORATION
    Inventors: Chih-Heng Chen, Jen-Feng Chao, Wenning Hsu, Ming-Shia Yeh
  • Publication number: 20250072013
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a thin film resistor (TFR) layer overlying a semiconductor substrate. A first conductive structure is disposed on an outer region of the TFR layer. The first conductive structure comprises a lateral portion adjacent to a vertical portion. A height of the vertical portion is greater than a height of the lateral portion. A capping structure is disposed on a middle region of the TFR layer and abuts the vertical portion of the first conductive structure.
    Type: Application
    Filed: January 9, 2024
    Publication date: February 27, 2025
    Inventors: Chun-Tsung Kuo, Hung-Wen Hsu, Jiech-Fun Lu
  • Publication number: 20250063821
    Abstract: A method of manufacturing a hybrid SOI substrate includes epitaxially growing a sacrificial layer and then an upper semiconductor layer over a semiconductor body. The sacrificial layer may be a heavily doped semiconductor. The heavy doping allows the sacrificial layer to be selectively etched while leaving the upper semiconductor layer largely intact. An SOI region of the semiconductor body is masked while the upper semiconductor layer and the sacrificial layer are etched from a peripheral region of the semiconductor body. A bulk semiconductor is then grown to replace the etched layers on the peripheral region. Holes are formed through the upper semiconductor layer in the SOI region and the sacrificial layer is etched from beneath the upper semiconductor. The holes may then be filled with dielectric leaving a cavity beneath the upper semiconductor layer in the SOI region.
    Type: Application
    Filed: January 5, 2024
    Publication date: February 20, 2025
    Inventors: Hung-Wen Hsu, Hung-Chang Chang, Jiech-Fun Lu