Abstract: A method and apparatus for a digital video display. A digital display device receives an analog signal representing an image formed of pixels in video lines and a signal containing a synchronization waveform for the image. An analog-to-digital converter (ADC) receives the analog signal and converts it to a sampled digital waveform. A phase-locked loop including a programmable frequency divider controls the sampling time for the ADC. The programmable frequency divider is controlled by a dividing-ratio algorithm that selects a dividing ratio, measures the number of pixels in a video line using the dividing ratio, and recomputes the dividing ratio by multiplying the selected dividing ratio by the expected number of pixels in a video line and dividing by the measured number of pixels. The sampling phase for the ADC is selected by a sampling-phase control algorithm that minimizes a function representative of the flatness of the sampled digital waveform.

Abstract: Semiconductor testing equipment according to the present invention comprises: an algorithmic pattern generator for generating a test pattern for testing a memory under test and applying the pattern to the memory under test; a comparator for comparing a response signal from the memory under test and an expected value from tho algorithmic pattern generator; a fail address acquisition part for storing an address of the memory under test (fail address) when a result compared by the comparator is failed; a fail address analysis part for analyzing the failed address and calculating the address to be repaired (repair address); and a cycle-pattern generator for redundancy processing for inserting the address to be repaired into a test pattern and applying the address to the memory under test, so that even when capacity of the semiconductor memory is increased, a fabrication yield thereof is raised by testing the memory after the packaging and by performing the redundancy processing of a defective.

Abstract: The invention relates to methods of preparing metal particles on a support material, including platinum-containing nanoparticles on a carbon support. Such materials can be used as electrocatalysts, for example as improved electrocatalysts in polymer electrolyte membrane fuel cells (PEM-FCs).

Abstract: This invention relates to a method to make an article comprising the steps of combining a semi-amorphous polymer having a heat of fusion of less than 70 J/g with a plasticizer and optionally one or more additives, to produce a polymer concentrate, combining the polymer concentrate with one or more final materials to produce an article precursor; and forming the article at least partially from the article precursor, wherein the polymer concentrate preferably shows no visible phase separation as demonstrated by the polymer concentrate having no visually detectable loss of the plasticizer after a portion of the polymer concentrate is aged on an absorbent surface for 24 hours at 25° C. An article produced by the method is also disclosed.

Abstract: The gene responsible for Stargardt-like macular dystrophy has been identified, along with its normal allelic form. The mutant gene encodes a mutant protein containing a frameshift mutation, resulting in abnormal fatty acid synthesis and transport in the retina. Also disclosed are assays for Stargardt-like macular dystrophy and therapies.

Abstract: This invention relates to a method to make an article comprising the steps of combining a semi-amorphous polymer having a heat of fusion of less than 70 J/g with a plasticizer and optionally one or more additives, to produce a polymer concentrate, combining the polymer concentrate with one or more final materials to produce an article precursor; and forming the article at least partially from the article precursor, wherein the polymer concentrate preferably shows no visible phase separation as demonstrated by the polymer concentrate having no visually detectable loss of the plasticizer after a portion of the polymer concentrate is aged on an absorbent surface for 24 hours at 25° C. An article produced by the method is also disclosed.

Abstract: A phase detector generates a first output signal if a feedback clock signal leads a reference clock signal by more than a first time. The phase detector generates a second output signal if the feedback clock signal lags the reference clock signal by more than a second time. If the feedback clock signal either leads the reference clock signal by less than the first time or lags the reference clock signal by less than the second time, neither output signal is generated. The phase detector may be used in a delay-lock loop in which the first and second output signals increase or decrease a delay of the reference clock signal by respective first and second delay increments. In such case, the each of the first and second delay increments should be less than the sum of the first and second times.

Abstract: A shock-resistant magnetic storage medium includes a circuit protection module coupled between a power converter and a magnetic disk assembly. The circuit protection module includes an acceleration sensor for generating output signals that indicate a falling state of the magnetic disk assembly, a switch operable so as to make or break a circuit connection between the power converter and the magnetic disk assembly, and a processor for controlling the switch to break the circuit connection between the power converter and the magnetic disk assembly based on the output signals from the acceleration sensor so as to interrupt supply of electric power to the magnetic disk assembly when the magnetic disk assembly is dropped.

Abstract: A hose connection device includes a handle and a first flange extends from an inner periphery of the through hole of the handle. A connection member has a axial passage and a second flange extends from an outer periphery thereof. The connection member is inserted in the through hole and the first flange is overlapped on the second flange. A nut is received in the through hole and threadedly mounted to the connection member so that the connection member is independently rotatable relative to the handle. The handle includes a connection end with outer threaded periphery for being connected with a watering nozzle.

Abstract: A hose assembly includes a connection sleeve which is rotatably mounted to a connection member which is connected to a hose. The connection sleeve has a first flange extending from an inner periphery thereof and a positioning hole is defined radially through a wall of the connection sleeve. The connection member has a second flange extending from an outer periphery thereof so as to be engaged with the first flange. A positioning groove is defined in the outer periphery of the connection member and a positioning member extends through the positioning hole and is engaged with the positioning groove so that the connection sleeve is rotatable relative to the connection member.

Abstract: A hose assembly includes a connection sleeve and a connection member 20 rotatably received in the connection sleeve. The connection sleeve has a first flange extending from an inner periphery thereof and a second flange extends from an outer periphery of the connection member so that an underside of the first flange is overlapped on the second flange. An annular lip extends outward from an outer periphery of an end of the connection member and is rested on a top of the first flange. The handle includes a connection end with outer threaded periphery for being connected with a watering nozzle.

Abstract: A printer according to the present techniques includes a print head having at least one nozzle for ejecting an ink drop and a sensing element for detecting the ink drop. The print head includes a charge shield for imparting an electrical charge into the ink drop during ejection from the nozzle and for shielding electrical noise generated in the print head.

Abstract: Disclosed herein are exemplary embodiments of an improved write address shift register structure useful for example in a DDR3 DRAM having read/write latency. The disclosed shift register structure propagates write addresses from an address bus outside the device to array decoders to allow latent data to be written into the cells in the memory array at a proper time. The register structure comprises a reduced number of registers (e.g., four) thus eliminating the need for extraneous registers which might otherwise be used to propagate “don't care” addresses. The registers are clocked, and the addresses propagated though the registers, in accordance with a latency bus through which a user defines the desired read/write latency in accordance with user preferences and the desired clock speed of the device. The clock for each register is preferably decoded from the latency bus and hence each register preferably has its own unique clock.

Abstract: Systems, devices, and methods for a double data rate memory device includes a storage element, a first pipeline, and a second pipeline. The pipelines are connected to the storage unit to pass or output data on rising and falling edges of an external clock signal. The device permits data transferring at dual data rates. Another memory device includes a storage element and a plurality of pipelines for transferring data. The plurality of pipelines each pass data on different events.

Abstract: The disclosed system and method significantly reduce or eliminate DQS postamble ringing problem in modern high-speed memory chips, allowing the memory chips to be operated at significantly faster clock speeds. The external strobe signal (XDQS) may be used to generate at least two derivative strobe signals therefrom. Instead of the XDQS signal, the derivative strobe signals are then used, in a predetermined order, to clock in or strobe the data to be written into memory cells. The last generated derivative strobe signal may be used to finally transfer the data bits into memory cells. Once the last of the derivative strobe signals is activated, and so long as there are no more data writes pending in the command pipe for the next clock cycle, the rising or falling edge of the last derivative strobe signal can be detected to turn off further generation of the strobe signals prior to any onset of postamble ringing on the XDQS signal.

Abstract: The present invention relates to plasticized polyolefin compositions comprising a polyolefin and a non-functionalized hydrocarbon plasticizer.

Abstract: This invention relates to homogeneous blends of: 1) from 60 to 99 weight percent of one or more semi-crystalline polymers (based upon the weight of the semi-crystalline and semi-amorphous polymers), each semi-crystalline polymer comprising propylene and from 0 to 5 weight % alpha-olefin comonomer (based upon the weight of the polymer), said semi-crystalline polymers each having a melting point between 100 and 170° C. and a melt flow rate of 200 dg/min or less; and 2) from 1 to 40 weight % of one or more semi-amorphous polymers (based upon the weight of the semi-crystalline and semi-amorphous polymers), each semi-amorphous polymer comprising propylene and from 5 to 12 weight % of one or more C2 and or C4 to C10 alpha-olefin comonomers, said semi-amorphous polymers each having: a) 10 to 50 percent crystallinity or less; b) a melt flow rate of 200 dg/min or less; c) a DSC melting point (second melt Tm) of 130° C.

Abstract: The invention relates to a validation device comprising at least one specular reflective layer, indicia on said reflective layer, a polymer protective layer overlaying said indicia, and a polymer protective layer on the side of the reflective layer opposite to said indicia wherein said indicia are formed by thermal dye transfer.

Abstract: The gene responsible for Stargardt-like macular dystrophy has been identified, along with its normal allelic form. The mutant gene encodes a mutant protein containing a frameshift mutation, resulting in abnormal fatty acid synthesis and transport in the retina. Also disclosed are assays for Stargardt-like macular dystrophy and therapies.

Abstract: Systems, devices, and methods for a double data rate memory device includes a storage element, a first pipeline, and a second pipeline. The pipelines are connected to the storage unit to pass or output data on rising and falling edges of an external clock signal. The device permits data transferring at dual data rates. Another memory device includes a storage element and a plurality of pipelines for transferring data. The plurality of pipelines each pass data on different events.