Patents by Inventor Wen Lin

Wen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9665000
    Abstract: The present disclosure provides a method of repairing a mask. The method includes inspecting a mask to identify a defect on the mask; performing a cleaning process to the mask using a non-thermal chemical solution to the mask; and repairing the mask to remove the defect from the mask. The non-thermal chemical solution is cooled by a cooling module to a working temperature below room temperature.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: May 30, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Wei Shen, Chi-Lun Lu, Kuan-Wen Lin
  • Publication number: 20170146859
    Abstract: A polarizer component has an optical film to receive excitation light, a light re-emitting layer and a polarizing layer. The light re-emitting layer has quantum dots that re-emit red light and quantum dots that re-emit green light in response to the excitation light. The re-emitted red light is provided to a red sub-pixel to be filtered by a red color filter, and the re-emitting green light is provided to a green sub-pixel to be filtered by a green color filter. The excitation light can be blue or ultra violet and part of the excitation light is provided to a blue sub-pixel. The polarizing layer can be a reflective polarizing layer and the optical film can be a wavelength selecting layer. The light re-emitting layer may contain scattering particles to diffuse the excitation light provided to a blue sub-pixel.
    Type: Application
    Filed: November 20, 2015
    Publication date: May 25, 2017
    Inventors: Yi-Wen LIN, Adiel ABILEAH, Willem DEN BOER, Fang-Chen LUO, Shu-Han WANG, Chih-Kang WU
  • Patent number: 9658526
    Abstract: A pellicle mask assembly includes a mask, a pellicle frame, and a pellicle membrane. The pellicle frame has a bottom side attached to the mask, and a top side covered by the pellicle membrane. The pellicle frame includes a coating on its inner surface and the coating is configured to monitor a change of environment inside the pellicle mask assembly. In embodiments, the change of environment includes increased humidity and/or increased chemical ion density inside the pellicle mask assembly. Methods of making and using the pellicle mask assembly are also disclosed.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: May 23, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Wen Lin, Sheng-Chi Chin, Ting-Hao Hsu, Tzu-Ting Chou, Shu-Hsien Wu
  • Publication number: 20170139322
    Abstract: The present disclosure provides a method of repairing a mask. The method includes inspecting a mask to identify a defect on the mask; performing a cleaning process to the mask using a non-thermal chemical solution to the mask; and repairing the mask to remove the defect from the mask. The non-thermal chemical solution is cooled by a cooling module to a working temperature below room temperature.
    Type: Application
    Filed: November 16, 2015
    Publication date: May 18, 2017
    Inventors: Ching-Wei Shen, Chi-Lun Lu, Kuan-Wen Lin
  • Publication number: 20170138911
    Abstract: A system and method for determining clearance between a fabrication tool and a workpiece is provided. In an exemplary embodiment, the method includes receiving a substrate within a tool such that a gap is defined there between. A transducer disposed on a bottom surface of the substrate opposite the gap provides an acoustic signal that is conducted through the substrate. The transducer also receives a first echo from a top surface of the substrate that defines the gap and a second echo from a bottom surface of the tool that further defines the gap. A width of the gap is measured based on the first echo and the second echo. In some embodiments, the bottom surface of the tool is a bottom surface of a nozzle, and the nozzle provides a liquid or a gas in the gap while the transducer is receiving the first and second echoes.
    Type: Application
    Filed: November 16, 2015
    Publication date: May 18, 2017
    Inventors: Jun-Hao Deng, Kuan-Wen Lin, Sheng-Chi Chin, Yu-Ching Lee
  • Patent number: 9647650
    Abstract: A clock generating device includes a first timing delay module, a multiplexer, and a second timing delay module. The multiplexer is electrically connected to the first timing delay module. The second timing delay module is electrically connected to the multiplexer. The first timing delay module generates a plurality of delayed clock signals based on a reference clock signal. The multiplexer outputs a first delayed clock signal and a second delayed clock signal, among the plurality of delayed clock signals, based on a clock generating signal. The second timing delay module generates an output clock signal based on the clock generating signal, the first delayed clock signal and the second delayed clock signal.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: May 9, 2017
    Assignee: CHROMA ATE INC.
    Inventors: Cheng-Hsien Chang, Ching-Hua Chu, Shin-Wen Lin
  • Publication number: 20170126670
    Abstract: A time information based authentication method, an integrated circuit film or with a SIM card or a SD card are provided. The time information based authentication method comprises the following steps. A time information is obtained from a external device. A data is received from a memory unit of a security chip. An authentication code is generated according to the data and the time information.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 4, 2017
    Inventors: Yvette E-Wen Lin, Chi-Hsuan Yen, Kuan-Hung Lu, Yu-Feng Chen, Jen-Ho Chang, Shu-Ching Huang
  • Publication number: 20170125297
    Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a logic region and high-voltage (HV) region; forming a first gate structure on the logic region and a second gate structure on the HV region; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; forming a patterned hard mask on the HV region; and transforming the first gate structure into a metal gate.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 4, 2017
    Inventors: Chih-Chung Wang, Shih-Yin Hsiao, Wen-Fang Lee, Nien-Chung Li, Shu-Wen Lin
  • Patent number: 9640806
    Abstract: A bipolar plate for a fuel cell is provided, which includes: a metal substrate having a flow field structure; a conducting adhesion layer formed on the metal substrate and having a polymeric adhesive and a plurality of conductive particles; and a pure graphite layer formed on the conducting adhesion layer and structurally corresponding to the flow field structure of the metal substrate. The graphite layer including expanded graphite powder is adhered to the metal substrate via the conducting adhesion layer, and a portion of the expanded graphite powder is embedded into the conducting adhesion layer.
    Type: Grant
    Filed: October 19, 2016
    Date of Patent: May 2, 2017
    Assignee: Industrial Technology Research Institute
    Inventors: Ho-Yen Hsieh, Wen-Lin Wang, Ching-Ying Huang
  • Publication number: 20170115278
    Abstract: A useful HIV remedy process consists of 4 elements: guinea pig or mouse peritoneal derived adherent macrophages/monocytes as effector cells; cyclophosphamide as an immuno suppressor; chicken RBC as target cells; and the anti-HIV1 agent candidate to be examined. Immunovir and components were isolated from Pyrus serotina Rehder and other species of Rosaceae by column chromatography.
    Type: Application
    Filed: November 18, 2016
    Publication date: April 27, 2017
    Inventors: Yong Chi Lin, Po Wen Lin, Po Yu Lin, Amy Huimeei Lo, Jing Meei Lin
  • Patent number: 9630288
    Abstract: A grinding machine of one embodiment includes an abrasive wheel; a rectangular base including a top wall having a central through hole and an upper shoulder; a mounting member secured to the central through hole; an electric motor including a drive shaft passing through the mounting member to secure to the abrasive wheel; first and third workpiece holding units each including a board secured to the base; an adjustment knob on the board; and an L-shaped seat secured to the board and having a transverse channel, a front curved slot, a rear projection pivotably secured to the board, and a pin secured to the board and disposed in the slot; a second workpiece holding unit secured to the shoulder and including a vertical tunnel; and a fourth workpiece holding unit secured to the shoulder and including a vertical tunnel, an adjustment knob, and a fastening member.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: April 25, 2017
    Inventors: Chi-Wen Lin, Chi-Kuo Lin
  • Publication number: 20170103572
    Abstract: A head mounted device suitable for guiding an exhibition is disclosed. The head mounted device includes an image capturing unit, a process module and an information interface. The process module includes a recognition unit, a computing unit and a control unit. The image capturing unit captures an input image in invisible spectrum. The recognition unit recognizes an invisible code from the input image. The computing unit calculates a relative distance and a relative angle between the head mounted device and an exhibition object. By comparing the relative distance with a threshold distance, the control unit determines whether to trigger the information interface and present an exhibit-object introduction based on relative distance and relative angle.
    Type: Application
    Filed: November 20, 2015
    Publication date: April 13, 2017
    Inventors: Ching-Wen LIN, Wei-Yuan LIN
  • Publication number: 20170103720
    Abstract: A gate driver on panel for a thin film transistor (TFT) array substrate includes a substrate, a plurality of gate drive-on-array (GOA) structures, a plurality of capacitors and a plurality of transmission lines electrically coupling the GOA structures and the capacitors together. At least one protection layer made of indium tin oxide which is electrically insulating from all of the GOA structures, the capacitors and the transmission line is formed on a top of the GOA. The at least one protection layer protects at least one of the GOA structures, the capacitors and the transmission lines from being damaged by gold balls and/or fibers in a sealant for connecting the TFT array substrate and a color filter substrate together.
    Type: Application
    Filed: October 30, 2015
    Publication date: April 13, 2017
    Inventors: MING-TSUNG WANG, WEN-LIN MEI
  • Patent number: 9622366
    Abstract: A display panel having a wireless charging function is provided, and the display panel includes a first substrate, an induction coil layer, a display pixel layer, and a second substrate. The induction coil layer is disposed on the first substrate. The induction coil layer includes at least one induction coil. The induction coil layer is adapted for collaborating with a wireless charging power supply, such that the induction coil layer executes the wireless charging function. The display pixel layer is disposed on the induction coil layer. The second substrate is disposed on the display pixel layer.
    Type: Grant
    Filed: May 10, 2013
    Date of Patent: April 11, 2017
    Assignee: E Ink Holdings Inc.
    Inventors: Chin-Wen Lin, Po-Hsin Lin, Chi-Liang Wu, Ted-Hong Shinn
  • Patent number: 9620386
    Abstract: A method of fabricating a gate structure includes depositing a high dielectric constant (high-k) dielectric layer over a substrate. The method further includes performing a multi-stage preheat high-temperature anneal. Performing the multi-stage preheat high-temperature anneal includes performing a first stage preheat at a temperature in a range from about 400° C. to about 600° C., performing a second stage preheat at a temperature in a range from about 700° C. to about 900° C., and performing a high temperature anneal at a peak temperature in a range from 875° C. to about 1200° C.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: April 11, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun Hsiung Tsai, Xiong-Fei Yu, Yu-Lien Huang, Da-Wen Lin
  • Publication number: 20170098414
    Abstract: A driving module for an organic light-emitting diode display device includes a converting unit, for adjusting a voltage range of a plurality of data signals from a first voltage range to a second voltage range; and a driving unit, for generating a plurality of driving signals within the second voltage range to the organic light-emitting diode display device according to the plurality of data signals; wherein the maximum voltage of the second voltage range is greater than or equal to the maximum driving voltage of display components coupled to the driving signals in the organic light-emitting diode display device, and the minimum voltage of the second voltage range is smaller than or equal to the minimum driving voltage of display components coupled to the driving signals in the organic light-emitting diode display device.
    Type: Application
    Filed: May 17, 2016
    Publication date: April 6, 2017
    Inventors: Wen-Lin Yang, Chih-Lung Kuo
  • Publication number: 20170096637
    Abstract: The invention provides a zwitterionic-bias material for blood cell selection and a method for removing leukocytes from a blood sample. The zwitterionic-bias material for blood cell selection is a copolymer formed by zwitterionic structural units and charged structural units wherein the zwitterionic structural unit comprises at least one positively charged moiety and one negatively charged moiety, a distance between the positively charged moiety and the negatively charged moiety is a length of 1˜5 carbon-carbon bonds, and the zwitterionic structural units and charged structural units are randomly arranged to have zwitterionic-bias.
    Type: Application
    Filed: March 20, 2015
    Publication date: April 6, 2017
    Inventors: Yung Chang, Jheng-Fong Jhong, Sheng-Han Chan, Wen-Lin Lin
  • Patent number: 9595486
    Abstract: A metal oxide semiconductor structure, the structure including: a substrate; a gate electrode, deposited on the substrate; a gate insulation layer, deposited over the gate electrode and the substrate; an IGZO layer, deposited on the gate insulation layer and functioning as a channel; a source electrode, deposited on the gate insulation layer and being at one side of the IGZO layer; a drain electrode, deposited on the gate insulation layer and being at another side of the IGZO layer; a first passivation layer, deposited over the source electrode, the IGZO layer, and the drain electrode; a second passivation layer, deposited over the first passivation layer; and an opaque resin layer, deposited over the source electrode, the second passivation layer, and the drain electrode.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: March 14, 2017
    Assignee: E INK HOLDINGS INC.
    Inventors: Chin-Wen Lin, Chuan-I Huang, Chung-Chin Huang, Ted-Hong Shinn
  • Patent number: 9595443
    Abstract: The invention relates to integrated circuit fabrication, and more particularly to a metal gate structure. An exemplary structure for a CMOS semiconductor device comprises a substrate comprising an isolation region surrounding and separating a P-active region and an N-active region; a P-metal gate electrode over the P-active region and extending over the isolation region, wherein the P-metal gate electrode comprises a P-work function metal and an oxygen-containing TiN layer between the P-work function metal and substrate; and an N-metal gate electrode over the N-active region and extending over the isolation region, wherein the N-metal gate electrode comprises an N-work function metal and a nitrogen-rich TiN layer between the N-work function metal and substrate, wherein the nitrogen-rich TiN layer connects to the oxygen-containing TiN layer over the isolation region.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: March 14, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming Zhu, Hui-Wen Lin, Harry-Hak-Lay Chuang, Bao-Ru Young, Yuan-Sheng Huang, Ryan Chia-Jen Chen, Chao-Cheng Chen, Kuo-Cheng Ching, Ting-Hua Hsieh, Carlos H. Diaz
  • Patent number: 9594553
    Abstract: The present disclosure relates to a method and system for identifying a semantic difference between source code versions. In one embodiment of the present disclosure, there is provided a method for identifying a semantic difference between source code versions, comprising: obtaining first debugging information of a first source code version and second debugging information of a second source code version respectively; determining, by comparing the first debugging information with the second debugging information, whether in the second source code version there exists a second function matching a first function in the first source code version; and identifying the semantic difference on the basis of a result of the determining. In one embodiment of the present disclosure, there is provided a system for identifying a semantic difference between source code versions. By means of the present disclosure, a semantic difference between various source code versions can be identified rapidly and accurately.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: March 14, 2017
    Assignee: International Business Machines Corporation
    Inventors: Jin Song Ji, Ke Wen Lin, Qing Shan Zhang, Yuheng Zhang